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build: W600-SDK importiert, Firmware-Build und Hello am EVK

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Docker-Build mit gcc-arm-none-eabi 4.9-2014q4 (statt Homebrew-Cask) verwendet,
Dockerfile/tools/docker.sh dafür aus Task 13 vorgezogen. cmake/sdk.cmake schont
gcc 4.9 (kennt -fcommon/-Wno-error=... nicht). Zwei zusätzliche SDK-Stubs
(EarlyInit, pre_gpio_config) in src/sys/sdk_stubs.c ergänzt, siehe sdk/PATCHES.md.
This commit is contained in:
Michael Sauer
2026-09-11 12:52:26 +02:00
parent 4e7ff78fc6
commit 1b0501179d
610 changed files with 224089 additions and 0 deletions
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sdk/Bin/secboot.img
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sdk/Include/App/wm_at_ri_init.h
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/**
* @file wm_at_ri_init.h
*
* @brief AT_RI task and interface resource initial Module
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_AT_RI_H
#define WM_AT_RI_H
/**
* @defgroup APP_APIs APP APIs
* @brief APP APIs
*/
/**
* @addtogroup APP_APIs
* @{
*/
/**
* @defgroup AT_RI_APIs AT_RI APIs
* @brief AT_RI command APIs
*/
/**
* @addtogroup AT_RI_APIs
* @{
*/
/**
* @brief This function is used to initialize hostif task
used by AT&RI Command
*
* @param None
*
* @retval 0 success
* @retval other failed
*
* @note Usually the system will call this api at power on.
*/
int tls_hostif_init(void);
/**
* @brief This function is used to initialize high speed SPI
*
* @param None
*
* @retval 0 success
* @retval other failed
*
* @note Users can decide to call this api or not according to his application.
*/
int tls_hspi_init(void);
/**
* @brief This function is used to initialize UART
*
* @param None
*
* @return None
*
* @note Usually the system will call this api at power on.
*/
void tls_uart_init(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_AT_RI_H */
sdk/Include/App/wm_cloud.h
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/**
* @file wm_cloud.h
*
* @brief Cloud Interface API
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_CLOUD_H__
#define __WM_CLOUD_H__
#include "wm_config.h"
#if TLS_CONFIG_CLOUD
#include "wm_sockets.h"
#if TLS_CONFIG_HTTP_CLIENT_SECURE
#include "matrixsslApi.h"
#endif
#define SERVER_STATE_OFFLINE 0
#define SERVER_STATE_ONLINE 1
#define SOCKET_TCP 1
#define SOCKET_CLINET 2
#define SOCKET_SSL 4
/**
* 开发者自定义socket的信息，目前sock_type不支持Tcp server，
* 可支持udp、tcp client以及ssl的tcp连接
*/
typedef struct _SOCKET{
int socket_num; /**< socket号，socket建立成功后，系统填入，
开发者初始化时不必填写 */
struct sockaddr * sock_addr;/**< socket地址，udp时，表示本地地址，
tcp时，表示对端地址 */
u8 sock_type; /**< socket类型定义，目前仅低三个bit有效，
具体查看SOCKET_xxx定义 */
u8 connected; /**< socket连接标志，仅tcp client有效，
为1表示连接成功 */
void * user_param; /**< 开发者自定义信息，用来区分是否为开发者
自定义socket */
#if TLS_CONFIG_HTTP_CLIENT_SECURE
ssl_t * ssl; /**< ssl连接信息，仅SOCKET_SSL时有效 */
#endif
}SOCKET;
/** 开发者自定义socket接收数据的格式 */
typedef struct CReadData{
SOCKET *socket; /**< socket相关信息 */
char * read_data; /**< 接收的数据 */
u32 data_len; /**< 接收数据长度 */
struct sockaddr_in sin_recv;/**< 对端socket地址，仅udp时有效 */
}CloudReadData;
#if TLS_CONFIG_CLOUD_KII
/** 云端回调数据格式 */
typedef struct _Cloud_Callback_data
{
char* bucketName;/**< bucket名称 */
char* objectId; /**< 对象id */
char* jsonObject;/**< 对象数据，通常用json格式表示 */
} CloudCallbackData, *PCloudCallbackData;
/** 设置上传云端回调，errcode为0表示上传成功，data为上传数据，
如果上传成功，可以从data->objectId得到上传云的数据对象id */
typedef void (*upload_callback)(PCloudCallbackData data, int errcode);
/** 上传云端的数据格式 */
typedef struct _CloudData
{
char* bucketName; /**< bucket名称 */
char* jsonObject; /**< 对象数据，通常用json格式表示 */
upload_callback cb; /**< 上传结果回调 */
} CloudData,*PCloudData;
/** 初始化云参数定义 */
typedef struct _Cloud_Init_arg
{
char* site; /**< 服务器地址，目前可传入"CN" "US" "JP" "SG" */
char* appId; /**< 应用ID */
char* appKey; /**< 应用Key */
char* deviceType; /**< 设备类型 */
char* venderId; /**< 设备ID，通常为设备的MAC地址 */
char* modelName; /**< 模块名称，自定义字符串，OTA推送的bucketName格式为 */
char* password; /**< 设备密码 */
char* recvDataBucket; /**< 设备推送的bucketName */
} CloudInitArg, *PCloudInitArg;
#endif
#if TLS_CONFIG_CLOUD_JD
/** 云操作类型枚举 */
enum cloud_opt_type
{
UPLOAD_REQ, /**< 上传数据请求 */
UPLOAD_RESP, /**< 上传数据响应 */
CONTROL_REQ, /**< 云端控制命令请求 */
CONTROL_RESP, /**< 控制命令响应 */
SNAPSHOT_REQ, /**< 云端抓取快照（状态）请求 */
SNAPSHOT_RESP /**< 快照（状态）响应 */
};
/**
* 云端通信数据结构，需要注意一下两点:
* 1)作为tls_cloud_upload_data方法参数:
* 上传数据请求、控制命令响应、快照（状态）响应接口，
* 对于上传数据请求，如果此接口返回后，data->opt为UPLOAD_RESP，
* 则实际上同步响应了上传命令，此时data->result即为上传数据后云端返回结果。
* CloudData需要调用者自己分配内存，自己释放。
* 2)作为cloud_callback回调参数:
* 上传数据响应、云端控制命令下达、云端抓取快照（状态）请求时，
* cloud_callback回调接口被调用。
* 对于云端控制命令请求、云端抓取快照请求，如果在此回调接口返回后，
* data->opt为CONTROL_RESP或SNAPSHOT_RESP，则实际上同步响应了此命令，
* 此时data->result即为控制命令响应结果，data->values中包含了快照响应结果。
* 同步响应SNAPSHOT_RESP时，names和values部分的内存以及同步响应CONTROL_RESP时，
* data->control_resp部分的内存由开发者申请，在云实现中释放。
*/
typedef struct _CloudData
{
enum cloud_opt_type opt;/**< 操作类型枚举 */
int result; /**< 云端响应上传数据或设备响应云端控制结果 */
char* control_resp; /**< 云端控制命令失败原因 */
char** names; /**< 上传数据请求、云端控制请求、
云端快照请求或快照响应的字段名 */
char** values; /**< 上传数据请求、云端控制请求、快照响应的值 */
int cnt; /**< 字段个数 */
void * arg; /**< 云端发送过来的参数，需要原封不动回传给云端 */
} CloudData,*PCloudData, CloudCallbackData, *PCloudCallbackData;
/** 初始化云参数定义，应该传入product_uuid */
typedef struct _Cloud_Init_arg
{
char *product_uuid; /**< 产品UUID */
} CloudInitArg, *PCloudInitArg;
#endif
#if TLS_CONFIG_CLOUD_GAGENT
/** 云端通信数据结构 */
typedef struct _CloudData
{
int32 totalcap; /**< 全局缓存区的大小 4k+128byte */
int32 remcap; /**< 数据包头的冗余长度 128byte */
uint8 *allbuf; /**< 数据起始地址 */
int32 bufcap; /**< 数据区域的大小 4K */
uint32 type; /**< 消息体类型 */
uint8 *phead; /**< 数据包头起始地址 */
uint8 *ppayload; /**< 业务逻辑头起始地址 */
uint8 *pend; /**< 数据结束地址 */
} CloudData,*PCloudData, CloudCallbackData, *PCloudCallbackData;
/** 初始化云参数定义 */
typedef struct _Cloud_Init_arg
{
char* product_key; /**< 产品标识码 */
char* wifi_soft_ver; /**< 软件版本号 */
char* wifi_hard_ver; /**< 硬件版本号 */
} CloudInitArg, *PCloudInitArg;
#endif
#if TLS_CONFIG_CLOUD_360
/**
* 设置上传云端回调，errcode为0表示上传成功，user_param为
* 调用tls_cloud_upload_data时传入的CloudData中的user_param
*/
typedef void (*upload_callback)(void* user_param, int errcode);
/** 云端回调数据格式 */
typedef struct _Cloud_Callback_data
{
const uint8_t* data; /**< 数据 */
size_t datalen; /**< 数据长度 */
}CloudCallbackData, *PCloudCallbackData;
/** 上传云端的数据格式 */
typedef struct _CloudData
{
void* user_param; /**< 用户参数，在上传回调中传入此参数 */
const uint8_t* data; /**< 数据 */
size_t datalen; /**< 数据长度 */
upload_callback cb; /**< 上传结果回调 */
} CloudData,*PCloudData;
/** 初始化云参数定义 */
typedef struct _Cloud_Init_arg
{
int product_id; /**< 产品ID */
unsigned char product_aes[16]; /**< 产品AES密钥 */
char *device_name; /**< 设备名称 */
} CloudInitArg, *PCloudInitArg;
#endif
#if TLS_CONFIG_CLOUD_QQ
/**
* 设置上传云端回调，errcode为0表示上传成功，cookie为自增
* 的序号，和在调用tls_cloud_upload_data时得到的CloudData中
* 的pCookie相同
*
*/
typedef void (*upload_callback)(int32_t err_code, uint32_t cookie);
/** 云端回调数据格式 */
typedef struct _Cloud_Callback_data {
uint32_t property_id; /**< 属性ID */
uint8_t *property_value; /**< 属性value，类型为字节数组 */
uint32_t property_value_len; /**< 属性value的长度 */
uint32_t seq; /**< 操作序号 */
int32_t ret_code; /**< 收到cc datapoint，回复ACK时设置此值供H5页面使用 */
} CloudCallbackData, *PCloudCallbackData;
/** 上传云端的数据格式 */
typedef struct _CloudData
{
CloudCallbackData *datapoints; /**< 数据结构 */
uint32_t datapoints_count; /**< 个数 */
upload_callback cb; /**< 上传结果回调 */
uint32_t *pCookie; /**< 自增的序号 */
}CloudData,*PCloudData;
/** 初始化云参数定义 */
typedef struct _Cloud_Init_arg{
/* 硬件信息 */
char* device_name; /**< 设备名称,'\0'结尾字符串长度不超过32字节，
nettype为1时必须与网站注册的devicename一致 */
char* sn; /**< 设备序列号,'\0'结尾字符串长度必须是16字节 */
char* license; /**< 设备LICENSE */
int32_t product_id; /**< 每一个厂商的每一种类型的设备对应的一个id */
int32_t product_version; /**< 产品的版本信息，用于OTA，默认填0 */
/** 密钥信息 */
uint8_t* client_pub_key; /**< client公钥，每台设备生成后烧录到设备 */
int32_t client_pub_key_len;
uint8_t* auth_key; /**< authkey，每台设备生成后烧录到设备 */
int32_t auth_key_len;
} CloudInitArg, *PCloudInitArg;
#endif
#if TLS_CONFIG_CLOUD_ABLECLOUD
/** ABLECLOUD云端通信数据结构 */
typedef struct _CloudData
{
u8 msg_id; /**< 消息ID，响应消息同云端下发的消息邋ID，主动上传任意 */
u8 msg_code; /**< 消息Code，响应消息同云端下发的消息code，
主动上传需要大于200 */
u8 *data; /**< 数据 */
uint32 datalen; /**< 数据长度 */
} CloudData,*PCloudData, CloudCallbackData, *PCloudCallbackData;
/** 初始化云参数定义 */
typedef struct _Cloud_Init_arg
{
u32 major_domain; /**< 主域ID */
u16 sub_domain; /**< 子域ID */
u8 private_key[112]; /**< 产品私钥 */
u32 product_version; /**< 产品的版本信息，用于OTA */
} CloudInitArg, *PCloudInitArg;
#endif
#if TLS_CONFIG_CLOUD_ELIAN
enum
{
DATA_TYPE_BINARY = 0, /**< 二进制 */
DATA_TYPE_TEXT = 1, /**< 文本格式 */
DATA_TYPE_NV = 2, /**< 以空格分离的命令加参数的格式，
如：power 34。 */
DATA_TYPE_EL_CMD = 3, /**< 为4字节整数命令Id+4字节整数的值，
如：140 (电源状态上报，14为整数；
0也为整数，表示状态）。 */
DATA_TYPE_INFRA = 6, /**< 红外格式 */
DATA_TYPE_STATUS_REQ = 7,/**< 设备状态请求 */
DATA_TYPE_EL_CMD2 = 8 /**< 为4字节整数命令Id+字符串格式的值，
如：140 (电源状态上报，14为整数；
0为字符串，表示状态)。 */
};
/** 云端通信数据结构 */
typedef struct _CloudData
{
const uint8_t* data; /**< 数据 */
size_t datalen; /**< 数据长度 */
u8 datatype;
} CloudData,*PCloudData, CloudCallbackData, *PCloudCallbackData;
/** 初始化云参数定义 */
typedef struct _Cloud_Init_arg
{
char* sn; /**< 设备序列号,'\0'结尾字符串长度
必须是13字节 */
} CloudInitArg, *PCloudInitArg;
#endif
/** 设备在云端注册后得到的关于设备的信息 */
typedef struct _Cloud_Dev_info{
u8* device_id; /**< 设备ID */
u8* access_token; /**< 设备token，和设备ID一起构成设备访问云的凭证 */
}CloudDeviceInfo, *PCloudDeviceInfo;
/**
* @brief 设置云的回调
*
* @param[in] data
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
typedef int (*cloud_callback)(PCloudCallbackData data);
/**
* @brief 设置云状态的回调，status为1表示设备在线，status为0表示
设备不在线
*
* @param[in] status
*
* @retval 0 表示设备不在线
* @retval 1 表示设备在线
*
* @note None
*/
typedef void (*cloud_online_status_callback)(int status);
/**
* @defgroup APP_APIs APP APIs
* @brief APP APIs
*/
/**
* @addtogroup APP_APIs
* @{
*/
/**
* @defgroup cloud_APIs cloud APIs
* @brief cloud APIs
*/
/**
* @addtogroup cloud_APIs
* @{
*/
/**
* @brief 初始化云，user task初始化时调用，
对京东云，arg为product_uuid，
对其它云arg请查看CloudInitArg结构定义
*
* @param[in] arg
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_cloud_init(PCloudInitArg arg);
/**
* @brief 注销云，设备下线时调用，销毁资源。block为0时，此函数立
即返回，注销云在后台执行，block为1时，云注销完成后此函数
返回。
*
* @param[in] block 是否阻塞，为1表示，直到云注销完成返回，
为0表示，立即返回，云注销在后台执行完成
*
* @return None
*
* @note None
*/
void tls_cloud_finish(u8 block);
/**
* @brief 设备向云上传数据，包括对控制命令的响应，上传状态以及设
备快照等
*
* @param[in] data
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_cloud_upload_data(PCloudData data);
/**
* @brief 设置云的回调接口，是设备接收云的控制命令，推送消息等的
唯一接口
*
* @param[in] callback
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_cloud_set_callback(cloud_callback callback);
/**
* @brief 设置云状态的回调接口，设备上线，下线时回调此接口
*
* @param[in] callback
*
* @return None
*
* @note None
*/
void tls_cloud_set_online_status_callback(cloud_online_status_callback callback);
/**
* @brief 获得设备在云端注册后的设备相关信息，
具体查看CloudDeviceInfo结构定义
*
* @param[in] info
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_cloud_get_device_info(PCloudDeviceInfo info);
/*
* 以下extern开头的函数，需要开发者实现，具体实现查看wm_lsd_device_found.c，此为我们写的一个局域网设备发现的简单实现，
* 开发者可以根据需要，写自己的设备发现实现，或者是局域网通信控制等。
*/
/**
* @brief 获得开发自定义的socket信息，count为最大支持的socket数，
根据不同的云此参数有所不同
*
* @param[in] sockets
* @param[in] count
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
extern int tls_cloud_get_custom_sockets(SOCKET** sockets, int count);
/**
* @brief 开发者自定义socket接收数据的处理函数，此函数在socket接
收到数据时被调用，
开发者可根据SOCKET中的user_param判断是否为自定义socket
，然后做相应的处理
*
* @param[in] data
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
extern int tls_cloud_socket_data_handler(CloudReadData* data);
/**
* @brief 通过socket发送数据，其中to和tolen只有udp时有效并且必须
，tcp时to参数传入NULL
*
* @param[in] *sock
* @param[in] *data
* @param[in] size
* @param[in] flags
* @param[in] *to
* @param[in] tolen
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_cloud_socket_sendto(SOCKET *sock, const void *data, size_t size, int flags,
const struct sockaddr *to, socklen_t tolen);
/**
* @}
*/
/**
* @}
*/
#endif //TLS_CONFIG_CLOUD
#endif
sdk/Include/App/wm_crypto.h
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/**
* @file wm_crypto.h
*
* @brief crypto driver module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_CRYPTO_H
#define WM_CRYPTO_H
/**
* @brief Encrypt plain data by 128 AES crypto
* @param[in] key the key for encryption
* @param[in] iv the IV value for encryption
* @param[in] data where the plain data stored
* @param[in] data_len length of the plain data to be encrypted
* @retval 0 finish Encryption successfully
* @retval -1 Error
* @note Encrypted data will be placed into the plain @data area
*
*/
int aes_128_cbc_encrypt (const u8 *key, const u8 *iv, u8 *data, size_t data_len) ;
/**
* @brief Decrypt data by 128 AES crypto
* @param[in] key the key for encryption
* @param[in] iv the IV value for encryption
* @param[in] data where the plain data stored
* @param[in] data_len length of the plain data to be decrypted
* @retval 0 finish Decryption successfully
* @retval -1 Error
* @note plain data will be placed into the encrypted @data area
*
*/
int aes_128_cbc_decrypt(const u8 *key, const u8 *iv, u8 *data,
size_t data_len);
/**
* @brief XOR RC4 stream to given data with skip-stream-start
* @param[in] key RC4 key
* @param[in] keylen RC4 key length
* @param[in] data data to be XOR'ed with RC4 stream
* @param[in] data_len length of the plain data to be encrypted
* @retval 0 finish Encryption/Decryption successfully
* @retval -1 Error
* @note this function should be used for Encryption & Decryption both For the Encryption, the plain @data
* will be replaced by the encrypted output, and vice versa;
*/
int rc4(const u8 *key, size_t keylen, u8 *data, size_t data_len);
/**
* @brief MD5 hash for data vector
* @param[in] addr Pointers to the data area
* @param[in] len Lengths of the data block
* @param[in] mac Buffer for the hash (16 bytes)
* @retval 0 finish caculation successfully
* @retval -1 Error
* @note
*/
int md5(const u8 *addr, int len, u8 *mac);
/**
* @brief HMAC-MD5 over data buffer (RFC 2104)
* @param[in] key Key for HMAC operations
* @param[in] keylen Length of the key in bytes
* @param[in] data data to be caculated
* @param[in] data_len Lengths of the data block
* @param[in] mac Buffer for the hash (16 bytes)
* @retval 0 finish caculation successfully
* @retval -1 Error
* @note
*/
int hmac_md5(const u8 *key, size_t key_len, const u8 *data, size_t data_len, u8 *mac);
/**
* @brief SHA1 hash for data vector
* @param[in] addr Pointers to the data area
* @param[in] len Lengths of the data block
* @param[in] mac Buffer for the hash (16 bytes)
* @retval 0 finish caculation successfully
* @retval -1 Error
* @note
*/
int sha1(const u8 *addr, int len, u8 *mac);
#endif
sdk/Include/App/wm_dhcp_server.h
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/**
* @file wm_dhcp_server.h
*
* @brief DHCP SERVER
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_DHCP_SERVER_H
#define WM_DHCP_SERVER_H
/**
* @defgroup APP_APIs APP APIs
* @brief APP APIs
*/
/**
* @addtogroup APP_APIs
* @{
*/
/**
* @defgroup DHCPS_APIs DHCPS APIs
* @brief DHCP server APIs
*/
/**
* @addtogroup DHCPS_APIs
* @{
*/
/**
* @brief This function is used to start DHCP Server for a network
interface
*
* @param None
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
s8 tls_dhcps_start(void);
/**
* @brief This function is used to stop DHCP server
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_dhcps_stop(void);
/**
* @brief This function is used to get station's IP address by
MAC address
*
* @param[in] *mac STA's MAC address
*
* @retval ip_addr STA's IP address
* @retval NULL Not found match IP with MAC address
*
* @note None
*/
ip_addr_t *tls_dhcps_getip(const u8 *mac);
/**
* @brief This function is used to set DHCP server's DNS address
*
* @param[in] numdns the index of the DNS server to set must be 0 or 1
*
* @return None
*
* @note None
*/
void tls_dhcps_setdns(u8 numdns);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_DHCP_SERVER_H */
sdk/Include/App/wm_dlna_dmr.h
+247
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/**
* @file wm_dlna_dmr.h
*
* @brief DLNA DMR API
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM__DLNA_DMR_H_
#define __WM__DLNA_DMR_H_
enum dmr_control_type
{
CONTROL_GET = 0,
CONTROL_SET
};
/**
* @brief This Function prototype for action callback functions
*
* @param[in] None
*
* @return None
*
* @note None
*/
typedef void (*dmr_action_callback)(void);
/**
* @brief This Function prototype for control callback functions
*
* @param[in] type to get or set control
* @param[in] channel the channel to control
* @param[in] value the value of getting or wanting to set
*
* @return None
*
* @note None
*/
typedef void (*dmr_control_callback)(enum dmr_control_type type, const char* channel, int* value);
/**
* @brief This Function prototype for getting the playing progress
*
* @param[in] totlen The total length of the playing media
*
* @returns the progress(0.0 ~ 1.0) of having been played
*
* @note None
*/
typedef float (*dmr_play_progress_callback)(int totlen);
/**
* @brief This Function prototype for downloading media data finis-
hed
*
* @param[in] buf The downloaded data this time
* @param[in] datalen The length of buffer data
*
* @retval None
*
* @note None
*/
typedef void (*dmr_download_finish_callback)(char * buf, int datalen);
/**
* @defgroup APP_APIs APP APIs
* @brief APP APIs
*/
/**
* @addtogroup APP_APIs
* @{
*/
/**
* @defgroup DLNA_APIs DLNA APIs
* @brief DLNA DMR APIs
*/
/**
* @addtogroup DLNA_APIs
* @{
*/
/**
* @brief This function is used to register play callback which would
be called while starting to play
*
* @param[in] callback the play callback
*
* @return None
*
* @note None
*/
void tls_dmr_set_play_callback(dmr_action_callback callback);
/**
* @brief This function is used to register stop callback which would
be called while to stop
*
* @param[in] callback the stop callback
*
* @return None
*
* @note None
*/
void tls_dmr_set_stop_callback(dmr_action_callback callback);
/**
* @brief This function is used to register seek callback which would
be called while to seek
*
* @param[in] callback the seek callback
*
* @return None
*
* @note None
*/
void tls_dmr_set_seek_callback(dmr_action_callback callback);
/**
* @brief This function is used to register pause callback which
would be called while to pause
*
* @param[in] callback the pause callback
*
* @return None
*
* @note None
*/
void tls_dmr_set_pause_callback(dmr_action_callback callback);
/**
* @brief This function is used to register play progress callback
which would be called while to get play progress
*
* @param[in] callback the play progress callback
*
* @return None
*
* @note None
*/
void tls_dmr_set_play_progress_callback(dmr_play_progress_callback callback);
/**
* @brief This function is used to register mute control callback
which would be called while to get or set mute control
*
* @param[in] callback the mute control callback
*
* @return None
*
* @note None
*/
void tls_dmr_set_mute_callback(dmr_control_callback callback);
/**
* @brief This function is used to register volume control callback
which would be called while to get or set volume control
*
* @param[in] callback the volume control callback
*
* @return None
*
* @note None
*/
void tls_dmr_set_volume_callback(dmr_control_callback callback);
/**
* @brief This function is used to register volumedb control callback
which would be called while to get or set volumedb
control
*
* @param[in] callback the volumedb control callback
*
* @return None
*
* @note None
*/
void tls_dmr_set_volumedb_callback(dmr_control_callback callback);
/**
* @brief This function is used to register loudness control callback
which would be called while to get or set loudness
control
*
* @param[in] callback the loudness control callback
*
* @return None
*
* @note None
*/
void tls_dmr_set_loudness_callback(dmr_control_callback callback);
/**
* @brief This function is used to initialize the media render
*
* @param[in] *friendly_name friendly name of the media render
* @param[in] *uuid uuid of the media render
*
* @retval 0 success
* @retval minus failed
*
* @note None
*/
int tls_dmr_init(const char *friendly_name, const char *uuid);
/**
* @brief This function is uesd to destroy the media render
*
* @param[in] None
*
* @retval 0 success
* @retval minus failed
*
* @note None
*/
int tls_dmr_destroy(void);
/**
* @brief This function is used to trigger to download data from media
server, the download_callback would be called when
downloading finished
*
* @param[in] dest Destination address to download data
* @param[in] downsize download size of this time
* @param[in] download_callback download finished callback
*
* @retval 0 success
* @retval minus failed
*
* @note None
*/
int tls_dmr_download_data(char * dest, int downsize, dmr_download_finish_callback download_callback);
/**
* @}
*/
/**
* @}
*/
#endif /* __WM__DLNA_DMR_H_ */
sdk/Include/App/wm_dns_server.h
+66
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/**
* @file wm_dns_server.h
*
* @brief DNS SERVER
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_DNS_SERVER_H
#define WM_DNS_SERVER_H
/**
* @defgroup APP_APIs APP APIs
* @brief APP APIs
*/
/**
* @addtogroup APP_APIs
* @{
*/
/**
* @defgroup DNSS_APIs DNSS APIs
* @brief DNS server APIs
*/
/**
* @addtogroup DNSS_APIs
* @{
*/
/**
* @brief This function is used to start DNS service
*
* @param[in] *dnsname Specify the server's dns name
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
s8 tls_dnss_start(u8 *dnsname);
/**
* @brief This function is used to stop DNS service
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_dnss_stop(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_DNS_SERVER_H */
sdk/Include/App/wm_http_client.h
+486
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/**
* @file wm_http_client.h
*
* @brief Http client APIs
*
* @author wanghf
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_HTTP_CLIENT_H
#define WM_HTTP_CLIENT_H
#include "wm_config.h"
#include "wm_type_def.h"
#ifdef BOOL
#undef BOOL
#endif
#ifdef UCHAR
#undef UCHAR
#endif
#ifdef CHAR
#undef CHAR
#endif
#ifdef UINT16
#undef UINT16
#endif
#ifdef INT16
#undef INT16
#endif
#ifdef UINT32
#undef UINT32
#endif
#ifdef INT32
#undef INT32
#endif
#ifdef UINT64
#undef UINT64
#endif
#ifdef INT64
#undef INT64
#endif
#ifdef ULONG
#undef ULONG
#endif
#ifdef LONG
#undef LONG
#endif
#define VOID void
typedef int BOOL;
typedef unsigned char UCHAR;
//typedef signed char CHAR;
typedef char CHAR;
typedef unsigned short UINT16;
typedef signed short INT16;
typedef unsigned int UINT32;
typedef signed int INT32;
typedef unsigned long long UINT64;
typedef long long INT64;
typedef unsigned long ULONG;
typedef signed long LONG;
/* HTTP Status, API Return codes */
/** HTTP Success status */
#define HTTP_CLIENT_SUCCESS 0
/** Unknown error */
#define HTTP_CLIENT_UNKNOWN_ERROR 1
/** an Invalid handle or possible bad pointer was passed to a function */
#define HTTP_CLIENT_ERROR_INVALID_HANDLE 2
/** Buffer too small or a failure while in memory allocation */
#define HTTP_CLIENT_ERROR_NO_MEMORY 3
/** an attempt to use an invalid socket handle was made */
#define HTTP_CLIENT_ERROR_SOCKET_INVALID 4
/** Can't send socket parameters */
#define HTTP_CLIENT_ERROR_SOCKET_CANT_SET 5
/** Error while resolving host name */
#define HTTP_CLIENT_ERROR_SOCKET_RESOLVE 6
/** Error while connecting to the remote server */
#define HTTP_CLIENT_ERROR_SOCKET_CONNECT 7
/** socket time out error */
#define HTTP_CLIENT_ERROR_SOCKET_TIME_OUT 8
/** Error while receiving data */
#define HTTP_CLIENT_ERROR_SOCKET_RECV 9
/** Error while sending data */
#define HTTP_CLIENT_ERROR_SOCKET_SEND 10
/** Error while receiving the remote HTTP headers */
#define HTTP_CLIENT_ERROR_HEADER_RECV 11
/** Could not find element within header */
#define HTTP_CLIENT_ERROR_HEADER_NOT_FOUND 12
/** The headers search clue was too large for the internal API buffer */
#define HTTP_CLIENT_ERROR_HEADER_BIG_CLUE 13
/** No content length was specified for the outgoing data. the caller should
specify chunking mode in the session creation */
#define HTTP_CLIENT_ERROR_HEADER_NO_LENGTH 14
/** The HTTP chunk token that was received from the server was too big and possibly wrong */
#define HTTP_CLIENT_ERROR_CHUNK_TOO_BIG 15
/** Could not authenticate with the remote host */
#define HTTP_CLIENT_ERROR_AUTH_HOST 16
/** Could not authenticate with the remote proxy */
#define HTTP_CLIENT_ERROR_AUTH_PROXY 17
/** Bad or not supported HTTP verb was passed to a function */
#define HTTP_CLIENT_ERROR_BAD_VERB 18
/** a function received a parameter that was too large */
#define HTTP_CLIENT_ERROR_LONG_INPUT 19
/** The session state prevents the current function from proceeding */
#define HTTP_CLIENT_ERROR_BAD_STATE 20
/** Could not parse the chunk length while in chunked transfer */
#define HTTP_CLIENT_ERROR_CHUNK 21
/** Could not parse curtail elements from the URL (such as the host name, HTTP prefix act') */
#define HTTP_CLIENT_ERROR_BAD_URL 22
/** Could not detect key elements in the received headers */
#define HTTP_CLIENT_ERROR_BAD_HEADER 23
/** Error while attempting to resize a buffer */
#define HTTP_CLIENT_ERROR_BUFFER_RSIZE 24
/** Authentication schema is not supported */
#define HTTP_CLIENT_ERROR_BAD_AUTH 25
/** The selected authentication schema does not match the server response */
#define HTTP_CLIENT_ERROR_AUTH_MISMATCH 26
/** an element was missing while parsing the digest authentication challenge */
#define HTTP_CLIENT_ERROR_NO_DIGEST_TOKEN 27
/** Digest algorithem could be MD5 or MD5-sess other types are not supported */
#define HTTP_CLIENT_ERROR_NO_DIGEST_ALG 28
/** Binding error */
#define HTTP_CLIENT_ERROR_SOCKET_BIND 29
/** Tls negotiation error */
#define HTTP_CLIENT_ERROR_TLS_NEGO 30
/** Feature is not (yet) implemented */
#define HTTP_CLIENT_ERROR_NOT_IMPLEMENTED 64
/** HTTP end of stream message */
#define HTTP_CLIENT_EOS 1000
// HTTP Session flags (Public flags)
#define HTTP_CLIENT_FLAG_KEEP_ALIVE 0x00000001 // Set the keep alive header
#define HTTP_CLIENT_FLAG_SEND_CHUNKED 0x00000002 // The outgoing should chunked
#define HTTP_CLIENT_FLAG_NO_CACHE 0x00000004 // Set the no cache header
#define HTTP_CLIENT_FLAG_ASYNC 0x00000008 // Currently not implemented
#define HTTP_CLIENT_FLAG_MULTIPART_FORM 0x00000010 // The outgoing should multipart/form-data
// HTTP Type Definitions
typedef UINT32 HTTP_SESSION_HANDLE;
typedef UINT32 HTTP_CLIENT_SESSION_FLAGS;
/******************************************************************************
*
* Section : HTTP API structures
*
******************************************************************************/
/* HTTP Type Definitions */
/** http seesion handle */
typedef u32 tls_http_session_handle_t;
/** http seesion flags */
typedef u32 tls_http_session_flags_t;
/** HTTP Supported authentication methods */
typedef enum _HTTP_AUTH_SCHEMA
{
AuthSchemaNone = 0,
AuthSchemaBasic,
AuthSchemaDigest,
AuthSchemaKerberos,
AuthNotSupported
} HTTP_AUTH_SCHEMA;
/** HTTP supported verbs */
typedef enum _HTTP_VERB
{
VerbGet = 0,
VerbHead,
VerbPost,
VerbPut,
VerbFwup,
VerbNotSupported
// Note: others verb such as connect and put are currently not supported
} HTTP_VERB;
/** Data structure that the caller can request at any time that will include
some information regarding the session */
typedef struct _HTTP_CLIENT
{
UINT32 HTTPStatusCode; // HTTP Status code (200 OK)
UINT32 RequestBodyLengthSent; // Total bytes sent (body only)
UINT32 ResponseBodyLengthReceived; // Total bytes received (body only)
UINT32 TotalResponseBodyLength; // as extracted from the “content-length" header
UINT32 HttpState;
} HTTP_CLIENT;
/** HTTP parameters */
typedef struct _HTTPParameters
{
CHAR* Uri;
CHAR* ProxyHost;
UINT32 UseProxy ;
UINT32 ProxyPort;
UINT32 Verbose;
CHAR* UserName;
CHAR* Password;
HTTP_AUTH_SCHEMA AuthType;
} HTTPParameters;
#if TLS_CONFIG_HTTP_CLIENT_TASK
/** the callback function of http clent for received */
typedef void (*http_client_recv_callback_fn)(HTTP_SESSION_HANDLE pSession, CHAR * data, UINT32 totallen, UINT32 datalen);
/** the callback function of http clent for err */
typedef void (*http_client_err_callback_fn)(HTTP_SESSION_HANDLE pSession, int err);
/** message of the http client */
typedef struct _http_client_msg
{
HTTP_SESSION_HANDLE pSession;
HTTPParameters param;
HTTP_VERB method;
CHAR* sendData;
UINT32 dataLen;
http_client_recv_callback_fn recv_fn;
http_client_err_callback_fn err_fn;
} http_client_msg;
#endif
/**
* @defgroup APP_APIs APP APIs
* @brief APP APIs
*/
/**
* @addtogroup APP_APIs
* @{
*/
/**
* @defgroup HTTPC_APIs HTTPC APIs
* @brief HTTP client APIs
*/
/**
* @addtogroup HTTPC_APIs
* @{
*/
/******************************************************************************
*
* Section : HTTP API public interface
*
******************************************************************************/
/**
* @brief Allocate memory for a new HTTP Session
*
* @param[in] Flags HTTP Session internal API flags, 0 should be passed here
*
* @retval 0 failed
* @retval other HTTP Session handle
*
* @note None
*/
HTTP_SESSION_HANDLE HTTPClientOpenRequest (HTTP_CLIENT_SESSION_FLAGS Flags);
/**
* @brief Closes the active connection and free the corresponding memory
*
* @param[in] *pSession HTTP Session handle
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientCloseRequest (HTTP_SESSION_HANDLE *pSession);
/**
* @brief Sets the HTTP authentication schema
*
* @param[in] pSession HTTP Session handle
* @param[in] AuthSchema HTTP Supported authentication methods
* @param[in] *pReserved Reserved parameter
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientSetAuth (HTTP_SESSION_HANDLE pSession, HTTP_AUTH_SCHEMA AuthSchema, void *pReserved);
/**
* @brief Sets credentials for the target host
*
* @param[in] pSession HTTP Session handle
* @param[in] *pUserName User name
* @param[in] *pPassword Password
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientSetCredentials (HTTP_SESSION_HANDLE pSession, CHAR *pUserName, CHAR *pPassword);
/**
* @brief Sets all the proxy related parameters
*
* @param[in] pSession HTTP Session handle
* @param[in] *pProxyName The host name
* @param[in] nPort The proxy port number
* @param[in] *pUserName User name for proxy authentication (can be null)
* @param[in] *pPassword User password for proxy authentication (can be null)
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientSetProxy (HTTP_SESSION_HANDLE pSession, CHAR *pProxyName, UINT16 nPort, CHAR *pUserName, CHAR *pPassword);
/**
* @brief Sets the HTTP verb for the outgoing request
*
* @param[in] pSession HTTP Session handle
* @param[in] HttpVerb HTTP supported verbs
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientSetVerb (HTTP_SESSION_HANDLE pSession, HTTP_VERB HttpVerb);
/**
* @brief Add headers into the outgoing request
*
* @param[in] pSession HTTP Session
* @param[in] *pHeaderName The Header name
* @param[in] *pHeaderData The header data
* @param[in] nInsert Reserved, could be any
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientAddRequestHeaders (HTTP_SESSION_HANDLE pSession, CHAR *pHeaderName, CHAR *pHeaderData, BOOL nInsert);
/**
* @brief This function builds the request headers, performs a DNS resolution,
* opens the connection (if it was not opened yet by a previous request
* or if it has closed) and sends the request headers
*
* @param[in] pSession HTTP Session handle
* @param[in] *pUrl The requested URL
* @param[in] *pData Data to post to the server
* @param[in] nDataLength Length of posted data
* @param[in] TotalLength Valid only when http method is post
* TRUE: Post data to http server.
* FALSE: In a post request without knowing the total
* length in advance so return error or use chunking.
* @param[in] nTimeout Operation timeout
* @param[in] nClientPort Client side port 0 for none
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientSendRequest (HTTP_SESSION_HANDLE pSession, CHAR *pUrl, VOID *pData, UINT32 nDataLength, BOOL TotalLength, UINT32 nTimeout,UINT32 nClientPort);
/**
* @brief Write data to the remote server
*
* @param[in] pSession HTTP Session handle
* @param[in] *pBuffer Data to write to the server
* @param[in] nBufferLength Length of wtitten data
* @param[in] nTimeout Timeout for the operation
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientWriteData (HTTP_SESSION_HANDLE pSession, VOID *pBuffer, UINT32 nBufferLength, UINT32 nTimeout);
/**
* @brief Receives the response header on the connection and parses it.
* Performs any required authentication.
*
* @param[in] pSession HTTP Session handle
* @param[in] nTimeout Timeout for the operation
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientRecvResponse (HTTP_SESSION_HANDLE pSession, UINT32 nTimeout);
/**
* @brief Read data from the server. Parse out the chunks data
*
* @param[in] pSession HTTP Session handle
* @param[out] *pBuffer A pointer to a buffer that will be filled with the servers response
* @param[in] nBytesToRead The size of the buffer (numbers of bytes to read)
* @param[in] nTimeout Operation timeout in seconds
* @param[out] *nBytesRecived Count of the bytes that were received in this operation
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientReadData (HTTP_SESSION_HANDLE pSession, VOID *pBuffer, UINT32 nBytesToRead, UINT32 nTimeout, UINT32 *nBytesRecived);
/**
* @brief Fill the users structure with the session information
*
* @param[in] pSession HTTP Session handle
* @param[out] *HTTPClient The session information
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientGetInfo (HTTP_SESSION_HANDLE pSession, HTTP_CLIENT *HTTPClient);
/**
* @brief Initiate the headr searching functions and find the first header
*
* @param[in] pSession HTTP Session handle
* @param[in] *pSearchClue Search clue
* @param[out] *pHeaderBuffer A pointer to a buffer that will be filled with the header name and value
* @param[out] *nLength Count of the bytes that were received in this operation
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientFindFirstHeader (HTTP_SESSION_HANDLE pSession, CHAR *pSearchClue,CHAR *pHeaderBuffer, UINT32 *nLength);
/**
* @brief Find the next header.
*
* @param[in] pSession HTTP Session handle
* @param[out] *pHeaderBuffer A pointer to a buffer that will be filled with the header name and value
* @param[out] *nLength Count of the bytes that were received in this operation
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientGetNextHeader (HTTP_SESSION_HANDLE pSession, CHAR *pHeaderBuffer, UINT32 *nLength);
/**
* @brief Terminate a headers search session
*
* @param[in] pSession HTTP Session handle
*
* @retval HTTP_CLIENT_SUCCESS success
* @retval other failed
*
* @note None
*/
UINT32 HTTPClientFindCloseHeader (HTTP_SESSION_HANDLE pSession);
#if TLS_CONFIG_HTTP_CLIENT_TASK
/**
* @brief initialize task of the http client
*
* @param None
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int http_client_task_init(void);
/**
* @brief post message to the task of http client
*
* @param[in] msg pointer to the message
*
* @retval ERR_OK success
* @retval other failed
*
* @note None
*/
int http_client_post(http_client_msg * msg);
#endif /* TLS_CONFIG_HTTP_CLIENT_TASK */
/**
* @}
*/
/**
* @}
*/
#endif /* WM_HTTP_CLIENT_H */
sdk/Include/App/wm_netif.h
+15
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@@ -0,0 +1,15 @@
/**
* @file wm_netif.h
*
* @brief ETHERNET INIT Interface
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_NETIF_H
#define WM_NETIF_H
#include "wm_config.h"
#include "wm_netif2.0.3.h"
#endif /* WM_NETIF_H */
sdk/Include/App/wm_netif2.0.3.h
+400
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@@ -0,0 +1,400 @@
/**
* @file wm_netif2.0.3.h
*
* @brief netif203 module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_NETIF2_0_3_H
#define WM_NETIF2_0_3_H
#include "wm_config.h"
#include "wm_type_def.h"
#include "wm_sockets.h"
#include "wm_wifi.h"
#include "wm_params.h"
/** MACRO for callback EVENT to join AP or create soft-AP successfully */
#define NETIF_WIFI_JOIN_SUCCESS 0x1
/** MACRO for callback EVENT to fail to join AP */
#define NETIF_WIFI_JOIN_FAILED 0x2
/** MACRO for callback EVENT to disconnect from AP or destroy soft-AP */
#define NETIF_WIFI_DISCONNECTED 0x3
/** MACRO for callbck EVENT to get IP address */
#define NETIF_IP_NET_UP 0x4
/** MACRO for callback EVNET to create AP successfully */
#define NETIF_WIFI_SOFTAP_SUCCESS 0x5
/** MACRO for callback EVNET to create soft-AP failed */
#define NETIF_WIFI_SOFTAP_FAILED 0x6
/** MACRO for callback EVNET to close soft-AP */
#define NETIF_WIFI_SOFTAP_CLOSED 0x7
/** MACRO for callback EVNET to inform soft ap's net */
#define NETIF_IP_NET2_UP 0x8
#define NETIF_IPV6_NET_UP 0x9
/** These are the values for ip_addr_t.type */
#define IPADDR_TYPE_V4 0U
#define IPADDR_TYPE_V6 6U
#define IPADDR_TYPE_ANY 46U
#define IPV6_ADDR_MAX_NUM 3
#if 0
struct ip_addr {
u32_t addr;
};
typedef struct ip_addr ip_addr_t;
#endif
#if 0
struct ip4_addr {
u32_t addr;
};
typedef struct ip4_addr ip4_addr_t;
struct ip6_addr {
u32_t addr[4];
};
typedef struct ip6_addr ip6_addr_t;
#if (TLS_CONFIG_IPV4 && TLS_CONFIG_IPV6)
typedef struct _ip_addr {
union {
ip6_addr_t ip6;
ip4_addr_t ip4;
} u_addr;
u8_t type;
} ip_addr_t;
#else
#if TLS_CONFIG_IPV4
typedef ip4_addr_t ip_addr_t;
#else
typedef ip6_addr_t ip_addr_t;
#endif
#endif
#endif
struct tls_ethif {
ip_addr_t ip_addr;
ip_addr_t netmask;
ip_addr_t gw;
#if TLS_CONFIG_IPV6
ip_addr_t ip6_addr[IPV6_ADDR_MAX_NUM];
#endif
ip_addr_t dns1;
ip_addr_t dns2;
u8 status; //0:net down; 1:net up
#if TLS_CONFIG_IPV6
u8 ipv6_status[IPV6_ADDR_MAX_NUM]; //0:net down; 1:net up
#endif
};
//type defination of netif status changed callback.
typedef void (*tls_netif_status_event_fn)(u8 status);
/**
* @brief This function is used to initialize TCP/IP Stack
*
* @param[in] None
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_ethernet_init(void);
/**
* @brief This function is used to get IP information stored in
tls_ethif struct
*
* @param[in] None
*
* @retval tls_ethif * Pointer to struct tls_ethif
*
* @note None
*/
struct tls_ethif * tls_netif_get_ethif(void);
/**
* @brief This function is used to set tls_ethif status
*
* @param[in] status net status, 0-up, 1-down
*
* @return None
*
* @note None
*/
void tls_netif_set_status(u8 status);
/**
* @brief This function is used to start DHCP Client
*
* @param[in] None
*
* @retval 0 success
* @retval Minus failed
*
* @note None
*/
err_t tls_dhcp_start(void);
/**
* @brief This function is used to stop DHCP client
*
* @param[in] None
*
* @retval 0 success
* @retval Minus failed
*
* @note None
*/
err_t tls_dhcp_stop(void);
/**
* @brief This function is used to change IP information
*
* @param[in] *ipaddr IP address
* @param[in] *netmask netmask
* @param[in] *gw default gateway
*
* @retval 0 success
* @retval Minus failed
*
* @note None
*/
err_t tls_netif_set_addr(ip_addr_t *ipaddr,
ip_addr_t *netmask,
ip_addr_t *gw);
/**
* @brief This function is used to set dns servers
*
* @param[in] numdns index of the DNS server to set
must be < DNS_MAX_SERVERS
* @param[in] *dnsserver IP address of the DNS server to set
*
* @return None
*
* @note None
*/
void tls_netif_dns_setserver(u8 numdns, ip_addr_t *dnsserver);
/**
* @brief This function is used to bring up an interface,available
for processing traffic
*
* @param[in] None
*
* @retval 0 success
* @retval Minus failed
*
* @note None
*/
err_t tls_netif_set_up(void);
/**
* @brief This function is used to bring down an interface,disabling
any traffic processing
*
* @param[in] None
*
* @retval 0 success
* @retval Minus failed
*
* @note None
*/
err_t tls_netif_set_down(void);
/**
* @brief This function is used to add netif status changed callback
to event list,if exists, do nothing
*
* @param[in] event_fn pointer to tls_netif_status_event_fn
*
* @retval 0 success
* @retval Minus failed
*
* @note None
*/
err_t tls_netif_add_status_event(tls_netif_status_event_fn event_fn);
/**
* @brief This function is used to remove netif status changed
callback function from event list,if not exists, do nothing
*
* @param[in] event_fn pointer to tls_netif_status_event_fn
*
* @retval 0 success
* @retval Minus failed
*
* @note None
*/
err_t tls_netif_remove_status_event(tls_netif_status_event_fn event_fn);
struct netif *tls_get_netif(void);
#if TLS_CONFIG_AP
/**
* @brief Start DHCP Server for a network interface
* *
* @retval DHCPS_ERR_SUCCESS - No error
* @retval DHCPS_ERR_MEM - Out of memory
* @retval DHCPS_ERR_LINKDOWN - The NI is inactive
*
* @note None
*/
INT8S tls_dhcps_start(void);
/**
* @brief This function is used to stop DHCP Server
*
* @param[in] None
*
* @retval None
*
* @note None
*/
void tls_dhcps_stop(void);
/**
* @brief Start the dns server's service
* *
* @retval DHCPS_ERR_SUCCESS - No error
* @retval DHCPS_ERR_MEM - Out of memory
* @retval DHCPS_ERR_LINKDOWN - The NI is inactive
* @retval DNSS_ERR_PARAM - Input parameter error
*
* @note None
*/
INT8S tls_dnss_start(INT8U * DnsName);
/**
* @brief Stop the dns server's service
*
* @param[in] None
*
* @retval None
*
* @note None
*/
void tls_dnss_stop(void);
/**
* @brief Get station's ip address by mac address
*
* @param[in] mac station's mac address
*
* @retval ip_addr station's ip address
*
* @note None
*/
ip_addr_t *tls_dhcps_getip(const u8_t *mac);
/**
* @brief Get station's mac address by ip address
*
* @param[in] ip station's ip address
*
* @retval u8* station's mac address
*
* @note None
*/
u8 *tls_dhcps_getmac(const ip_addr_t *ip);
#endif //TLS_CONFIG_AP
#if TLS_CONFIG_RMMS
/**
* @brief Start remote manager server.
* *
* @retval DHCPS_ERR_SUCCESS - No error
* @retval DHCPS_ERR_MEM - Out of memory
* @retval DHCPS_ERR_LINKDOWN - The NIF is inactive
*
* @note None
*/
INT8S tls_rmms_start(void);
/**
* @brief Disable remote manager server
*
* @param[in] None
*
* @retval None
*
* @note None
*/
void tls_rmms_stop(void);
#endif
#if TLS_CONFIG_AP
/**
* @brief This is used to bring up an interface for APSTA,available
for processing traffic
*
* @param[in] None
*
* @retval 0 success
* @retval Minus failed
*
* @note Can only be used at APSTA mode
*/
err_t tls_netif2_set_up(void);
/**
* @brief This function is used to bring down an interface for APSTA, disabling
any traffic processing
*
* @param[in] None
*
* @retval 0 success
* @retval Minus failed
*
* @note Can only be used at APSTA mode
*/
err_t tls_netif2_set_down(void);
/**
* @brief This function is used to change IP information for
a network interface for APSTA
*
* @param[in] *ipaddr IP address
* @param[in] *netmask netmask
* @param[in] *gw default gateway
*
* @retval 0 success
* @retval Minus failed
*
* @note Can only be used at APSTA mode
*/
err_t tls_netif2_set_addr(ip_addr_t *ipaddr,
ip_addr_t *netmask,
ip_addr_t *gw);
/***************************************************************************
* Function: tls_dhcps_setdns
* Description: Set dhcp server's dns address.
*
* Input: numdns: the index of the DNS server to set must be less than DNS_MAX_SERVERS
*
* Output: None
*
* Return: None
*
* Date : 2015-3-10
****************************************************************************/
/**
* @brief Set dhcp server's dns address
*
* @param[in] numdns the index of the DNS server to set must be less than DNS_MAX_SERVERS
*
* @retval None
*
* @note Can only be used at APSTA mode
*/
void tls_dhcps_setdns(u8_t numdns);
#endif
#endif //WM_NETIF_H
sdk/Include/App/wm_ntp.h
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/**
* @file wm_ntp.h
*
* @brief ntp module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_NTP_H
#define WM_NTP_H
#include "wm_type_def.h"
/**
* @defgroup APP_APIs APP APIs
* @brief APP APIs
*/
/**
* @addtogroup APP_APIs
* @{
*/
/**
* @defgroup NTP_APIs NTP APIs
* @brief NTP APIs
*/
/**
* @addtogroup NTP_APIs
* @{
*/
/**
* @brief This function is used to get network time.
*
* @param None
*
* @retval time value
*
* @note None
*/
u32 tls_ntp_client(void);
/**
* @brief This function is used to set ntp servers.
*
* @param[in] *ipaddr xxx.xxx.xxx.xxx
* @param[in] server_no max num is three
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_ntp_set_server(char *ipaddr, int server_no);
/**
* @brief This function is used to query params of the ntp servers
*
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_ntp_query_sntpcfg(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_NTP_H */
sdk/Include/App/wm_webserver.h
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/**
* @file wm_webserver.h
*
* @brief WEB SERVER
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __WEBSERVER_H__
#define __WEBSERVER_H__
/**
* @defgroup APP_APIs APP APIs
* @brief APP APIs
*/
/**
* @addtogroup APP_APIs
* @{
*/
/**
* @defgroup WEB_APIs WEB APIs
* @brief WEB server APIs
*/
/**
* @addtogroup WEB_APIs
* @{
*/
/**
* @brief This function is used to start WEB SERVER service
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_webserver_init(void);
/**
* @brief This function is used to deinit WEB SERVER service
*
* @param[in] None
*
* @return None
*
* @note None
*/
void httpd_deinit(void);
/**
* @}
*/
/**
* @}
*/
#endif /*__WEBSERVER_H__*/
sdk/Include/App/wm_wifi_oneshot.h
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/**
* @file wm_wifi_oneshot.h
*
* @brief Wi-Fi OneShot
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_WIFI_ONESHOT_H
#define WM_WIFI_ONESHOT_H
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wm_type_def.h>
#if (GCC_COMPILE==1)
#include "wm_ieee80211_gcc.h"
#else
#include <wm_ieee80211.h>
#endif
#include "wm_config.h"
/** DEBUG USE MAC FILTER START */
#define CONFIG_ONESHOT_MAC_FILTER 0
extern int tls_filter_module_srcmac(u8 *mac);
/** after onshot configuration, add random time to connect Wi-Fi */
#define CONFIG_CONNECT_RANDOMTIME_AFTER_ONESHOT 0
#define ONESHOT_ON 1
#define ONESHOT_OFF 0
/* ONE SHOT */
/** UDP MULTICAST ONE SHOT */
#define TLS_CONFIG_UDP_ONE_SHOT ONESHOT_OFF
/** JD ONESHOT */
#define TLS_CONFIG_UDP_JD_ONESHOT (ONESHOT_OFF&& TLS_CONFIG_UDP_ONE_SHOT)
/** WinnerMicro ONSHOT */
#define TLS_CONFIG_UDP_LSD_ONESHOT (ONESHOT_OFF&& TLS_CONFIG_UDP_ONE_SHOT)
#define TLS_CONFIG_UDP_LSD_SPECIAL (ONESHOT_OFF&& TLS_CONFIG_UDP_ONE_SHOT)
#define TLS_CONFIG_ONESHOT_DELAY_SPECIAL ONESHOT_OFF
/** AP ONESHOT */
#define TLS_CONFIG_AP_MODE_ONESHOT (ONESHOT_OFF&&TLS_CONFIG_AP)
#define TLS_CONFIG_WEB_SERVER_MODE (CFG_OFF&&TLS_CONFIG_AP_MODE_ONESHOT)
#define TLS_CONFIG_SOCKET_MODE (CFG_OFF &&TLS_CONFIG_AP_MODE_ONESHOT && TLS_CONFIG_SOCKET_RAW)
/** AIRKISS ONESHOT */
#define TLS_CONFIG_AIRKISS_MODE_ONESHOT (ONESHOT_OFF && TLS_CONFIG_UDP_ONE_SHOT)
#define AIRKISS_USE_SELF_WRITE 0
typedef enum{
ONESHOT_SCAN_START,
ONESHOT_SCAN_FINISHED,
ONESHOT_SWITCH_CHANNEL,
ONESHOT_STOP_TMP_CHAN_SWITCH,
ONESHOT_STOP_CHAN_SWITCH,
ONESHOT_HANDSHAKE_TIMEOUT,
ONESHOT_RECV_TIMEOUT,
ONESHOT_RECV_ERR,
ONESHOT_STOP_DATA_CLEAR,
ONESHOT_NET_UP,
AP_SOCK_S_MSG_SOCKET_RECEIVE_DATA,
AP_WEB_S_MSG_RECEIVE_DATA,
AP_SOCK_S_MSG_SOCKET_CREATE,
AP_SOCK_S_MSG_WJOIN_FAILD,
}ONESHOT_MSG_ENUM;
/**
* @defgroup APP_APIs APP APIs
* @brief APP APIs
*/
/**
* @addtogroup APP_APIs
* @{
*/
/**
* @defgroup Oneshot_APIs Oneshot APIs
* @brief Wi-Fi oneshot APIs
*/
/**
* @addtogroup Oneshot_APIs
* @{
*/
/**
* @brief Handle wild packets coming from the air.
*
* @param[in] *hdr point to ieee80211 data header
* @param[in] data_len data len of ieee80211 data
*
* @retval no mean
*
* @note None
*/
u8 tls_wifi_dataframe_recv(struct ieee80211_hdr *hdr, u32 data_len);
#if TLS_CONFIG_AIRKISS_MODE_ONESHOT
/**
* @brief This function is used to acknowledge app when airkiss process is done.
*
* @param[in] None
*
* @return None
*
* @note None
*/
void oneshot_airkiss_send_reply(void);
/**
* @brief This function is used to deal with airkiss's
wild packet
*
* @param[in] *data ieee80211 packet
* @param[in] data_len packet length
*
* @return None
*
* @note None
*/
void tls_airkiss_recv(u8 *data, u16 data_len);
/**
* @brief This function is used to start airkiss
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_airkiss_start(void);
/**
* @brief This function is used to stop airkiss
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_airkiss_stop(void);
/**
* @brief This function is used to change channel for airkiss
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_oneshot_airkiss_change_channel(void);
#endif /*TLS_CONFIG_AIRKISS_MODE_ONESHOT*/
/**
* @brief This function is used to init oneshot task
*
* @param[in] None
*
* @return None
*
* @note Not in use now
*/
int wm_oneshot_task_init(void);
/**
* @brief This function is used to stop oneshot timer
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_oneshot_switch_channel_tim_stop(struct ieee80211_hdr *hdr);
/**
* @brief This function is used to stop oneshot temp timer
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_oneshot_switch_channel_tim_temp_stop(void);
/**
* @brief Judge bssid&ssid if match
*
* @param[in] *ssid ssid to be compared
* @param[in] ssid_len ssid length
* @param[in] bssid bssid to be compared
*
* @retval 1: bssid&ssid match
* @retval 0: bssid&ssid not match
*
* @note None
*/
int tls_oneshot_is_ssid_bssid_match(u8 *ssid, u8 ssid_len, u8 *bssid);
/**
* @brief Find channel according to ssid
*
* @param[in] *ssid ssid to be compared
* @param[in] ssid_len ssid length
* @param[out] chlist chlist to be add according to ssid info
*
* @retval None
*
* @note None
*/
void tls_oneshot_find_chlist(u8 *ssid, u8 ssid_len, u16 *chlist);
/**
* @}
*/
void wm_oneshot_netif_status_event(u8 status );
/**
* @brief This function is used to set oneshot config mode.
*
* @param[in] flag, 0:one shot config
* 1:softap socket config
* 2:softap webserver config
* @param[out] None
*
* @retval None
*
* @note None
*/
void tls_wifi_set_oneshot_config_mode(u8 flag);
/**
* @brief This function is used to get oneshot config mode.
*
* @param[in] None
*
* @param[out] None
*
* @retval 0: one shot config
* 1: softap socket config
* 2: softap webserver config
*
* @note None
*/
u8 tls_wifi_get_oneshot_config_mode(void);
#if TLS_CONFIG_WEB_SERVER_MODE
/**
* @brief This function is used to send web config msg to oneshot task.
*
* @param[in] None
*
* @param[out] None
*
* @retval None
*
* @note None
*/
void tls_oneshot_send_web_connect_msg(void);
#endif
/**
* @}
*/
/**
* @}
*/
#endif /*WM_WIFI_ONESHOT_H*/
sdk/Include/Driver/wm_7816.h
+242
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/**************************************************************************//**
* @file wm_7816.h
* @author
* @version
* @date
* @brief
* @copyright (c) 2014 Winner Microelectronics Co., Ltd. All rights reserved.
*****************************************************************************/
#ifndef WM_7816_H_
#define WM_7816_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <string.h>
#include <stdbool.h>
#include "wm_regs.h"
#include "wm_type_def.h"
#include "wm_io.h"
#define WM_SC_RST_PIN WM_IO_PB_23 //(23)
#define WM_SC_PWR_PIN WM_IO_PB_29 //(29)
#define WM_SC_DEFAULT_FD (372)
typedef struct sc_io_map_ {
enum tls_io_name clk_pin_num;
uint32_t clk_opt;
enum tls_io_name io_pin_num;
uint32_t io_opt;
uint8_t initialed;
} sc_io_map;
extern sc_io_map sc_io;
/**
* @brief
* This function is used to config the pin in gpio or 7816 mode for the 7816 power on timing
*
* @param[in] mode : 1--gpio mode ; 0--7816 mode
*
* @retval
*/
void wm_sc_io_clk_config(uint8_t mode);
/**
* @brief
* close af to use as gpio
* @retval
*/
void wm_sc_powerInit(void);
/**
* @brief
* power on the 7816 device if power is controled by GPIO
* @retval
*/
void wm_sc_poweron(void);
/**
* @brief
* power off the 7816 device if power is controled by GPIO
* @retval
*/
void wm_sc_poweroff(void);
/**
* @brief
* drive the reset gpio in low level
* @retval
*/
void wm_sc_rst_low(void);
/**
* @brief
* driver the reset gpio in high level
* @retval
*/
void wm_sc_rst_high(void);
/**
* @brief
* hotrest the 7816 device obey the 7816-3 timing
* @retval
*/
void wm_sc_hotreset(void);
/**
* @brief
* colreset the 7816 device obey the 7816-3 timing
* @retval
*/
void wm_sc_colreset(void);
/**
* @brief
* deactive the 7816 device obey the 7816-3 timing
* @retval
*/
void wm_sc_deactive(void);
/**
* @brief
* This function is used to config the block guard time param in 7816 mode
* @param[in] bgt : the value of blcok guard time will be set
* @retval
*/
void wm_sc_set_bgt(uint8_t bgt);
/**
* @brief
* This function is used to config the tx retry count when detect err signal
* @param[in] count : the value of retry time will be set 7 for max
* @retval
*/
void wm_sc_tx_retry_times(uint8_t count);
/**
* @brief
* This function is used to config the rx retry count when detect parity error
* @param[in] count : the value of retry time will be set 7 for max
* @retval
*/
void wm_sc_rx_retry_times(uint8_t count);
/**
* @brief
* This function is used to config the etu param
* @param[in] etu : the value of etu will be set
* @retval
*/
void wm_sc_set_etu(uint16_t etu);
/**
* @brief
* This function config the module clock freq
* @param[in] freq : the value of clock freq
* @retval
*/
void wm_sc_set_frequency(uint32_t freq);
/**
* @brief
* config recv or not when parity error
* @param[in] bl : 1--- recv
* 0--- don't recv
* @retval
*/
static inline void wm_sc_parity_recv(bool bl)
{
tls_bitband_write(HR_UART2_LINE_CTRL, 9, bl);
}
/**
* @brief
* select the model in 7816 or uart function
* @param[in] bl : 1---7816 mode
* 0---uart mode
* @retval
*/
static inline void wm_sc_7816_mode(bool bl)
{
tls_bitband_write(HR_UART2_LINE_CTRL, 24, bl);
}
/**
* @brief
* This function is used to config the guard time param
* @param[in] bwt : the value of the guard time will be set
* @retval
*/
static inline void wm_sc_set_guardtime(uint8_t gt)
{
tls_reg_write32(HR_UART2_GUARD_TIME, gt);
}
/**
* @brief
* This function is used to config the CWT or BWT param
* @param[in] bwt : the value of CWT or BWT will be set
* @retval
*/
static inline void wm_sc_set_bcwt(uint32_t bwt)
{
bwt = (bwt > 0xFFFFFF) ? 0xFFFFFF : bwt;
tls_reg_write32(HR_UART2_WAIT_TIME, bwt);
}
/**
* @brief
* module errsignal int enable or disable
* @param[in] bl : 1---enable
* 0---disable
* @retval
*/
static inline void wm_sc_tx_errsignal_mask(bool bl)
{
tls_bitband_write(HR_UART2_INT_MASK, 9, bl);
}
/**
* @brief
* config the module protol
* @param[in] bl : 1--- T1 protocol
* 0--- T0 protocol
* @retval
*/
static inline void wm_sc_set_protocol(bool bl)
{
tls_bitband_write(HR_UART2_LINE_CTRL, 8, bl);
}
/**
* @brief
* get the module protol
* @retval
* 1--- T1 protocol
* 0--- T0 protocol
*/
static inline uint8_t wm_sc_get_protocol()
{
return tls_bitband_read(HR_UART2_LINE_CTRL, 8);
}
/**
* @brief
* smart card clock output enable or disable
* @param[in] bl : 0---enable;
* 1---disable;
* @retval
*/
static inline void wm_sc_clk_enable(bool bl)
{
tls_bitband_write(HR_UART2_LINE_CTRL, 10, bl);
}
#ifdef __cplusplus
}
#endif
#endif
sdk/Include/Driver/wm_adc.h
+297
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/**
* @file wm_adc.h
*
* @brief ADC Driver Module
*
* @author
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_ADC_H
#define WM_ADC_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_type_def.h"
/** ADC MACRO */
//每次启动dma之后，需要一段稳定时间，所以采集到的数据前面的12个byte不稳定，要舍去
#define ADC_DEST_BUFFER_DMA (u32)0x20028000
#define ADC_DEST_BUFFER_SIZE 65532
#define SAMPLE_NUM_PER_CHANNEL 20
#define CONFIG_ADC_CAL_OFFSET_TEMP12 (1<<23)
#define CONFIG_ADC_G_CTRL12 (1<<22)
#define CONFIG_ADC_CMP_POL (1<<21)
#define CONFIG_ADC_REF_SEL (1<<20)
#define CONFIG_ADC_BUF_BYPASS (1<<19)
#define CONFIG_ADC_DMA_MASK (0xFF<<11)
#define CONFIG_ADC_EN_CAL (1<<10)
#define CONFIG_ADC_INT_CMP (1<<9)
#define CONFIG_ADC_INT (1<<8)
#define CONFIG_ADC_CMP_INT_MASK (1<<7)
#define CONFIG_ADC_INT_MASK (1<<6)
#define CONFIG_ADC_TEMP_ON (1<<5)
#define CONFIG_ADC_START (1<<4)
#define CONFIG_ADC_CHL_MASK (0xF)
#define CONFIG_ADC_CHL_OFFSET (0x0E)
#define CONFIG_ADC_CHL_VOLT (0x0D)
#define CONFIG_ADC_CHL_TEMP (0x0C)
#define CONFIG_ADC_INPUT_CMP_VAL(n) ((n&0x3FFF)<<14)
#define CONFIG_ADC_VCM(n) (((u32)n&0x3F)<<26)
#define CONFIG_ADC_G_TEMP12(n) ((n&0x03)<<24)
#define ADC_INT_TYPE_ADC 0
#define ADC_INT_TYPE_DMA 1
#define ADC_INT_TYPE_ADC_COMP 2
#define ADC_REFERENCE_EXTERNAL 0 //外部参考
#define ADC_REFERENCE_INTERNAL 1 //内部参考
typedef struct adc_st{
u8 dmachannel;
void (*adc_cb)(u16 *buf, u16 len);
void (*adc_bigger_cb)(u16 *buf, u16 len);
void (*adc_dma_cb)(u16 *buf,u16 len);
u16 valuelen; /*dma 采样数据长度*/
u16 offset;
}ST_ADC;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup ADC_Driver_APIs ADC Driver APIs
* @brief ADC driver APIs
*/
/**
* @addtogroup ADC_Driver_APIs
* @{
*/
/**
* @brief This function is used to init ADC
*
* @param[in] ifusedma if use dma
* @param[in] dmachannel dma channel
*
* @return None
*
* @note If the requested dma channel is already used by other task, system will auto use other dma channel.
*/
void tls_adc_init(u8 ifusedma,u8 dmachannel);
/**
* @brief This function is used to register interrupt callback function
*
* @param[in] inttype interrupt type
* ADC_INT_TYPE_ADC adc interrupt,user get adc result from the callback function.
* ADC_INT_TYPE_DMA dma interrupt,dma transfer the adc result to the user's buffer.
* @param[in] callback interrupt callback function
*
* @return None
*
* @note None
*/
void tls_adc_irq_register(int inttype, void (*callback)(u16 *buf, u16 len));
/**
* @brief This function is used to clear the interrupt source
*
* @param[in] inttype interrupt type
* ADC_INT_TYPE_ADC adc interrupt,user get adc result from the callback function.
* ADC_INT_TYPE_DMA dma interrupt,dma transfer the adc result to the user's buffer.
* ADC_INT_TYPE_ADC_COMP adc compare with setting data
*
* @return None
*
* @note None
*/
void tls_adc_clear_irq(int inttype);
/**
* @brief This function is used to start adc,use dma for transfer data
*
* @param[in] channel adc channel,from 0 to 3 is single input;4 and 5 is differential input
*
* @param[in] length byte data length,is an integer multiple of half word,need <= 0x500
*
* @return None
*
* @note None
*/
void tls_adc_start_with_dma(int Channel, int Length);
/**
* @brief This function is used to start adc,use cpu
*
* @param[in] channel adc channel,from 0 to 3 is single input;4 and 5 is differential input
*
* @return None
*
* @note None
*/
void tls_adc_start_with_cpu(int Channel);
/**
* @brief This function is used to enable input buffer calibration
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_adc_enable_calibration_buffer_offset(void);
/**
* @brief This function is used to sample voltage using cpu
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_adc_voltage_start_with_cpu(void);
/**
* @brief This function is used to sample temperature using cpu
*
* @param[in] calenflag 1:enable calibration , 0: disable calibration
*
* @return None
*
* @note None
*/
void tls_adc_temp_offset_with_cpu(u8 calenflag);
/**
* @brief This function is used to read adc result
*
* @param[in] None
*
* @return The value of adc result
*
* @note The 14th bit of the return value is the symbol bit
*/
u16 tls_read_adc_result(void);
/**
* @brief This function is used to stop the adc
*
* @param[in] ifusedma 1:use dma, 0:not use dma
*
* @return None
*
* @note None
*/
void tls_adc_stop(int ifusedma);
/**
* @brief This function is used to config adc compare register
*
* @param[in] cmp_data compare data
*
* @param[in] cmp_pol compare polarity
*
* @return None
*
* @note None
*/
void tls_adc_config_cmp_reg(int cmp_data, int cmp_pol);
/**
* @brief This function is used to set adc reference source
*
* @param[in] ref
* ADC_REFERENCE_EXTERNAL
* ADC_REFERENCE_INTERNAL
*
* @return None
*
* @note None
*/
void tls_adc_reference_sel(int ref);
/**
* @brief This function is used to set clock division
*
* @param[in] div
*
* @return None
*
* @note None
*/
void tls_adc_set_clk(int div);
void signedToUnsignedData(u16 *adcValue, u16 *offset);
/**
* @brief This function is used to set buffer bypass
*
* @param[in] isset 1: buffer bypass, 0: buffer work
*
* @return None
*
* @note None
*/
void tls_adc_buffer_bypass_set(u8 isset);
/**
* @brief This function is used to start compare
*
* @param[in] Channel sample channel
*
* @param[in] cmp_data compare data
*
* @param[in] cmp_pol compare polarity
*
* @return None
*
* @note None
*/
void tls_adc_cmp_start(int Channel, int cmp_data, int cmp_pol);
u16 adc_get_offset(void);
u32 adc_get_interTemp(void);
u16 adc_get_inputVolt(u8 channel);
u16 adc_get_interVolt(void);
u32 adc_temp(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_ADC_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_cpu.h
+94
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/**
* @file wm_cpu.h
*
* @brief cpu driver module
*
* @author dave
*
* @copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_CPU_H
#define WM_CPU_H
#ifdef __cplusplus
extern "C" {
#endif
/** cpu clock: 80Mhz */
#define CPU_CLK_80M 0
/** cpu clock: 40Mhz */
#define CPU_CLK_40M 1
#define CPU_CLK_16M 2
#define W600_PLL_CLK_MHZ 160
#define UNIT_MHZ (1000000)
typedef struct{
u32 apbclk;
u32 cpuclk;
u32 wlanclk;
}tls_sys_clk;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup CPU_CLOCK_Driver_APIs CPU_CLOCK Driver APIs
* @brief CPU_CLOCK driver APIs
*/
/**
* @addtogroup CPU_CLOCK_Driver_APIs
* @{
*/
/**
* @brief This function is used to set cpu clock
*
* @param[in] clk select cpu clock
clk == CPU_CLK_80M 80M
clk == CPU_CLK_40M 40M
*
* @return None
*
* @note None
*/
void tls_sys_clk_set(u32 clk);
/**
* @brief This function is used to get cpu clock
*
* @param[out] *sysclk point to the addr for system clk output
*
* @return None
*
* @note None
*/
void tls_sys_clk_get(tls_sys_clk *sysclk);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_CPU_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_dma.h
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/**
* @file wm_dma.h
*
* @brief DMA Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_DMA_H_
#define __WM_DMA_H_
#ifdef __cplusplus
extern "C" {
#endif
#define TLS_DMA_SEL_UART_RX 0
#define TLS_DMA_SEL_UART_TX 1
#define TLS_DMA_SEL_PWM_CAP0 2
#define TLS_DMA_SEL_PWM_CAP1 3
#define TLS_DMA_SEL_LSSPI_RX 4
#define TLS_DMA_SEL_LSSPI_TX 5
#define TLS_DMA_SEL_SDADC_CH0 6
#define TLS_DMA_SEL_SDADC_CH1 7
#define TLS_DMA_SEL_SDADC_CH2 8
#define TLS_DMA_SEL_SDADC_CH3 9
#define TLS_DMA_SEL_SDADC_CH4 10
#define TLS_DMA_SEL_SDADC_CH5 11
#define TLS_DMA_SEL_SDADC_CH6 12
#define TLS_DMA_SEL_SDADC_CH7 13
#define TLS_DMA_SEL_I2S_RX 14
#define TLS_DMA_SEL_I2S_TX 15
#define TLS_DMA_FLAGS_HARD_MODE (1 << 0)
#define TLS_DMA_FLAGS_CHAIN_MODE (1 << 1)
#define TLS_DMA_FLAGS_CHANNEL_SEL(n) ((n) << 2)
#define TLS_DMA_FLAGS_CHAIN_LINK_EN (1 << 6)
#define TLS_DMA_FLAGS_CHANNEL_VALID (1 << 7)
#define TLS_DMA_DESC_VALID (1U << 31)
#define TLS_DMA_DESC_CTRL_SRC_ADD_INC (1 << 0)
#define TLS_DMA_DESC_CTRL_DEST_ADD_INC (1 << 2)
#define TLS_DMA_DESC_CTRL_DATA_SIZE_BYTE (0 << 4)
#define TLS_DMA_DESC_CTRL_DATA_SIZE_SHORT (1 << 4)
#define TLS_DMA_DESC_CTRL_DATA_SIZE_WORD (2 << 4)
#define TLS_DMA_DESC_CTRL_BURST_SIZE1 (0 << 6)
#define TLS_DMA_DESC_CTRL_BURST_SIZE4 (1 << 6)
#define TLS_DMA_DESC_CTRL_TOTAL_BYTES(n) ((n) << 7)
/* dma interrupt flags */
#define TLS_DMA_IRQ_BURST_DONE (1 << 0)
#define TLS_DMA_IRQ_TRANSFER_DONE (1 << 1)
#define TLS_DMA_IRQ_BOTH_DONE (TLS_DMA_IRQ_BURST_DONE | TLS_DMA_IRQ_TRANSFER_DONE)
struct tls_dma_descriptor {
unsigned int valid;
unsigned int dma_ctrl;
unsigned int src_addr;
unsigned int dest_addr;
struct tls_dma_descriptor *next; /**< next dms descriptor */
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup DMA_Driver_APIs DMA Driver APIs
* @brief DMA driver APIs
*/
/**
* @addtogroup DMA_Driver_APIs
* @{
*/
/**
* @brief This function is used to clear dma interrupt flag.
*
* @param[in] ch Channel no.[0~7]
* @param[in] flags Flags setted to TLS_DMA_IRQ_BURST_DONE, TLS_DMA_IRQ_TRANSFER_DONE, TLS_DMA_IRQ_BOTH_DONE.
*
* @return None
*
* @note None
*/
void tls_dma_irq_clr(unsigned char ch, unsigned char flags);
/**
* @brief This function is used to register dma interrupt callback function.
*
* @param[in] ch Channel no.[0~7]
* @param[in] callback is the dma interrupt call back function.
* @param[in] arg the param of the callback function.
* @param[in] flags Flags setted to TLS_DMA_IRQ_BURST_DONE, TLS_DMA_IRQ_TRANSFER_DONE, TLS_DMA_IRQ_BOTH_DONE.
*
* @return None
*
* @note None
*/
void tls_dma_irq_register(unsigned char ch, void (*callback)(void *p), void *arg, unsigned char flags);
/**
* @brief This function is used to Wait until DMA operation completes
*
* @param[in] ch DMA channel no.[0~7]
*
* @return 0 completed
* @return -1 failed
*
* @note None
*/
int tls_dma_wait_complt(unsigned char ch);
/**
* @brief This function is used to Start the DMA controller by Wrap
*
* @param[in] autoReload Does restart when current transfer complete?
* @param[in] ch Channel no.[0~7]
* @param[in] pDmaDesc Pointer to DMA channel descriptor structure.
*
* @retval Always STATUS_SUCCESS.
*
* @note
* DMA Descriptor:
* +--------------------------------------------------------------+
* |Vld[31] | RSV |
* +--------------------------------------------------------------+
* | RSV | Dma_Ctrl[16:0] |
* +--------------------------------------------------------------+
* | Src_Addr[31:0] |
* +--------------------------------------------------------------+
* | Dest_Addr[31:0] |
* +--------------------------------------------------------------+
* | Next_Desc_Add[31:0] |
* +--------------------------------------------------------------+
*/
unsigned char tls_dma_start_by_wrap(unsigned char ch, struct tls_dma_descriptor *dma_desc,
unsigned char auto_reload, unsigned short src_zize,
unsigned short dest_zize);
/**
* @brief This function is used for Starting the DMA controller
*
* @param[in] ch Channel no.[0~7]
* @param[in] pDmaDesc Pointer to DMA channel descriptor structure.
* @param[in] autoReload Does restart when current transfer complete?
*
* @retval 0 success
* @retval 1 failed
*
* @note
* DMA Descriptor:
* +--------------------------------------------------------------+
* |Vld[31] | RSV |
* +--------------------------------------------------------------+
* | RSV | Dma_Ctrl[16:0] |
* +--------------------------------------------------------------+
* | Src_Addr[31:0] |
* +--------------------------------------------------------------+
* | Dest_Addr[31:0] |
* +--------------------------------------------------------------+
* | Next_Desc_Add[31:0] |
* +--------------------------------------------------------------+
*/
unsigned char tls_dma_start(unsigned char ch, struct tls_dma_descriptor *dma_desc,
unsigned char auto_reload);
/**
* @brief This function is used to To stop current DMA channel transfer
*
* @param[in] ch channel no. to be stopped
*
* @retval 0 success
* @retval 1 failed
*
* @note If channel stop, DMA_CHNL_CTRL_CHNL_ON bit in DMA_CHNLCTRL_REG is cleared.
*/
unsigned char tls_dma_stop(unsigned char ch);
/**
* @brief This function is used to Request a free dma channel.
* If ch is 0, the function will select a random free channel,
* else return the selected channel no. if free.
*
* @param[in] ch channel no.
* @param[in] flags flags setted to selected channel
*
* @return Channel no. that is free now
*
* @note Channel no. that is free now
*/
unsigned char tls_dma_request(unsigned char ch, unsigned char flags);
/**
* @brief This function is used to Free the DMA channel when not use
*
* @param[in] ch channel no. that is ready to free
*
* @return None
*
* @note None
*/
void tls_dma_free(unsigned char ch);
/**
* @brief This function is used to Initialize DMA Control
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_dma_init(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of __WM_DMA_H_ */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_efuse.h
+288
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/**
* @file wm_efuse.h
*
* @brief virtual efuse Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_EFUSE_H
#define WM_EFUSE_H
#define TLS_EFUSE_STATUS_OK (0)
#define TLS_EFUSE_STATUS_EINVALID (1)
#define TLS_EFUSE_STATUS_EIO (2)
#define TLS_EFUSE_STATUS_ERR (-1)
enum {
CMD_MAC = 0x01,
CMD_TX_DC,
CMD_RX_DC,
CMD_TX_IQ_GAIN,
CMD_RX_IQ_GAIN,
CMD_TX_IQ_PHASE,
CMD_RX_IQ_PHASE,
CMD_TX_GAIN,
CMD_ALL,
};
#define VCG_ADDR (FT_MAGICNUM_ADDR + sizeof(FT_PARAM_ST)+4)
#define VCG_LEN (4)
//#define TX_GAIN_NEW_ADDR (VCG_ADDR+VCG_LEN)
#define TX_GAIN_LEN (28*3)
/**
* @brief This function is used to init ft param.
*
* @param[in] None
*
* @retval TRUE init success
* @retval FALSE init failed
*/
int tls_ft_param_init(void);
/**
* @brief This function is used to write ft_param.
*
* @param[in] opnum ft cmd
* @param[in] data data pointer
* @param[in] len the length written into "data"
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_ft_param_set(unsigned int opnum, void *data, unsigned int len);
/**
* @brief This function is used to read ft_param.
*
* @param[in] opnum ft cmd
* @param[in] data data pointer
* @param[in] len len to read data
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_ft_param_get(unsigned int opnum, void *data, unsigned int rdlen);
/**
* @brief This function is used to get mac addr
*
* @param[in] mac mac addr,6 byte
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_mac_addr(u8 *mac);
/**
* @brief This function is used to set mac addr
*
* @param[in] mac mac addr,6 byte
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_mac_addr(u8 *mac);
/**
* @brief This function is used to get tx gain
*
* @param[in] txgain tx gain,12 byte
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_tx_gain(u8 *txgain);
/**
* @brief This function is used to set tx gain
*
* @param[in] txgain tx gain,12 byte
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_tx_gain(u8 *txgain);
/**
* @brief This function is used to get tx lod
*
* @param[in] txlo tx lod
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_tx_lo(u8 *txlo);
/**
* @brief This function is used to set tx lod
*
* @param[in] txlo tx lod
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_tx_lo(u8 *txlo);
/**
* @brief This function is used to get tx iq gain
*
* @param[in] txGain
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_tx_iq_gain(u8 *txGain);
/**
* @brief This function is used to set tx iq gain
*
* @param[in] txGain
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_tx_iq_gain(u8 *txGain);
/**
* @brief This function is used to get rx iq gain
*
* @param[in] rxGain
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_rx_iq_gain(u8 *rxGain);
/**
* @brief This function is used to set rx iq gain
*
* @param[in] rxGain
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_rx_iq_gain(u8 *rxGain);
/**
* @brief This function is used to get tx iq phase
*
* @param[in] txPhase
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_tx_iq_phase(u8 *txPhase);
/**
* @brief This function is used to set tx iq phase
*
* @param[in] txPhase
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_tx_iq_phase(u8 *txPhase);
/**
* @brief This function is used to get rx iq phase
*
* @param[in] rxPhase
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_rx_iq_phase(u8 *rxPhase);
/**
* @brief This function is used to set rx iq phase
*
* @param[in] rxPhase
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_rx_iq_phase(u8 *rxPhase);
/**
* @brief This function is used to set/get freq err
*
* @param[in] freqerr
* @param[in] flag 1-set 0-get
*/
int tls_freq_err_op(u8 *freqerr, u8 flag);
/**
* @brief This function is used to set/get vcg ctrl
*
* @param[in] vcg
* @param[in] flag 1-set 0-get
*
*/
int tls_rf_vcg_ctrl_op(u8 *vcg, u8 flag);
/**
* @brief This function is used to get chip ID
*
* @param[out] chip_id
*
*/
int tls_get_chipid(u8 chip_id[16]);
/**
* @brief This function is used for a delay of several seconds
*
* @param[in] seconds
*
* @retval 0
*/
unsigned int tls_sleep(unsigned int seconds);
/**
* @brief This function is used for a delay of several milliseconds
*
* @param[in] msec
*
* @retval 0
*/
int tls_msleep(unsigned int msec);
/**
* @brief This function is used for a delay of several microseconds
*
* @param[in] usec
*
* @retval 0
*/
int tls_usleep(unsigned int usec);
/**********************************************************************************************************
* Description: This function is used to get uuid
*
* Arguments : *uuid
*
* Returns : 0 get success
* -1 get failed
**********************************************************************************************************/
int tls_get_uuid(u8 *uuid, u8 len);
/**********************************************************************************************************
* Description: This function is used to get uuid
*
* Arguments : *uuid :data to be written to otp area
* len : data len to be written
* iflock : if lock the otp area,1-lock, once lock,can not unlock!!!
*
* Returns : 0 get success
* -1 get failed
**********************************************************************************************************/
int tls_set_uuid(u8 *uuid, u8 len, u8 iflock);
#endif /* WM_EFUSE_H */
sdk/Include/Driver/wm_flash.h
+203
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/**
* @file wm_flash.h
*
* @brief flash Driver module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_FLASH_H
#define WM_FLASH_H
#include "wm_type_def.h"
#include "wm_osal.h"
#define TLS_FLS_STATUS_OK (0)
#define TLS_FLS_STATUS_EINVAL (1)
#define TLS_FLS_STATUS_EBUSY (2)
#define TLS_FLS_STATUS_EPERM (3)
#define TLS_FLS_STATUS_ENOSUPPORT (4)
#define TLS_FLS_STATUS_EEXIST (5)
#define TLS_FLS_STATUS_ENOMEM (6)
#define TLS_FLS_STATUS_EOVERFLOW (7)
#define TLS_FLS_STATUS_ENODEV (8)
#define TLS_FLS_STATUS_EDEV (9)
#define TLS_FLS_STATUS_EIO (10)
#define TLS_FLS_STATUS_ENODRV (11)
#define TLS_FLS_PARAM_TYPE_ID (0)
#define TLS_FLS_PARAM_TYPE_SIZE (1)
#define TLS_FLS_PARAM_TYPE_PAGE_SIZE (2)
#define TLS_FLS_PARAM_TYPE_PROG_SIZE (3)
#define TLS_FLS_PARAM_TYPE_SECTOR_SIZE (4)
#define TLS_FLS_FLAG_UNDER_PROTECT (1<<0)
#define TLS_FLS_FLAG_FAST_READ (1<<1)
#define TLS_FLS_FLAG_AAAI (1<<2)
#define FLS_CMD_READ_DEV_ID (0x9F) // read device id //(0x9f)
/**
* @struct fls_list list
*/
struct fls_list
{
struct fls_list *next;
struct fls_list *prev;
};
/**
* @struct tls_fls_drv flash driver
*/
struct tls_fls_drv
{
struct fls_list drv_list;
u32 id;
u32 total_size;
u32 page_size;
u32 program_size;
u32 sector_size;
u32 clock;
u8 mode;
u8 cs_active;
u8 flags;
int (*read) (u32, u8 *, u32);
int (*fast_read) (u32, u8 *, u32);
int (*page_write) (u32, u8 *);
int (*erase) (u32);
int (*chip_erase) (void);
int (*probe)(u32 id);
void (*remove) (void);
};
/**
* @struct tls_fls flash
*/
struct tls_fls
{
struct fls_list fls_drvs;
struct tls_fls_drv *current_drv;
tls_os_sem_t *fls_lock;
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup SPIFLASH_Driver_APIs SPIFLASH Driver APIs
* @brief SPIFLASH driver APIs
*/
/**
* @addtogroup SPIFLASH_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial flash module structer.
*
* @param[in] None
*
* @retval TLS_FLS_STATUS_OK if init sucsess
* @retval TLS_FLS_STATUS_EBUSY if already inited
* @retval TLS_FLS_STATUS_ENOMEM if memory allocation failed
*
* @note None
*/
int tls_spifls_init(void);
/**
* @brief This function is used to read the id of the flash.
*
* @param[in] id Buffer to hold the id that been read.
*
* @retval TLS_FLS_STATUS_OK if read sucsess
* @retval TLS_FLS_STATUS_EIO if read fail
*
* @note None
*/
int tls_spifls_read_id(u32 * id);
/**
* @brief This function is used to read data from the flash.
*
* @param[in] addr Specifies the starting address to read from
* @param[in] buf Pointer to a byte array that is to be written.
* @param[in] len length to read.
*
* @retval TLS_FLS_STATUS_OK if read success
* @retval TLS_FLS_STATUS_EIO if read fail
* @retval TLS_FLS_STATUS_EPERM if flash driver module not beed installed
* @retval TLS_FLS_STATUS_ENODRV if the current spi flash driver not installed
* @retval TLS_FLS_STATUS_EINVAL if arguments is invalid
*
* @note None
*/
int tls_spifls_read(u32 addr, u8 * buf, u32 len);
/**
* @brief This function is used to write data into the flash.
*
* @param[in] addr Specifies the starting address to write to.
* @param[in] buf Pointer to a byte array that holds the data to be written.
* @param[in] len length to write.
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
* @retval TLS_FLS_STATUS_ENOMEM if memory allocation fail
*
* @note None
*/
int tls_spifls_write(u32 addr, u8 * buf, u32 len);
/**
* @brief This function is used to erase one sector of the flash.
*
* @param[in] sector Specifies the sector number to be erased..
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
*
* @note None
*/
int tls_spifls_erase(u32 sector);
/**
* @brief This function is used to erase the flash.
*
* @param[in] None
*
* @retval TLS_FLS_STATUS_OK if init sucsess
* @retval TLS_FLS_STATUS_EBUSY already inited
* @retval TLS_FLS_STATUS_ENOMEM memory error
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
*
* @note None
*/
int tls_spifls_chip_erase(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_FLASH_H */
sdk/Include/Driver/wm_flash_map.h
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/**
* @file wm_flash_map.h
*
* @brief flash zone map
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_FLASH_MAP_H__
#define __WM_FLASH_MAP_H__
/**FLASH MAP**/
/**Flash Base Address */
#define FLASH_BASE_ADDR (0x08000000UL)
#define FLASH_1M_END_ADDR (0x08100000UL)
/**Run-time image header area*/
#define CODE_RUN_HEADER_ADDR (0x08010000UL)
#define CODE_RUN_HEADER_AREA_LEN (0x100)
/**Run-time image area*/
#define CODE_RUN_START_ADDR (0x08010100UL)
/********************************************************
******************LAYOUT For 1M Flash**********************
*Reserved 0x8000000-0x8010000 64Kbyte
*Code 0x8010100-0x808FFFF 512Kbyte - 256 byte
*Update 0x8090000-0x80EFFFF 384Kbyte
*User 0x80F0000-0x80FBFFF 48Kbyte
*Parameter 0x80FC000-0x80FFFFF 16Kbyte
*********************************************************
**************LAYOUT For 2M Flash as 1M LAYOUT**************
*Reserved 0x8000000-0x8010000 64Kbyte
*Code 0x8010100-0x80FFFFF 896Kbyte -256byte
*Old User Area 0x80F0000-0x80FBFFF 48Kbyte
*Parameter 0x80FC000-0x80FFFFF 16Kbyte
*Update 0x8100000-0x81AFFFF 704Kbyte
*EXT User 0x81B0000-0x81FFFFF 320Kbyte
*********************************************************
******************LAYOUT For 2M Flash*********************
*Reserved 0x8000000-0x8010000 64Kbyte
*Code 0x8010100-0x80FFFFF 960Kbyte -256byte
*Update 0x8100000-0x81BFFFF 768Kbyte
*User 0x81C0000-0x81FBFFF 240Kbyte
*Parameter 0x81FC000-0x81FFFFF 16Kbyte
*********************************************************
*********************************************************/
/**Run-time image area size*/
extern unsigned int CODE_RUN_AREA_LEN;
/**Area can be used by User in 1M position*/
extern unsigned int USER_ADDR_START;
extern unsigned int TLS_FLASH_PARAM_DEFAULT;
extern unsigned int USER_AREA_LEN;
extern unsigned int USER_ADDR_END;
/**Upgrade image header area & System parameter area */
extern unsigned int CODE_UPD_HEADER_ADDR;
extern unsigned int TLS_FLASH_PARAM1_ADDR;
extern unsigned int TLS_FLASH_PARAM2_ADDR;
extern unsigned int TLS_FLASH_PARAM_RESTORE_ADDR;
/**Upgrade image area*/
extern unsigned int CODE_UPD_START_ADDR;
extern unsigned int CODE_UPD_AREA_LEN;
/**Area can be used by User in 2M position*/
extern unsigned int EX_USER_ADDR_START;
extern unsigned int EX_USER_AREA_LEN;
extern unsigned int EX_USER_ADDR_END;
extern unsigned int TLS_FLASH_END_ADDR;
#define SIGNATURE_WORD 0xa0ffff9f
#endif /*__WM_CONFIG_H__*/
sdk/Include/Driver/wm_fls_gd25qxx.h
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/**
* @file wm_fls_gd25qxx.h
*
* @brief wm gd25qxx flash driver
*
* @author dave
*
* @copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef TLS_EXSPIFLS_H
#define TLS_EXSPIFLS_H
#define SPI_SCLK (10000000) /** 10MHz. */
#define FLASH_TOTAL_SIZE (1024*1024)
#define PAGE_SIZE 256
#define PROGRAM_SIZE 256
#define PAGE_ADDR_OFFSET 8
#define SECTOR_SIZE 4096
/**
* command code define.
*/
#define EXSPIFLASH_WRITE_ENABLE (0x06) /** Global write enable */
#define EXSPIFLASH_WRITE_DISABLE (0x04) /** Global write disable */
#define EXSPIFLASH_READ_SR1 (0x05) /** Read flash status register s0~s7 */
#define EXSPIFLASH_READ_SR2 (0x35) /** Read flash status register s8~s15 */
#define EXSPIFLASH_WRITE_SR (0x01) /** Write flash status register s0~s15 */
#define EXSPIFLASH_PAGE_PROGRAM (0x02) /** program one page */
#define EXSPIFLASH_DATA_READ (0x03) /** read data from specified address */
#define EXSPIFLASH_DATA_FAST_READ (0x0b) /** fast read data from specified address */
#define EXSPIFLASH_SECTOR_ERASE (0x20) /** Sector erase */
#define EXSPIFLASH_BLOCK32_ERASE (0x52) /** 32KB Block erase(128 pages) */
#define EXSPIFLASH_BLOCK64_ERASE (0xd8) /** 64kb Block erase(256 pages) */
#define EXSPIFLASH_CHIP_ERASE (0xc7) /** Chip erase */
#define EXSPIFLASH_FLASH_DEVICEID (0x90) /** Read flash manufacturer/device ID */
#define EXSPIFLASH_FLASH_ID (0x9f) /** Read flash ID */
#define FLASH_STATUS_BUSY (1 << 0)
#define FLASH_STATUS_WEL (1 << 1)
/**
* @brief This function is used to install gd25qxx driver.
*
* @param[in] None
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
* @retval TLS_FLS_STATUS_EEXIST if driver is already existed
*
* @note None
*/
int tls_spifls_drv_install(void);
#endif /* TLS_FLS_GD25QXX_H */
sdk/Include/Driver/wm_gpio.h
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/**
* @file wm_gpio.h
*
* @brief GPIO Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_GPIO_H
#define WM_GPIO_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_type_def.h"
#include "wm_io.h"
/** gpio interrupte callback function */
typedef void (*tls_gpio_irq_callback)(void *arg);
/** Indicating gpio direction */
enum tls_gpio_dir {
WM_GPIO_DIR_OUTPUT, /**< output */
WM_GPIO_DIR_INPUT /**< input */
};
/** Indicating gpio attribute */
enum tls_gpio_attr {
WM_GPIO_ATTR_FLOATING, /**< floating status */
WM_GPIO_ATTR_PULLHIGH, /**< pull high */
WM_GPIO_ATTR_PULLLOW /**< pull low */
};
/** Indicating gpio interrupt trigger type */
enum tls_gpio_irq_trig {
WM_GPIO_IRQ_TRIG_RISING_EDGE, /**< rising edge arises the interrupt */
WM_GPIO_IRQ_TRIG_FALLING_EDGE, /**< falling edge arises the interrupt */
WM_GPIO_IRQ_TRIG_DOUBLE_EDGE, /**< both rising edge and falling edge arise the interrupt */
WM_GPIO_IRQ_TRIG_HIGH_LEVEL, /**< high power level arises the interrupt */
WM_GPIO_IRQ_TRIG_LOW_LEVEL /**< low power level arises the interrupt */
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup GPIO_Driver_APIs GPIO Driver APIs
* @brief GPIO driver APIs
*/
/**
* @addtogroup GPIO_Driver_APIs
* @{
*/
/**
* @brief This function is used to config gpio function
*
* @param[in] gpio_pin gpio pin num
* @param[in] dir gpio direction
* @param[in] attr gpio attribute
*
* @return None
*
* @note
* All gpio's attribute can only be set as WM_GPIO_ATTR_FLOATING or WM_GPIO_ATTR_PULLHIGH on W600/W601.
*/
void tls_gpio_cfg(enum tls_io_name gpio_pin, enum tls_gpio_dir dir, enum tls_gpio_attr attr);
/**
* @brief This function is used to read gpio status
*
* @param[in] gpio_pin gpio pin num
*
* @retval 0 low level
* @retval 1 high level
*
* @note None
*/
u8 tls_gpio_read(enum tls_io_name gpio_pin);
/**
* @brief This function is used to modify gpio status
*
* @param[in] gpio_pin gpio pin num
* @param[in] value electrical level
* 0: low level
* 1: high level
*
* @return None
*
* @note None
*/
void tls_gpio_write(enum tls_io_name gpio_pin, u8 value);
/**
* @brief This function is used to config gpio interrupt
*
* @param[in] gpio_pin gpio pin num
* @param[in] mode interrupt trigger type
*
* @return None
*
* @note None
*/
void tls_gpio_irq_enable(enum tls_io_name gpio_pin, enum tls_gpio_irq_trig mode);
/**
* @brief This function is used to disable gpio interrupt
*
* @param[in] gpio_pin gpio pin num
*
* @return None
*
* @note None
*/
void tls_gpio_irq_disable(enum tls_io_name gpio_pin);
/**
* @brief This function is used to get gpio interrupt status
*
* @param[in] gpio_pin gpio pin num
*
* @retval 0 no interrupt happened
* @retval 1 interrupt happened
*
* @note None
*/
u8 tls_get_gpio_irq_status(enum tls_io_name gpio_pin);
/**
* @brief This function is used to clear gpio interrupt flag
*
* @param[in] gpio_pin gpio pin num
*
* @return None
*
* @note None
*/
void tls_clr_gpio_irq_status(enum tls_io_name gpio_pin);
/**
* @brief This function is used to register gpio interrupt
*
* @param[in] gpio_pin gpio pin num
* @param[in] callback the gpio interrupt call back function
* @param[in] arg parammeter for the callback
*
* @return None
*
* @note
* gpio callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_gpio_isr_register(enum tls_io_name gpio_pin,
tls_gpio_irq_callback callback,
void *arg);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_GPIO_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_gpio_afsel.h
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/**
* @file wm_gpio_afsel.h
*
* @brief GPIO Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_IO_MUX_H
#define WM_IO_MUX_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_gpio.h"
#include "wm_regs.h"
#include "wm_irq.h"
#include "wm_osal.h"
#include "tls_common.h"
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup IOMUX_Driver_APIs IOMUX Driver APIs
* @brief IOMUX driver APIs
*/
/**
* @addtogroup IOMUX_Driver_APIs
* @{
*/
/**
* @brief config the pins used for highspeed spi
* @param numsel: config highspeed spi pins multiplex relation,valid para 0,1
* 0: hspi0
* hspi_int PB14
* hspi_cs PB15
* hspi_ck PB16
* hspi_di PB17
* hspi_do PB18
* 1: hspi1
* hspi_int PB08
* hspi_cs PB09
* hspi_ck PB10
* hspi_di PB11
* hspi_do PB12
* @return None
*/
void wm_hspi_gpio_config(uint8_t numsel);
/**
* @brief config the pins used for spi ck
* @param io_name: config spi ck pins name
* WM_IO_PA_01
* WM_IO_PB_16
* WM_IO_PB_27
* WM_IO_PA_11
*
* @return None
*/
void wm_spi_ck_config(enum tls_io_name io_name);
/**
* @brief config the pins used for spi cs
* @param io_name: config spi cs pins name
* WM_IO_PA_02
* WM_IO_PB_15
* WM_IO_PB_00
* WM_IO_PB_07
* WM_IO_PA_12
*
* @return None
*/
void wm_spi_cs_config(enum tls_io_name io_name);
/**
* @brief config the pins used for spi di
* @param io_name: config spi di pins name
* WM_IO_PA_03
* WM_IO_PB_17
* WM_IO_PB_01
* WM_IO_PA_05
* WM_IO_PA_10
*
* @return None
*/
void wm_spi_di_config(enum tls_io_name io_name);
/**
* @brief config the pins used for spi do
* @param io_name: config spi do pins name
* WM_IO_PB_18
* WM_IO_PB_02
* WM_IO_PA_04
* WM_IO_PA_09
* WM_IO_PA_10
*
* @return None
*/
void wm_spi_do_config(enum tls_io_name io_name);
/**
* @brief config the pins used for sdio ck dat0 dat1 dat2 dat3
* @param numsel: config sdio ck dat0 dat1 dat2 dat3 pins multiplex relation,valid para 0
* 0:
* sdio_ck PB08
* sdio_dat0 PB09
* sdio_dat1 PB10
* sdio_dat2 PB11
* sdio_dat3 PB12
*
* @return None
*/
void wm_sdio_config(uint8_t numsel);
/**
* @brief config the pins used for sdio cmd
* @param io_name: config sdio cmd pins name
* WM_IO_PA_06
* WM_IO_PB_07
* WM_IO_PB_13
*
* @return None
*/
void wm_sdio_cmd_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart0 tx
* @param io_name: config uart0 tx pins name
* WM_IO_PA_04
* WM_IO_PA_08
* WM_IO_PB_07
* WM_IO_PB_26
*
* @return None
*/
void wm_uart0_tx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart0 rx
* @param io_name: config uart0 rx pins name
* WM_IO_PA_05
* WM_IO_PA_09
* WM_IO_PB_06
* WM_IO_PB_25
*
* @return None
*/
void wm_uart0_rx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart0 rts
* @param io_name: config uart0 rts pins name
* WM_IO_PA_13
* WM_IO_PB_04
* WM_IO_PB_24
*
* @return None
*/
void wm_uart0_rts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart0 cts
* @param io_name: config uart0 cts pins name
* WM_IO_PA_14
* WM_IO_PB_05
* WM_IO_PB_23
*
* @return None
*/
void wm_uart0_cts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart1 tx
* @param io_name: config uart1 tx pins name
* WM_IO_PB_12
* WM_IO_PB_18
*
* @return None
*/
void wm_uart1_tx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart1 rx
* @param io_name: config uart1 rx pins name
* WM_IO_PB_11
* WM_IO_PB_17
*
* @return None
*/
void wm_uart1_rx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart1 rts
* @param io_name: config uart1 rts pins name
* WM_IO_PB_10
*
* @return None
*/
void wm_uart1_rts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart1 cts
* @param io_name: config uart1 cts pins name
* WM_IO_PB_09
*
* @return None
*/
void wm_uart1_cts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart2 tx or 7816-io
* @param io_name: config uart2 tx or 7816-io pins name
* WM_IO_PA_01
* WM_IO_PA_11
* WM_IO_PB_02
* WM_IO_PB_20
*
* @return None
*/
void wm_uart2_tx_scio_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart2 rx
* @param io_name: config uart2 rx pins name
* WM_IO_PA_00
* WM_IO_PA_10
* WM_IO_PB_03
* WM_IO_PB_19
* WM_IO_PB_30
*
* @return None
*/
void wm_uart2_rx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart2 rts or 7816-clk
* @param io_name: config uart2 rts or 7816-clk pins name
* WM_IO_PA_02
* WM_IO_PA_12
* WM_IO_PB_01
* WM_IO_PB_21
* WM_IO_PB_06
*
* @return None
*/
void wm_uart2_rts_scclk_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart2 cts
* @param io_name: config uart2 cts pins name
* WM_IO_PA_03
* WM_IO_PB_28
* WM_IO_PB_00
* WM_IO_PB_22
*
* @return None
*/
void wm_uart2_cts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s master ck
* @param io_name: config i2s master ck pins name
* WM_IO_PA_04
* WM_IO_PA_08
* WM_IO_PB_08
*
* @return None
*/
void wm_i2s_m_ck_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s master ws
* @param io_name: config i2s master ws pins name
* WM_IO_PA_13
* WM_IO_PA_09
* WM_IO_PB_10
*
* @return None
*/
void wm_i2s_m_ws_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s master do
* @param io_name: config i2s master do pins name
* WM_IO_PA_03
* WM_IO_PA_07
* WM_IO_PB_09
*
* @return None
*/
void wm_i2s_m_do_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s slave ck
* @param io_name: config i2s slave ck pins name
* WM_IO_PA_15
* WM_IO_PA_11
* WM_IO_PB_15
* WM_IO_PB_04
*
* @return None
*/
void wm_i2s_s_ck_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s slave ws
* @param io_name: config i2s slave ws pins name
* WM_IO_PA_06
* WM_IO_PA_12
* WM_IO_PB_16
* WM_IO_PB_05
*
* @return None
*/
void wm_i2s_s_ws_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s slave di
* @param io_name: config i2s slave di pins name
* WM_IO_PA_14
* WM_IO_PA_10
* WM_IO_PB_14
* WM_IO_PB_03
*
* @return None
*/
void wm_i2s_s_di_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s mclk
* @param io_name: config i2s mclk pins name
* WM_IO_PA_02
* WM_IO_PB_28
* WM_IO_PB_31
*
* @return None
*/
void wm_i2s_mclk_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s extclk
* @param io_name: config i2s extclk pins name
* WM_IO_PA_05
*
* @return None
*/
void wm_i2s_extclk_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2c scl
* @param io_name: config i2c scl pins name
* WM_IO_PA_06
* WM_IO_PA_08
* WM_IO_PB_13
* WM_IO_PB_11
* WM_IO_PB_21
*
* @return None
*/
void wm_i2c_scl_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2c sda
* @param io_name: config i2c sda pins name
* WM_IO_PA_15
* WM_IO_PA_07
* WM_IO_PB_14
* WM_IO_PB_12
* WM_IO_PB_22
*
* @return None
*/
void wm_i2c_sda_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm1
* @param io_name: config pwm1 pins name
* WM_IO_PA_00
* WM_IO_PB_18
* WM_IO_PB_05
* WM_IO_PA_05
* WM_IO_PB_19
* WM_IO_PB_30
*
* @return None
*/
void wm_pwm1_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm2
* @param io_name: config pwm2 pins name
* WM_IO_PA_01
* WM_IO_PB_17
* WM_IO_PB_04
* WM_IO_PA_07
* WM_IO_PB_13
* WM_IO_PB_20
*
* @return None
*/
void wm_pwm2_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm3
* @param io_name: config pwm3 pins name
* WM_IO_PA_02
* WM_IO_PB_16
* WM_IO_PB_03
* WM_IO_PA_08
* WM_IO_PB_21
*
* @return None
*/
void wm_pwm3_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm4
* @param io_name: config pwm4 pins name
* WM_IO_PA_03
* WM_IO_PB_15
* WM_IO_PB_02
* WM_IO_PA_09
* WM_IO_PB_22
* WM_IO_PB_06
*
* @return None
*/
void wm_pwm4_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm5
* @param io_name: config pwm5 pins name
* WM_IO_PA_04
* WM_IO_PB_14
* WM_IO_PB_01
* WM_IO_PA_10
* WM_IO_PB_23
* WM_IO_PB_08
*
* @return None
*/
void wm_pwm5_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm break
* @param io_name: config pwm break pins name
* WM_IO_PB_24
* WM_IO_PB_29
* WM_IO_PB_00
* WM_IO_PA_11
*
* @return None
*/
void wm_pwmbrk_config(enum tls_io_name io_name);
/**
* @brief config the pins used for swd
* @param enable: enable or disable chip swd function
* 1: enable
* 0: disable
*
* @return None
*/
void wm_swd_config(bool enable);
/**
* @brief config the pins used for adc
* @param Channel: the channel that shall be used
* 0~07: single-ended input
* 8~11: differential input
*
* @return None
*/
void wm_adc_config(u8 Channel);
/**
* @brief disable all the gpio af
*
* @return None
*
* @note This function must call before anyothers for configure
* gpio Alternate functions
*/
void wm_gpio_af_disable(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_IO_MUX_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_hostspi.h
+299
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/**
* @file wm_hostspi.h
*
* @brief host spi Driver Module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_HOST_SPI_H
#define WM_HOST_SPI_H
#include "wm_type_def.h"
#include "list.h"
#include "wm_osal.h"
#include "wm_ram_config.h"
#define SPI_USE_DMA
#define SPI_TX_DMA_MASK 0x01
#define SPI_RX_DMA_MASK 0x02
#define SPI_DMA_CMD_ADDR ((u32)(MASTER_SPI_DMA_ADDR))
#define SPI_DMA_CMD_MAX_SIZE (0x20)
#define SPI_DMA_BUF_ADDR ((u32)(SPI_DMA_CMD_ADDR + SPI_DMA_CMD_MAX_SIZE))
// #define SPI_DMA_BUF_MAX_SIZE 8160
#define SPI_DMA_BUF_MAX_SIZE (1024 - 32)
// #define SPI_DMA_MAX_TRANS_SIZE 4092
#define SPI_DMA_MAX_TRANS_SIZE 512
/**
* error code.
*/
#define TLS_SPI_STATUS_OK (0)
#define TLS_SPI_STATUS_EINVAL (-1)
#define TLS_SPI_STATUS_ENOMEM (-2)
#define TLS_SPI_STATUS_EBUSY (-3)
#define TLS_SPI_STATUS_ESHUTDOWN (-4)
#define TLS_SPI_STATUS_EPERM (-5)
#define TLS_SPI_STATUS_ECLKNOSUPPORT (-6)
#define TLS_SPI_STATUS_EMODENOSUPPORT (-7)
#define SPI_MASTER_FIFO_SIZE (32)
/**
* the SPI master controller's configuration data.
*/
/** configuration data. */
#define SPI_CPHA (0x01) /** clock phase. */
#define SPI_CPOL (0x02) /** clock polarity. */
#define TLS_SPI_MODE_0 (0|0) /** motorola mode. */
#define TLS_SPI_MODE_1 (0|SPI_CPHA)
#define TLS_SPI_MODE_2 (SPI_CPOL|0)
#define TLS_SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
#define TLS_SPI_CS_LOW 0x00 /** chipselect active low. */
#define TLS_SPI_CS_HIGH 0x01 /** chipselect active high. */
#define TLS_SPI_FCLK_MIN (1000) /** minimum work clock rate(Hz). */
#define TLS_SPI_FCLK_MAX (APB_CLK/2) /** maximum work clock rate(Hz). */
/** default configuration data. */
#define SPI_DEFAULT_SPEED (2000000) /** default clock rate is 2MHz. */
#define SPI_DEFAULT_MODE (TLS_SPI_MODE_0) /** default mode MODE_0. */
#define SPI_CS_ACTIVE_MODE (TLS_SPI_CS_LOW) /** default chipselect mode is active low. */
#define SPI_CS_INACTIVE_MODE (TLS_SPI_CS_HIGH)
/** SPI transaction message status. */
#define SPI_MESSAGE_STATUS_IDLE (0)
#define SPI_MESSAGE_STATUS_INPROGRESS (1)
#define SPI_MESSAGE_STATUS_DONE (2)
/**slave type*/
#define SPI_SLAVE_FLASH 0 /**flash */
#define SPI_SLAVE_CARD 1 /** SD card */
#define SPI_SLAVE_CONTROL_PIN 0
/**transfer type*/
#define SPI_BYTE_TRANSFER 0 /**byte transfer*/
#define SPI_WORD_TRANSFER 1 /**word transfer*/
#define SPI_DMA_TRANSFER 2 /** DMA transfer */
/**
* a read/write buffer pair
*
* SPI transfers always write the same number of bytes as they read.
* If the transmit buffer is null, zeroes will be shifted out while
* filling rx_buf. If the receive buffer is null, the data shifted in
* will be discarded.
*/
struct tls_spi_transfer
{
struct dl_list transfer_list; /**< transfers are sequenced through
tls_spi_message.transfers. */
const void *tx_buf; /**< data to be written, or NULL. */
void *rx_buf; /**< data to be read, or NULL. */
u32 len; /**< size of rx and tx buffers (in bytes). */
u32 delay_usecs; /**< microseconds to delay after this transfer. */
};
/**
* one multi-segment SPI transaction
*
* A struct tls_spi_message is used to execute an atomic sequence of data
* transfers, each represented by a struct tls_spi_transfer. The sequence
* is "atomic" in the sense that no other spi_message may use that SPI bus
* until that sequence completes.
*/
struct tls_spi_message
{
struct dl_list queue; /**< transaction messages are sequenced through
tls_spi_port.wait_queue. */
struct dl_list transfers; /**< list of transfer segments in this transaction. */
void (*complete) (void *); /**< called to report transaction completions. */
void *context; /**< the argument to complete() when it's called. */
u32 status; /**< transaction message status. */
};
/**
* driver structure to SPI master controller
*
* This data structure presents the SPI master controller's configuration
* data. The device attached to this SPI master controller share the same
* transfer mode, chipselect mode and clock rate. And this structure maintains
* a queue of tls_spi_message transactions and uses this tls_spi_message transaction
* to access to the SPI device. For each such message it queues, it calls the message's
* completion function when the transaction completes.
*/
struct tls_spi_port
{
u32 speed_hz; /**< clock rate to be used. */
u8 cs_active; /**< chipselect mode, maybe active low or active
high. */
u8 mode; /**< SPI transfer mode: mode_0(CPHA=0, CHOL=0),
mode_1(CPHA=0, CHOL=1), mode_2(CPHA=1,
CHOL=0), mode_3(CPHA=1, CHOL=1). */
u8 reconfig;
struct dl_list wait_queue; /**< wait list of transaction messages. */
tls_os_queue_t *lock;
tls_os_queue_t *msg_queue; /**< notify the schedule thread that there's
transaction message queued. */
struct tls_spi_message *current_message; /**< current transaction message
in-progressing. */
u32 current_remaining_transfer; /**< remaining transfer segments count in
current transaction message. */
struct tls_spi_transfer *current_transfer; /**< current transfer segment
in-progressing. */
u32 current_remaining_bytes; /**< remaining data length in current
transfer segment. */
u8 transtype; /**< transfer type */
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup HOSTSPI_Driver_APIs HOSTSPI Driver APIs
* @brief HOSTSPI driver APIs
*/
/**
* @addtogroup HOSTSPI_Driver_APIs
* @{
*/
/**
* @brief This function is used to initialize the SPI master driver.
*
* @param[in] None
*
* @retval TLS_SPI_STATUS_OK if initialize success
* @retval TLS_SPI_STATUS_EBUSY if SPI is already initialized
* @retval TLS_SPI_STATUS_ENOMEM if malloc SPI memory fail
*
* @note None
*/
int tls_spi_init(void);
/**
* @brief This function is used to setup the spi controller.
*
* @param[in] mode is CPOL and CPHA type defined in TLS_SPI_MODE_0 to TLS_SPI_MODE_3
* @param[in] cs_active is cs mode, defined as TLS_SPI_CS_LOW or TLS_SPI_CS_HIGH
* @param[in] fclk is spi clock,the unit is HZ.
*
* @retval TLS_SPI_STATUS_OK if setup success
* @retval TLS_SPI_STATUS_EMODENOSUPPORT if mode is not support
* @retval TLS_SPI_STATUS_EINVAL if cs_active is not support
* @retval TLS_SPI_STATUS_ECLKNOSUPPORT if fclk is not support
*
* @note None
*/
int tls_spi_setup(u8 mode, u8 cs_active, u32 fclk);
/**
* @brief This function is used to synchronous write data by SPI.
*
* @param[in] buf data to be sent.
* @param[in] len data length.
*
* @retval TLS_SPI_STATUS_OK if write success.
* @retval TLS_SPI_STATUS_EINVAL if argument is invalid.
* @retval TLS_SPI_STATUS_ENOMEM if there is no enough memory.
* @retval TLS_SPI_STATUS_ESHUTDOWN if SPI driver does not installed.
*
* @note None
*/
int tls_spi_write(const u8 * buf, u32 len);
/**
* @brief This function is used to synchronously read data from SPI.
*
* @param[in] buf is the buffer for saving SPI data.
* @param[in] len is the data length.
*
* @retval TLS_SPI_STATUS_OK if write success.
* @retval TLS_SPI_STATUS_EINVAL if argument is invalid.
* @retval TLS_SPI_STATUS_ENOMEM if there is no enough memory.
* @retval TLS_SPI_STATUS_ESHUTDOWN if SPI driver does not installed.
*
* @note None
*/
int tls_spi_read(u8 * buf, u32 len);
/**
* @brief This function is used to synchronously write command and then read data from SPI.
*
* @param[in] txbuf is the write data buffer.
* @param[in] n_tx is the write data length.
* @param[in] rxbuf is the read data buffer.
* @param[in] n_rx is the read data length.
*
* @retval TLS_SPI_STATUS_OK if write success.
* @retval TLS_SPI_STATUS_EINVAL if argument is invalid.
* @retval TLS_SPI_STATUS_ENOMEM if there is no enough memory.
* @retval TLS_SPI_STATUS_ESHUTDOWN if SPI driver has not been installed.
*
* @note None
*/
int tls_spi_read_with_cmd(const u8 * txbuf, u32 n_tx, u8 * rxbuf, u32 n_rx);
/**
* @brief This function is used to synchronous write 32bit command then write data from SPI.
*
* @param[in] cmd is the command data.
* @param[in] n_cmd is the command len,can not bigger than four
* @param[in] txbuf is the write data buffer.
* @param[in] n_tx is the write data length.
*
* @retval TLS_SPI_STATUS_OK if write success.
* @retval TLS_SPI_STATUS_EINVAL if argument is invalid.
* @retval TLS_SPI_STATUS_ENOMEM if there is no enough memory.
* @retval TLS_SPI_STATUS_ESHUTDOWN if SPI driver does not installed.
*
* @note None
*/
int tls_spi_write_with_cmd(const u8 * cmd, u32 n_cmd, const u8 * txbuf, u32 n_tx);
/**
* @brief This function is used to set SPI transfer mode.
*
* @param[in] type is the transfer type.
* SPI_BYTE_TRANSFER ->byte transfer;
* SPI_WORD_TRANSFER ->word transfer;
* SPI_DMA_TRANSFER ->DMA transfer;
*
* @return None
*
* @note None
*/
void tls_spi_trans_type(u8 type);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_HOST_SPI_H */
sdk/Include/Driver/wm_hspi.h
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/**
* @file wm_hspi.h
*
*
* @brief High speed spi slave Module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_HSPI_H
#define WM_HSPI_H
#include "wm_type_def.h"
#include "wm_ram_config.h"
#define HSPI_TX_MEM_MALLOC 0 /** tx mem dynamic malloc*/
#define HSPI_IO_REUSE_NUM 0
#define SDIO_IO_REUSE_NUM 2
#define HSPI_INTERFACE_SPI 2 /** spi interface*/
#define HSPI_INTERFACE_SDIO 3 /** sdio interface*/
/**rx message*/
#define HSPI_RX_CMD_MSG 1
#define HSPI_RX_DATA_MSG 2
/**spi/sdio buffer£¬Wraper controller can only access the address after the 0x60000*/
#define HSPI_TXBUF_NUM 2
#define HSPI_TX_DESC_NUM HSPI_TXBUF_NUM
#define HSPI_RXBUF_NUM 3//10
#define HSPI_RX_DESC_NUM HSPI_RXBUF_NUM
#define HSPI_TXBUF_SIZE 1500
#define HSPI_RXBUF_SIZE 1500
#define HSPI_TX_DESC_SIZE sizeof(struct tls_hspi_tx_desc)
#define HSPI_RX_DESC_SIZE sizeof(struct tls_hspi_rx_desc)
/*****************************************************************************
* sdio/hspi sram partition
* total size : 0x61800 - 0x67FFFF (26KB)
******************************************************************************/
/* HSPI txbuf zone */
#define HSPI_TXBUF_BASE_ADDR ((u32)(SLAVE_HSPI_SDIO_ADDR))
#if HSPI_TX_MEM_MALLOC
#define HSPI_TXBUF_TOTAL_SIZE 0
#else
#define HSPI_TXBUF_TOTAL_SIZE (HSPI_TXBUF_SIZE * HSPI_TXBUF_NUM)
#endif
/** HSPI tx desc zone */
#define HSPI_TX_DESC_BASE_ADDR ((u32)(HSPI_TXBUF_BASE_ADDR + HSPI_TXBUF_TOTAL_SIZE))
#define HSPI_TX_DESC_TOTAL_SIZE (HSPI_TX_DESC_SIZE * HSPI_TX_DESC_NUM) //28*3=84
/** HSPI rxbuf zone */
#define HSPI_RXBUF_BASE_ADDR ((u32)(HSPI_TX_DESC_BASE_ADDR + HSPI_TX_DESC_TOTAL_SIZE))
#define HSPI_RXBUF_TOTAL_SIZE (HSPI_RXBUF_NUM * HSPI_RXBUF_SIZE) //4500
/** HSPI rx desc zone */
#define HSPI_RX_DESC_BASE_ADDR ((u32)(HSPI_RXBUF_BASE_ADDR + HSPI_RXBUF_TOTAL_SIZE))
#define HSPI_RX_DESC_TOTAL_SIZE (HSPI_RX_DESC_SIZE * HSPI_RX_DESC_NUM) //36
#if 0
#define SDIO_CMD_RXBUF_SIZE (0x100)
#define SDIO_CMD_RXBUF_ADDR (0x00068000 - SDIO_CMD_RXBUF_SIZE)
#define SDIO_CIS1_ADDR (SDIO_CMD_RXBUF_ADDR - 0x80)
#define SDIO_CIS0_ADDR (SDIO_CIS1_ADDR - 0x80)
#else
#define SDIO_CIS0_ADDR (HSPI_RX_DESC_BASE_ADDR + HSPI_RX_DESC_TOTAL_SIZE) //128
#define SDIO_CIS1_ADDR (SDIO_CIS0_ADDR + 0x80) //128
#define SDIO_CMD_RXBUF_ADDR (SDIO_CIS1_ADDR + 0x80)
#define SDIO_CMD_RXBUF_SIZE 256//(1500) //256
#endif
#define CIS_FUN0_ADDR SDIO_CIS0_ADDR
#define CIS_FUN1_ADDR SDIO_CIS1_ADDR
#define FN0_TPL_FUNCID (CIS_FUN0_ADDR + 0x00)
#define FN0_TPL_FUNCE (CIS_FUN0_ADDR + 0x04)
#define FN0_TPL_FUNCE_MAXBLK (CIS_FUN0_ADDR + 0x08)
#define FN0_TPL_MANFID_MID (CIS_FUN0_ADDR + 0x0C)
#define FN0_TPL_END (CIS_FUN0_ADDR + 0x10)
#define FN1_TPL_FUNCID (CIS_FUN1_ADDR + 0x00)
#define FN1_TPL_FUNCE (CIS_FUN1_ADDR + 0x04)
#define FN1_TPL_FUNCE_VER (CIS_FUN1_ADDR + 0x08)
#define FN1_TPL_FUNCE_NSN (CIS_FUN1_ADDR + 0x0C)
#define FN1_TPL_FUNCE_CSASIZE (CIS_FUN1_ADDR + 0x10)
#define FN1_TPL_FUNCE_OCR (CIS_FUN1_ADDR + 0x14)
#define FN1_TPL_FUNCE_MINPWR (CIS_FUN1_ADDR + 0x18)
#define FN1_TPL_FUNCE_STANDBY (CIS_FUN1_ADDR + 0x1C)
#define FN1_TPL_FUNCE_OPTBW (CIS_FUN1_ADDR + 0x20)
#define FN1_TPL_FUNCE_NTIMEOUT (CIS_FUN1_ADDR + 0x24)
#define FN1_TPL_FUNCE_AVGPWR (CIS_FUN1_ADDR + 0x28)
#define FN1_TPL_END (CIS_FUN1_ADDR + 0x30)
/**Definition of SDIO interrupt in the system*/
#define SDIO_RX_DATA_INT (0UL)
#define SDIO_TX_DATA_INT (1UL)
#define SDIO_RX_CMD_INT (2UL)
#define SDIO_TX_CMD_INT (3UL)
/**IO control register*/
#define HR_IOCTL_GP_SDIO HR_IOCTL_GP_SDIO_I2C
/** SDIO interrupt bit definition */
#define SDIO_WP_INT_SRC_CMD_DOWN (1UL<<3)
#define SDIO_WP_INT_SRC_CMD_UP (1UL<<2)
#define SDIO_WP_INT_SRC_DATA_DOWN (1UL<<1)
#define SDIO_WP_INT_SRC_DATA_UP (1UL<<0)
/** Definition of send data descriptor structure */
struct tls_hspi_tx_desc {
volatile u32 valid_ctrl;
u32 buf_info;
u32 buf_addr[3];
u32 next_desc_addr;
#if HSPI_TX_MEM_MALLOC
u32 txbuf_addr; /**< txbuf addr, pbuf and buf_addr[0] are different */
#endif
};
/** Definition of receive data descriptor structure */
struct tls_hspi_rx_desc {
u32 valid_ctrl;
u32 buf_addr;
u32 next_desc_addr;
};
/** struct tls_slave_hspi */
struct tls_slave_hspi {
u8 ifusermode;
s16 (*rx_cmd_callback)(char *buf);
s16 (*rx_data_callback)(char *buf);
s16 (*tx_data_callback)(char *buf);
struct tls_hspi_tx_desc *curr_tx_desc; /**< Upstream data management */
struct tls_hspi_rx_desc *curr_rx_desc; /**< Downlink data management */
#if HSPI_TX_MEM_MALLOC
u8 txdoneflag; /**< tx done falg*/
#endif
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup HSPI_Driver_APIs HSPI Driver APIs
* @brief HSPI driver APIs
*/
/**
* @addtogroup HSPI_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial HSPI register.
*
* @param[in] None
*
* @retval 0 success
* @retval other failed
*
* @note When the system is initialized, the function has been called, so users can not call this function.
*/
int tls_slave_spi_init(void);
/**
* @brief This function is used to enable or disable user mode.
*
* @param[in] ifenable TRUE or FALSE
*
* @return None
*
* @note If the user enables the user mode, RICM instruction in the system will not be used by SPI.
* If the user wants to use the SPI interface as other use, need to enable the user mode.
* This function must be called before the register function.
*/
void tls_set_hspi_user_mode(u8 ifenable);
/**
* @brief This function is used to set high speed interface type.
*
* @param[in] type is the interface type. HSPI_INTERFACE_SPI or HSPI_INTERFACE_SDIO
*
* @return None
*
* @note None
*/
void tls_set_high_speed_interface_type(int type);
/**
* @brief This function is used to register hspi rx command interrupt.
*
* @param[in] rx_cmd_callback is the hspi rx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_hspi_rx_cmd_callback_register(s16 (*rx_cmd_callback)(char *buf));
/**
* @brief This function is used to register hspi rx data interrupt.
*
* @param[in] rx_data_callback is the hspi rx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_hspi_rx_data_callback_register(s16 (*rx_data_callback)(char *buf));
/**
* @brief This function is used to register hspi tx data interrupt.
*
* @param[in] tx_data_callback is the hspi tx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_hspi_tx_data_callback_register(s16 (*tx_data_callback)(char *buf));
/**
* @brief This function is used to transfer data.
*
* @param[in] txbuf is a buf for saving user data.
* @param[in] len is the data length.
*
* @retval transfer data len success
* @retval 0 failed
*
* @note None
*/
int tls_hspi_tx_data(char *txbuf, int len);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_HSPI_H */
sdk/Include/Driver/wm_i2c.h
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/**************************************************************************//**
* @file wm_i2c.h
* @author
* @version
* @date
* @brief
* @copyright (c) 2014 Winner Microelectronics Co., Ltd. All rights reserved.
*****************************************************************************/
#ifndef __WM_I2C_H
#define __WM_I2C_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_regs.h"
#include "wm_type_def.h"
typedef struct
{
__IO uint32_t PRER_LO;
__IO uint32_t PRER_HI;
__IO uint32_t CTRL;
__O uint32_t TX_RX;
__O uint32_t CR_SR;
__I uint32_t TXR;
__I uint32_t CR;
}I2C_T;
#define I2C ((I2C_T *)(HR_I2C_BASE_ADDR))
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup I2C_Driver_APIs I2C Driver APIs
* @brief I2C driver APIs
*/
/**
* @addtogroup I2C_Driver_APIs
* @{
*/
/**
* @brief Init the I2C module
*
* @param freq I2C reference clock frequency in Hz that will be used
*
* @retval none
*
* @note
* the value must be between 100k and 400k
*/
void tls_i2c_init(u32 freq);
#define wm_i2c_int_mask(bl) do { tls_bitband_write(HR_I2C_CTRL, 6, bl);}while(0);
/**
* @brief send stop signal
*
*/
void tls_i2c_stop(void);
/**
* @brief Waiting for ack signal
* @retval
* - \ref WM_FAILED
* - \ref WM_SUCCESS
*/
int tls_i2c_wait_ack(void);
/**
* @brief Writes the data to data register of I2C module
* when ifstart one the start signal will be sent followed by the data
* when ifstart zero only the data will be send
*
* @param[in] data the data will be write to the data register of I2C module
* @param[in] ifstart when one send start signal, when zero don't
*
* @retval
*
*/
void tls_i2c_write_byte(u8 data, u8 ifstart);
/**
* @brief Get the data stored in data register of I2C module
*
* @param[in] ifack when one send ack after reading the data register,when zero don't
* @param[in] ifstop when one send stop signal after read, when zero do not send stop
*
* @retval
* the received data
*/
u8 tls_i2c_read_byte(u8 ifack, u8 ifstop);
/**
* @brief This function is used to register i2c transfer done callback function.
*
* @param[in] done is the i2c transfer done callback function.
*
* @retval None
*
* @note None
*/
void wm_i2c_transfer_done_register(void (*done)(void));
/**
* @brief Start writing through int mode
*
* @param[in] devaddr the device address
* @param[in] wordaddr when one send stop signal after read, when zero do not send stop
* @param[in] buf the address point where data shoule be stored
* @param[in] len the length of data will be received
*
* @retval
* - \ref WM_FAILED
* - \ref WM_SUCCESS
*/
int wm_i2c_start_write_it(uint8_t devaddr, uint8_t wordaddr, uint8_t * buf, uint16_t len);
/**
* @brief start read through int mode
*
* @param[in] devaddr the device address
* @param[in] wordaddr when one send stop signal after read, when zero do not send stop
* @param[in] buf the address point where data shoule be stored
* @param[in] len the length of data will be received
*
* @retval
* - \ref WM_FAILED
* - \ref WM_SUCCESS
*/
int wm_i2c_start_read_it(uint8_t devaddr, uint8_t wordaddr, uint8_t * buf, uint16_t len);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_i2s.h
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/**************************************************************************//**
* @file wm_i2s.h
* @author
* @version
* @date
* @brief
*
* @copyright (c) 2014 Winner Microelectronics Co., Ltd. All rights reserved.
*****************************************************************************/
#ifndef __WM_I2S_H
#define __WM_I2S_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_type_def.h"
#include "wm_regs.h"
#include "wm_osal.h"
#include "misc.h"
#include "wm_dma.h"
#define I2S_CTRL_FORMAT_Pos (24) /*!< CTRL : FORMAT Position */
#define I2S_CTRL_FORMAT_MASK (3UL<<I2S_CTRL_FORMAT_Pos) /*!< CTRL : FORMAT mask */
#define I2S_CTRL_FORMAT_I2S (0x0UL<<I2S_CTRL_FORMAT_Pos) /*!< I2S data format*/
#define I2S_CTRL_FORMAT_MSB (0x1UL<<I2S_CTRL_FORMAT_Pos) /*!< MSB data format*/
#define I2S_CTRL_FORMAT_PCMA (0x2UL<<I2S_CTRL_FORMAT_Pos) /*!< PCMA data format*/
#define I2S_CTRL_FORMAT_PCMB (0x3UL<<I2S_CTRL_FORMAT_Pos) /*!< PCMB data format*/
#define I2S_CTRL_DATABIT_MASK (0x30UL) /*!< CTRL : DATABIT mask */
#define I2S_CTRL_DATABIT_8 ((uint8_t)0x0) /*!< I2S data width is 8-bit */
#define I2S_CTRL_DATABIT_16 ((uint8_t)0x10) /*!< I2S data width is 16-bit */
#define I2S_CTRL_DATABIT_24 ((uint8_t)0x20) /*!< I2S data width is 24-bit */
#define I2S_CTRL_DATABIT_32 ((uint8_t)0x30) /*!< I2S data width is 32-bit */
#define I2S_CTRL_CHSEL_Pos (23) /*!< CTRL : Channel select position */
#define I2S_CTRL_CHSEL_MASK (1UL<<I2S_CTRL_CHSEL_Pos) /*!< CTRL: Channel select mask */
#define I2S_CTRL_CHSEL_LEFT (1UL<<I2S_CTRL_CHSEL_Pos) /*!< CTRL: Left channel select */
#define I2S_CTRL_CHSEL_RIGHT (0UL<<I2S_CTRL_CHSEL_Pos) /*!< CTRL: Right channel select */
#define I2S_CTRL_STEREO_MONO_Pos (22) /*!< CTRL: STEREO MONO Position */
#define I2S_CTRL_STEREO_MONO_MASK (1UL<<I2S_CTRL_STEREO_MONO_Pos) /*!< CTRL: STEREO MONO MASK */
#define I2S_CTRL_MONO (1UL<<I2S_CTRL_STEREO_MONO_Pos) /*!< Monaural channel */
#define I2S_CTRL_STERO (0UL<<I2S_CTRL_STEREO_MONO_Pos) /*!< Stereo channel */
#define I2S_CTRL_RXDMA_Pos (21) /*!< CTRL: RXDMA Position */
#define I2S_CTRL_RXDMA_MASK (1UL<<I2S_CTRL_RXDMA_Pos) /*!< CTRL: RXDMA mask */
#define I2S_CTRL_TXDMA_Pos (20) /*!< CTRL: TXDMA Position*/
#define I2S_CTRL_TXDMA_MASK (1UL<<I2S_CTRL_TXDMA_Pos) /*!< CTRL: TXDMA mask */
#define I2S_CTRL_RX_CLR_Pos (19) /*!< CTRL: RXFIFO clear Position */
#define I2S_CTRL_RX_CLR_MASK (1UL<<I2S_CTRL_RX_CLR_Pos) /*!< CTRL: RXFIFO clear mask */
#define I2S_CTRL_TX_CLR_Pos (18) /*!< CTRL: TXFIFO clear Position */
#define I2S_CTRL_TX_CLR_MASK (1UL<<I2S_CTRL_TX_CLR_Pos) /*!< CTRL: TXFIFO clear mask */
#define I2S_CTRL_LZCEN_Pos (17) /*!< CTRL: LZCEN Position */
#define I2S_CTRL_LZCEN_MASK (1UL<<I2S_CTRL_LZCEN_Pos) /*!< CTRL: LZCEN mask */
#define I2S_CTRL_RZCEN_Pos (16) /*!< CTRL: RZCEN Position */
#define I2S_CTRL_RZCEN_MASK (1UL<<I2S_CTRL_RZCEN_Pos) /*!< CTRL: RZCEN mask */
#define I2S_CTRL_RXTH_Pos (12) /*!< CTRL: RXTH Position */
#define I2S_CTRL_RXTH_MASK (7UL<<I2S_CTRL_RXTH_Pos) /*!< CTRL: RXTH mask */
#define I2S_CTRL_TXTH_Pos (9) /*!< CTRL: TXTH Position */
#define I2S_CTRL_TXTH_MASK (7UL<<I2S_CTRL_TXTH_Pos) /*!< CTRL: TXTH mask */
#define I2S_CTRL_MUTE_Pos (3) /*!< CTRL: MUTE Position */
#define I2S_CTRL_MUTE_MASK (1UL<<I2S_CTRL_MUTE_Pos) /*!< CTRL: MUTE mask */
#define I2S_CTRL_RXE_Pos (2) /*!< CTRL: RXEN Position */
#define I2S_CTRL_RXE_MASK (1UL<<I2S_CTRL_RXE_Pos) /*!< CTRL: RXEN mask */
#define I2S_CTRL_TXE_Pos (1) /*!< CTRL: TXEN Position */
#define I2S_CTRL_TXE_MASK (1UL<<I2S_CTRL_TXE_Pos) /*!< CTRL: TXEN mask */
#define I2S_CTRL_EN_Pos (0) /*!< CTRL: EN Position */
#define I2S_CTRL_EN_MASK (1UL<<I2S_CTRL_EN_Pos) /*!< CTRL: EN mask */
#define I2S_INT_MASK_LZC ((uint16_t)0x200) /*!< Left Channel Zero-Cross Interrupt MASK */
#define I2S_INT_MASK_RZC ((uint16_t)0x100) /*!< Right Channel Zero-Cross Interrupt MASK */
#define I2S_INT_MASK_TXDONE ((uint16_t)0x080) /*!< Transmit Done Interrupt Mask */
#define I2S_INT_MASK_TXTH ((uint16_t)0x040) /*!< Transmit FIFO Threshold level Interrupt MASK */
#define I2S_INT_MASK_TXOV ((uint16_t)0x020) /*!< Transmit FIFO Overflow Interrupt MASK */
#define I2S_INT_MASK_TXUD ((uint16_t)0x010) /*!< Transmit FIFO Underflow Interrupt MASK */
#define I2S_INT_MASK_RXDONE ((uint16_t)0x008) /*!< Receive Done Interrupt Mask */
#define I2S_INT_MASK_RXTH ((uint16_t)0x004) /*!< Receive FIFO Threshold level Interrupt MASK */
#define I2S_INT_MASK_RXOV ((uint16_t)0x002) /*!< Receive FIFO Overflow Interrupt MASK */
#define I2S_INT_MASK_RXUD ((uint16_t)0x001) /*!< Receive FIFO Underflow Interrupt MASK */
#define I2S_FLAG_TX_Pos (12) /*!< INT_SRC: TX interrupt flag Position */
#define I2S_FLAG_RX_Pos (11) /*!< INT_SRC: RX interrupt flag Position */
#define I2S_FLAG_I2S_Pos (10) /*!< INT_SRC: I2S module interrupt flag Position */
#define I2S_FLAG_LZC_Pos (9) /*!< INT_SRC: LZC module interrupt flag Position */
#define I2S_FLAG_RZC_Pos (8) /*!< INT_SRC: RZC module interrupt flag Position */
#define I2S_FLAG_TXDONE_Pos (7) /*!< INT_SRC: TXDONE module interrupt flag Position */
#define I2S_FLAG_TXTH_Pos (6) /*!< INT_SRC: TXTH module interrupt flag Position */
#define I2S_FLAG_TXOV_Pos (5) /*!< INT_SRC: TXOV module interrupt flag Position */
#define I2S_FLAG_TXUD_Pos (4) /*!< INT_SRC: TXUD module interrupt flag Position */
#define I2S_FLAG_RXDONE_Pos (3) /*!< INT_SRC: RXDONE module interrupt flag Position */
#define I2S_FLAG_RXTH_Pos (2) /*!< INT_SRC: RXTH module interrupt flag Position */
#define I2S_FLAG_RXOV_Pos (1) /*!< INT_SRC: RXOV module interrupt flag Position */
#define I2S_FLAG_RXUD_Pos (0) /*!< INT_SRC: RXUD module interrupt flag Position */
#define I2S_FLAG_TX (1<<I2S_FLAG_TX_Pos) /*!< INT_SRC: TX interrupt flag */
#define I2S_FLAG_RX (1<<I2S_FLAG_RX_Pos) /*!< INT_SRC: RX interrupt flag */
#define I2S_FLAG_I2S (1<<I2S_FLAG_I2S_Pos) /*!< INT_SRC: I2S module interrupt flag */
#define I2S_FLAG_LZC (1<<I2S_FLAG_LZC_Pos) /*!< INT_SRC: LZC module interrupt flag */
#define I2S_FLAG_RZC (1<<I2S_FLAG_RZC_Pos) /*!< INT_SRC: RZC module interrupt flag */
#define I2S_FLAG_TXDONE (1<<I2S_FLAG_TXDONE_Pos) /*!< INT_SRC: TXDONE module interrupt flag */
#define I2S_FLAG_TXTH (1<<I2S_FLAG_TXTH_Pos) /*!< INT_SRC: TXTH module interrupt flag */
#define I2S_FLAG_TXOV (1<<I2S_FLAG_TXOV_Pos) /*!< INT_SRC: TXOV module interrupt flag */
#define I2S_FLAG_TXUD (1<<I2S_FLAG_TXUD_Pos) /*!< INT_SRC: TXUD module interrupt flag */
#define I2S_FLAG_RXDONE (1<<I2S_FLAG_RXDONE_Pos) /*!< INT_SRC: RXDONE module interrupt flag */
#define I2S_FLAG_RXTH (1<<I2S_FLAG_RXTH_Pos) /*!< INT_SRC: RXTH module interrupt flag */
#define I2S_FLAG_RXOV (1<<I2S_FLAG_RXOV_Pos) /*!< INT_SRC: RXOV module interrupt flag */
#define I2S_FLAG_RXUD (1<<I2S_FLAG_RXUD_Pos) /*!< INT_SRC: RXUD module interrupt flag */
#define I2S_RX_FIFO_CNT_MASK (0x0F) /*!< RX fifo count mask */
#define I2S_TX_FIFO_CNT_MASK (0xF0) /*!< TX fifo count mask */
#define I2S_MAX_RXTXFIFO_LEVEL (8) /*!< max rx/tx fifo level */
#define WM_I2S_TX_DMA_CHANNEL (4)
#define WM_I2S_RX_DMA_CHANNEL (5)
typedef void (*tls_i2s_callback)();
typedef struct
{
/** I2S Control Register */
__IO uint32_t CTRL;
/** I2S Interrupt mask Register */
__IO uint32_t INT_MASK;
/** I2S Interrupt source Register */
__IO uint32_t INT_SRC;
/** I2S Interrupt status Register */
__I uint32_t INT_STATUS;
/** I2S TX data Register */
__O uint32_t TX;
/** I2S RX data Register */
__I uint32_t RX;
} I2S_T;
/** base address of the I2S module */
#define I2S ((I2S_T *)HR_I2S_REG_BASE)
typedef enum
{
/** left channel select */
I2S_CHANNEL_LEFT = I2S_CTRL_CHSEL_LEFT,
/** right channel select */
I2S_CHANNEL_RIGHT = I2S_CTRL_CHSEL_RIGHT
} I2S_CHANNEL_SEL;
typedef struct tls_i2s_options
{
/** I2S receiver enable */
uint8_t rx_en;
/** I2S transfer enable */
uint8_t tx_en;
/** I2S Stereo or Monaural
- \ref I2S_CTRL_STERO
- \ref I2S_CTRL_MONO
*/
uint32_t stereo_mono;
/** I2S module format
- \ref I2S_CTRL_FORMAT_I2S
- \ref I2S_CTRL_FORMAT_MSB
- \ref I2S_CTRL_FORMAT_PCMA
- \ref I2S_CTRL_FORMAT_PCMB
*/
uint32_t format;
/** I2S module data width
- \ref I2S_CTRL_DATABIT_8
- \ref I2S_CTRL_DATABIT_16
- \ref I2S_CTRL_DATABIT_24
- \ref I2S_CTRL_DATABIT_32
*/
uint32_t data_width;
/** I2S module sample rate max 128KHz */
uint32_t sample_rate;
} tls_i2s_options_t;
typedef struct tls_i2s_buf_t
{
/** pointer the bufffer address */
uint32_t * buf;
/** the buffer size in bytes */
uint16_t len;
/** current position of the data */
uint16_t index;
}tls_i2s_buf;
typedef struct _tls_i2s_port
{
/** i2s config params */
struct tls_i2s_options opts;
/** pointer to the I2S registers */
I2S_T * regs;
/** the semaphore used to synchronous transmission */
tls_os_sem_t *tx_sem;
/** instance of tls_i2s_buf struct for data receive */
tls_i2s_buf rx_buf;
/** instance of tls_i2s_buf struct for data receive */
tls_i2s_buf tx_buf;
/** function pointer for data receiver when in interrupt mode */
void (*rx_callback)(u16 len);
/** function pointer for data transmit when in interrupt mode */
void (*tx_callback)(u16 len);
} tls_i2s_port_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup I2S_Driver_APIs I2S Driver APIs
* @brief I2S driver APIs
*/
/**
* @addtogroup I2S_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial i2s port.
* @param[in] opts the i2s setting options,if this param is NULL,this function will use the default options.
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
*
*/
int tls_i2s_port_init(tls_i2s_options_t *opts);
/**
* @brief This function is used to config i2s port.
* @param[in] opts is the i2s setting options
*
*/
void tls_i2s_config(tls_i2s_options_t *opts);
/**
* @brief Set the frequency of the i2s port.
* @param[in] freq the required frequency of the i2s module
* @retval
*
*/
void tls_i2s_set_freq(uint32_t freq);
/**
* @brief set the frequency of the i2s port.
*
* @param[in] freq the required frequency of the i2s module
* @param[in] exclk the frequency of the external clock
*
* @retval
*
*/
void wm_i2s_set_freq_exclk(uint32_t freq, uint32_t exclk);
/**
* @brief This function is used to transfer data in blocking mode.
* @param[in] buf pointer to data buffer
* @param[in] len amount of data to be sent.
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
*/
int tls_i2s_tx_block(uint32_t *buf, uint16_t len);
/**
* @brief This function is used to transfer data in non-blocking mode.
* @param[in] buf pointer to data buffer
* @param[in] len bytes of data to be sent.
* @param[in] tx_callback function pointer to a callback,when the data have been sent this specified function will be called
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
* @note
* this function only submit the data
* when the data transfer finished the tx_callback function will be called
*/
int tls_i2s_tx_nonblock(uint32_t *buf, uint16_t len, void (*tx_callback)(u16 len));
/**
* @brief This function is used to receive data in non-blocking mode.
* @param[in] buf pointer to data buffer
* @param[in] len bytes of data to be sent.
* @param[in] rx_callback function pointer to a callback,when the data have been received this specified function will be called
*
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
* @note
*
*/
int tls_i2s_rx_nonblock(uint32_t *buf, uint16_t len, void (*rx_callback)(u16 len));
/**
* @brief This function is used to transmit data in DMA mode.
* @param[in] buf pointer to data buffer
* @param[in] len bytes of data to be sent.
* @param[in] callback function pointer to a callback,when the data have been sent this specified function will be called
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
* @note
*
*/
int tls_i2s_tx_dma(uint32_t * addr, uint16_t len, tls_i2s_callback callback);
/**
* @brief This function is used to receive data in DMA mode.
* @param[in] addr pointer to data buffer
* @param[in] len bytes of data to be sent.
* @param[in] callback function pointer to a callback,when the data have been received this specified function will be called
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
* @note
* this function only submit the data
* when the data transfer finished the callback function will be called
*/
int tls_i2s_rx_dma(uint32_t * addr, uint16_t len, tls_i2s_callback callback);
/**
* @brief Enable I2S module
*
*/
#define TLS_I2S_ENABLE() (I2S->CTRL |= I2S_CTRL_EN_MASK)
/**
* @brief Disable I2S module
*
*/
#define TLS_I2S_DISABLE() (I2S->CTRL &= ~I2S_CTRL_EN_MASK)
/**
* @brief Enable clock of I2S module
*
*/
#define TLS_I2S_CLK_ENABLE() \
do { \
tls_bitband_write(HR_CLK_BASE_ADDR, HR_CLK_I2S_GATE_Pos , 1); \
} while(0)
/**
* @brief Disnable clock of I2S module
*
*/
#define TLS_I2S_CLK_DISABLE() \
do { \
tls_bitband_write(HR_CLK_BASE_ADDR, HR_CLK_I2S_GATE_Pos , 0); \
} while(0)
/**
* @brief Enable transmit of I2S module
*
*/
#define TLS_I2S_TX_ENABLE() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_TXE_Pos, 1); \
} while(0)
/**
* @brief Disable transmit of I2S module
*
*/
#define TLS_I2S_TX_DISABLE() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_TXE_Pos, 0); \
} while(0)
/**
* @brief Enable receive of I2S module
*
*/
#define TLS_I2S_RX_ENABLE() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_RXE_Pos, 1); \
} while(0)
/**
* @brief Disable receive of I2S module
*
*/
#define TLS_I2S_RX_DISABLE() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_RXE_Pos, 0); \
} while(0)
/**
* @brief Clear receive FIFO
*
*/
#define TLS_I2S_RX_FIFO_CLEAR() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_RX_CLR_Pos, 1); \
} while(0)
/**
* @brief Clear transmit FIFO
*
*/
#define TLS_I2S_TX_FIFO_CLEAR() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_TX_CLR_Pos, 1); \
} while(0)
/**
* @brief Enable transmit DMA request
*
*/
#define TLS_I2S_TXDMA_ENABLE() (I2S->CTRL |= I2S_CTRL_TXDMA_MASK)
/**
* @brief Disnable transmit DMA request
*
*/
#define TLS_I2S_TXDMA_DISABLE() (I2S->CTRL &= ~I2S_CTRL_TXDMA_MASK)
/**
* @brief Enable receive DMA request
*
*/
#define TLS_I2S_RXDMA_ENABLE() (I2S->CTRL |= I2S_CTRL_RXDMA_MASK)
/**
* @brief Disnable receive DMA request
*
*/
#define TLS_I2S_RXDMA_DISABLE() (I2S->CTRL &= ~I2S_CTRL_RXDMA_MASK)
/**
* @brief Left channel zero-cross detection enable
*
*/
#define TLS_I2S_LZC_ENABLE() (I2S->CTRL |= I2S_CTRL_LZCEN_MASK)
/**
* @brief Left channel zero-cross detection disable
*
*/
#define TLS_I2S_LZC_DISABLE() (I2S->CTRL &= ~I2S_CTRL_LZCEN_MASK)
/**
* @brief Right channel zero-cross detection enable
*
*/
#define TLS_I2S_RZC_ENABLE() (I2S->CTRL |= I2S_CTRL_RZCEN_MASK)
/**
* @brief Right channel zero-cross detection disable
*
*/
#define TLS_I2S_RZC_DISABLE() (I2S->CTRL &= ~I2S_CTRL_RZCEN_MASK)
/** @brief Enable transmit mute
*
*/
#define TLS_I2S_TX_MUTE_ENABLE() (I2S->CTRL |= I2S_CTRL_MUTE_MASK)
/**
* @brief Disable transmit mute
*
*/
#define TLS_I2S_TX_MUTE_DISABLE() (I2S->CTRL &= ~ I2S_CTRL_MUTE_MASK)
/**
* @brief Set receive FIFO threshold level
* @param[in] level The value set to Rx threshold level
*
*/
static __inline__ void tls_i2s_set_rxth(uint8_t level)
{
if (level > 8)
{
level = 3;
}
I2S->CTRL &= ~ I2S_CTRL_RXTH_MASK;
I2S->CTRL |= ((level - 1)<<I2S_CTRL_RXTH_Pos);
}
/**
* @brief Set transmit FIFO threshold level
* @param[in] level The value set to Tx threshold level
*/
static __inline__ void tls_i2s_set_txth(uint8_t level)
{
if (level > 8)
level = 4;
I2S->CTRL &= ~ I2S_CTRL_TXTH_MASK;
I2S->CTRL |= (level<<I2S_CTRL_TXTH_Pos);
}
/**
* @brief Enable or disable receiver of I2S module
* @param[in] enable When one enable the receiver of I2S module, when zero disable
*/
static __inline__ void tls_i2s_channel_sel(I2S_CHANNEL_SEL channel_sel)
{
I2S->CTRL &= ~ I2S_CTRL_CHSEL_MASK;
I2S->CTRL |= channel_sel;
}
/**
* @brief Enables or disables the specified I2S interrupts
* @param[in] i2s_int_mask specifies the I2S interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* - \ref I2S_INT_MASK_LZC
* - \ref I2S_INT_MASK_RZC
* - \ref I2S_INT_MASK_TXDONE
* - \ref I2S_INT_MASK_TXTH
* - \ref I2S_INT_MASK_TXOV
* - \ref I2S_INT_MASK_TXUD
* - \ref I2S_INT_MASK_RXDONE
* - \ref I2S_INT_MASK_RXTH
* - \ref I2S_INT_MASK_RXOV
* - \ref I2S_INT_MASK_RXUD
* @param[in] enable when set 1 disable interrupt, 0 enable
* @retval None
*/
static __inline__ void tls_i2s_int_config(uint32_t i2s_int_mask, uint8_t enable)
{
if(enable)
{
I2S->INT_MASK &= ~i2s_int_mask;
}
else
{
I2S->INT_MASK |= i2s_int_mask;
}
}
/**
* @brief Enable master clock (MCLK).
* @param[in] clock The target MCLK clock rate.
* @retval actual MCLK clock rate
* @details Set the master clock rate according to u32BusClock parameter and enable master clock output.
* The actual master clock rate may be different from the target master clock rate.
* The real master clock rate will be returned for reference.
*/
uint32_t tls_i2s_mclk_enable(uint32_t clock);
/**
* @brief disable master clock (MCLK).
*
*/
void tls_i2s_mclk_disable(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /** __WM_I2S_H*/
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_internal_flash.h
+239
View File
@@ -0,0 +1,239 @@
/**
* @file wm_internal_flash.h
*
* @brief inter flash driver
*
* @author dave
*
* @copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_INTERNAL_FLASH_H
#define WM_INTERNAL_FLASH_H
#include "wm_type_def.h"
#include "wm_osal.h"
typedef volatile unsigned char vu8;
typedef volatile unsigned short vu16;
typedef volatile unsigned long vu32;
#define M8(adr) (*((vu8 *) (adr)))
#define M16(adr) (*((vu16*) (adr)))
#define M32(adr) (*((vu32*) (adr)))
#define INSIDE_FLS_BLOCK_SIZE (0x10000UL)
#define INSIDE_FLS_SECTOR_SIZE (0x1000UL)
#define INSIDE_FLS_PAGE_SIZE 256
#define INSIDE_FLS_BASE_ADDR 0x8000000UL
#define INSIDE_FLS_SECBOOT_ADDR (INSIDE_FLS_BASE_ADDR + 0x02000)
enum TYPE_FLASH_ID{
SPIFLASH_MID_GD = 0xC8,
SPIFLASH_MID_ESMT = 0x1C,
SPIFLASH_MID_PUYA = 0x85,
SPIFLASH_MID_WINBOND = 0xEF,
};
/**
* @typedef struct Flash Registers
*/
typedef struct
{
vu32 ACR; /**< offset 0x000 */
vu32 KEYR; /**< offset 0x004 */
vu32 SR; /**< offset 0x008 */
vu32 CR; /**< offset 0x00C */
vu32 AR; /**< offset 0x010 */
} FLASH_TypeDef;
#define FLASH_HS 0x00000001
/** Flash Keys */
#define RDPRT_KEY 0x5AA5
#define FLASH_KEY1 0x57696E6E
#define FLASH_KEY2 0x65724D69
#define FLASH_KEY3 0x63726F21
/** Flash Control Register definitions */
#define FLASH_PG 0x00000001
#define FLASH_PER 0x00000002
#define FLASH_MER 0x00000004
#define FLASH_STRT 0x00000008
#define FLASH_LOCK 0x00000020
#define FLASH_ERRIE 0x00000040
#define FLASH_EOPIE 0x00000080
/** Flash Status Register definitions */
#define FLASH_BSY 0x00000001
#define FLASH_PGERR 0x00000002
#define FLASH_EOP 0x00000004
#define TLS_FLS_STATUS_OK (0)
#define TLS_FLS_STATUS_EINVAL (1)
#define TLS_FLS_STATUS_EBUSY (2)
#define TLS_FLS_STATUS_EPERM (3)
#define TLS_FLS_STATUS_ENOSUPPORT (4)
#define TLS_FLS_STATUS_EEXIST (5)
#define TLS_FLS_STATUS_ENOMEM (6)
#define TLS_FLS_STATUS_EOVERFLOW (7)
#define TLS_FLS_STATUS_ENODEV (8)
#define TLS_FLS_STATUS_EDEV (9)
#define TLS_FLS_STATUS_EIO (10)
#define TLS_FLS_STATUS_ENODRV (11)
#define TLS_FLS_PARAM_TYPE_ID (0)
#define TLS_FLS_PARAM_TYPE_SIZE (1)
#define TLS_FLS_PARAM_TYPE_PAGE_SIZE (2)
#define TLS_FLS_PARAM_TYPE_PROG_SIZE (3)
#define TLS_FLS_PARAM_TYPE_SECTOR_SIZE (4)
#define TLS_FLS_FLAG_UNDER_PROTECT (1<<0)
#define TLS_FLS_FLAG_FAST_READ (1<<1)
#define TLS_FLS_FLAG_AAAI (1<<2)
/**
* @struct tls_inside_fls
*/
struct tls_inside_fls
{
tls_os_sem_t *fls_lock;
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup INTERNAL_FLASH_Driver_APIs INTERNAL_FLASH Driver APIs
* @brief INTERNAL_FLASH driver APIs
*/
/**
* @addtogroup INTERNAL_FLASH_Driver_APIs
* @{
*/
/**
* @brief This function is used to unlock flash protect area [0x0~0x2000].
*
* @param None
*
* @return 0 success
* -1 fail
*
* @note None
*/
int tls_flash_unlock(void);
/**
* @brief This function is used to lock flash protect area [0x0~0x2000].
*
* @param None
*
* @return 0 success
* -1 fail
*
* @note None
*/
int tls_flash_lock(void);
/**
* @brief This function is used to get the flash semaphore.
*
* @param None
*
* @return None
*
* @note None
*/
void tls_fls_sem_lock(void);
/**
* @brief This function is used to release the flash semaphore.
*
* @param None
*
* @return None
*
* @note None
*/
void tls_fls_sem_unlock(void);
/**
* @brief This function is used to initial flash module structer.
*
* @param[in] None
*
* @retval TLS_FLS_STATUS_OK if init sucsess
* @retval TLS_FLS_STATUS_EBUSY already inited
* @retval TLS_FLS_STATUS_ENOMEM memory error
*
* @note None
*/
int tls_fls_init(void);
/**
* @brief This function is used to read data from the flash.
*
* @param[in] addr Specifies the starting address to read from.
* @param[in] buf Specified the address to save the readback data.
* @param[in] len Specifies the length of the data to read.
*
* @retval TLS_FLS_STATUS_OK if read sucsess
* @retval TLS_FLS_STATUS_EPERM if flash driver module not beed installed
* @retval TLS_FLS_STATUS_EINVAL if arguments invalid
* @retval TLS_FLS_STATUS_EIO if read fail
*
* @note None
*/
int tls_fls_read(u32 addr, u8 * buf, u32 len);
/**
* @brief This function is used to write data into the flash.
*
* @param[in] addr Specifies the starting address to write to
* @param[in] buf Pointer to a byte array that is to be written
* @param[in] len Specifies the length of the data to be written
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
*
* @note None
*/
int tls_fls_write(u32 addr, u8 * buf, u32 len);
/**
* @brief This function is used to erase the appointed sector
*
* @param[in] sector sector num of the flash, 4K bytes every sector
*
* @retval TLS_FLS_STATUS_OK if read sucsess
* @retval other if read fail
*
* @note None
*/
int tls_fls_erase(u32 sector);
void writeSRLockBit(unsigned char srbitlock);
#endif /* WM_INTERNAL_FLASH_H */
sdk/Include/Driver/wm_io.h
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/**
* @file wm_io.h
*
* @brief IO Driver Module
*
* @author lilm
*
* @copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_IO_H
#define WM_IO_H
#define TLS_IO_AB_OFFSET (0x40011200 - 0x40010C00)
/** io name */
enum tls_io_name {
WM_IO_PA_00 = 0, /**< gpio a0 */
WM_IO_PA_01, /**< gpio a1 */
WM_IO_PA_02, /**< gpio a2 */
WM_IO_PA_03, /**< gpio a3 */
WM_IO_PA_04, /**< gpio a4 */
WM_IO_PA_05, /**< gpio a5 */
WM_IO_PA_06, /**< gpio a6 */
WM_IO_PA_07, /**< gpio a7 */
WM_IO_PA_08, /**< gpio a8 */
WM_IO_PA_09, /**< gpio a9 */
WM_IO_PA_10, /**< gpio a10 */
WM_IO_PA_11, /**< gpio a11 */
WM_IO_PA_12, /**< gpio a12 */
WM_IO_PA_13, /**< gpio a13 */
WM_IO_PA_14, /**< gpio a14 */
WM_IO_PA_15, /**< gpio a15 */
WM_IO_PB_00, /**< gpio b0 */
WM_IO_PB_01, /**< gpio b1 */
WM_IO_PB_02, /**< gpio b2 */
WM_IO_PB_03, /**< gpio b3 */
WM_IO_PB_04, /**< gpio b4 */
WM_IO_PB_05, /**< gpio b5 */
WM_IO_PB_06, /**< gpio b6 */
WM_IO_PB_07, /**< gpio b7 */
WM_IO_PB_08, /**< gpio b8 */
WM_IO_PB_09, /**< gpio b9 */
WM_IO_PB_10, /**< gpio b10 */
WM_IO_PB_11, /**< gpio b11 */
WM_IO_PB_12, /**< gpio b12 */
WM_IO_PB_13, /**< gpio b13 */
WM_IO_PB_14, /**< gpio b14 */
WM_IO_PB_15, /**< gpio b15 */
WM_IO_PB_16, /**< gpio b16 */
WM_IO_PB_17, /**< gpio b17 */
WM_IO_PB_18, /**< gpio b18 */
WM_IO_PB_19, /**< gpio b19 */
WM_IO_PB_20, /**< gpio b20 */
WM_IO_PB_21, /**< gpio b21 */
WM_IO_PB_22, /**< gpio b22 */
WM_IO_PB_23, /**< gpio b23 */
WM_IO_PB_24, /**< gpio b24 */
WM_IO_PB_25, /**< gpio b25 */
WM_IO_PB_26, /**< gpio b26 */
WM_IO_PB_27, /**< gpio b27 */
WM_IO_PB_28, /**< gpio b28 */
WM_IO_PB_29, /**< gpio b29 */
WM_IO_PB_30, /**< gpio b30 */
WM_IO_PB_31 /**< gpio b31 */
};
/** option 1 of the io */
#define WM_IO_OPTION1 1
/** option 2 of the io */
#define WM_IO_OPTION2 2
/** option 3 of the io */
#define WM_IO_OPTION3 3
/** option 4 of the io */
#define WM_IO_OPTION4 4
/** option 5 of the io */
#define WM_IO_OPTION5 5
/** option 6 of the io */
#define WM_IO_OPTION6 6
/* io option1 */
#define WM_IO_OPT1_I2C_DAT WM_IO_OPTION1
#define WM_IO_OPT1_PWM1 WM_IO_OPTION1
#define WM_IO_OPT1_PWM2 WM_IO_OPTION1
#define WM_IO_OPT1_PWM3 WM_IO_OPTION1
#define WM_IO_OPT1_PWM4 WM_IO_OPTION1
#define WM_IO_OPT1_PWM5 WM_IO_OPTION1
#define WM_IO_OPT1_UART0_RXD WM_IO_OPTION1
#define WM_IO_OPT1_UART0_TXD WM_IO_OPTION1
#define WM_IO_OPT1_PWM_BRAKE WM_IO_OPTION1
#define WM_IO_OPT1_I2S_M_EXTCLK WM_IO_OPTION1
#define WM_IO_OPT1_SPI_M_DO WM_IO_OPTION1
#define WM_IO_OPT1_SPI_M_DI WM_IO_OPTION1
#define WM_IO_OPT1_SPI_M_CS WM_IO_OPTION1
#define WM_IO_OPT1_SPI_M_CK WM_IO_OPTION1
#define WM_IO_OPT1_I2S_S_RL WM_IO_OPTION1
#define WM_IO_OPT1_I2S_S_SCL WM_IO_OPTION1
#define WM_IO_OPT1_I2S_S_SDA WM_IO_OPTION1
#define WM_IO_OPT1_I2S_M_RL WM_IO_OPTION1
#define WM_IO_OPT1_I2S_M_SCL WM_IO_OPTION1
#define WM_IO_OPT1_I2S_M_SDA WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_RST WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_TDO WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_TDI WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_TCK_SWDCK WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_TMS_SWDAT WM_IO_OPTION1
#define WM_IO_OPT1_UART1_RXD WM_IO_OPTION1
#define WM_IO_OPT1_UART1_TXD WM_IO_OPTION1
#define WM_IO_OPT1_UART1_RTS WM_IO_OPTION1
#define WM_IO_OPT1_UART1_CTS WM_IO_OPTION1
#define WM_IO_OPT1_SDIO_DAT WM_IO_OPTION1
/* io option2 */
#define WM_IO_OPT2_PWM1 WM_IO_OPTION2
#define WM_IO_OPT2_PWM2 WM_IO_OPTION2
#define WM_IO_OPT2_PWM3 WM_IO_OPTION2
#define WM_IO_OPT2_PWM4 WM_IO_OPTION2
#define WM_IO_OPT2_PWM5 WM_IO_OPTION2
#define WM_IO_OPT2_SPI_M_DO WM_IO_OPTION2
#define WM_IO_OPT2_SPI_M_DI WM_IO_OPTION2
#define WM_IO_OPT2_SPI_M_CS WM_IO_OPTION2
#define WM_IO_OPT2_SPI_M_CK WM_IO_OPTION2
#define WM_IO_OPT2_I2C_SCL WM_IO_OPTION2
#define WM_IO_OPT2_I2S_M_EXTCLK WM_IO_OPTION2
#define WM_IO_OPT2_UART1_RXD WM_IO_OPTION2
#define WM_IO_OPT2_UART1_TXD WM_IO_OPTION2
#define WM_IO_OPT2_UART1_RTS WM_IO_OPTION2
#define WM_IO_OPT2_UART1_CTS WM_IO_OPTION2
#define WM_IO_OPT2_I2C_DAT WM_IO_OPTION2
#define WM_IO_OPT2_PWM_BRAKE WM_IO_OPTION2
#define WM_IO_OPT2_UART0_RTS WM_IO_OPTION2
#define WM_IO_OPT2_UART0_CTS WM_IO_OPTION2
#define WM_IO_OPT2_SDIO_DAT WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_CK WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_INT WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_CS WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_DI WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_DO WM_IO_OPTION2
/* io option3 */
#define WM_IO_OPT3_UART0_RXD WM_IO_OPTION3
#define WM_IO_OPT3_UART0_TXD WM_IO_OPTION3
#define WM_IO_OPT3_UART0_RTS WM_IO_OPTION3
#define WM_IO_OPT3_UART0_CTS WM_IO_OPTION3
#define WM_IO_OPT3_SPI_M_DO WM_IO_OPTION3
#define WM_IO_OPT3_SPI_M_DI WM_IO_OPTION3
#define WM_IO_OPT3_SPI_M_CS WM_IO_OPTION3
#define WM_IO_OPT3_SDIO_CK WM_IO_OPTION3
#define WM_IO_OPT3_SDIO_CMD WM_IO_OPTION3
#define WM_IO_OPT3_SDIO_DAT WM_IO_OPTION3
/* io option4 */
#define WM_IO_OPT4_I2S_M_MCLK WM_IO_OPTION4
#define WM_IO_OPT4_I2S_M_RL WM_IO_OPTION4
#define WM_IO_OPT4_I2S_M_SCL WM_IO_OPTION4
#define WM_IO_OPT4_I2S_M_SDA WM_IO_OPTION4
/* io option5 */
#define WM_IO_OPT5_GPIO WM_IO_OPTION5
/* io option6 */
#define WM_IO_OPT6_ADC WM_IO_OPTION6
#define WM_IO_OPT6_LCD_COM WM_IO_OPTION6
#define WM_IO_OPT6_LCD_SEG WM_IO_OPTION6
/**
* @brief This function is used to config io function
*
* @param[in] name io name
* @param[in] option io function option, value is WM_IO_OPT*_*, also is WM_IO_OPTION1~6
*
* @return None
*
* @note None
*/
void tls_io_cfg_set(enum tls_io_name name, u8 option);
/**
* @brief This function is used to get io function config
*
* @param[in] name io name
*
* @retval WM_IO_OPTION1~6 Mapping io function
*
* @note None
*/
int tls_io_cfg_get(enum tls_io_name name);
#endif /* end of WM_IO_H */
sdk/Include/Driver/wm_iouart.h
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/*****************************************************************************
*
* File Name : wm_iouart.h
*
* Description: IO uart Driver Module
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
* All rights reserved.
*
* Author : dave
*
* Date : 2015-8-13
*****************************************************************************/
#ifndef WM_IO_UART_H
#define WM_IO_UART_H
#include "wm_uart.h"
#include "wm_io.h"
#define IO_UART_FOR_PRINT 0
#define IO_UART_TX WM_IO_PB_08
#define IO_UART_RX WM_IO_PB_09
#define IO_UART_HIGH 1
#define IO_UART_LOW 0
#define TLS_IO_UART_RX_BUF_SIZE 1024
#define TLS_IO_UART_TX_BUF_SIZE 1024
#define IO_UART_RATE_MUL 8 //采样率=该值*波特率
#define IO_UART_ONEBITE_SAMPLE_NUM 2
#define IO_UART_ONEBYTE_BIT 10
typedef struct tls_io_uart{
struct tls_uart_circ_buf recv;
int timercnt;
u8 bit[IO_UART_ONEBITE_SAMPLE_NUM]; //每个bit采样3次，然后判断高低电平
u8 bitcnt; //单个bit采样次数
u8 bitnum; //bit号，一个byte共有10个bit(1个起始位+8个数据位+1个停止位)
u8 ifrx; //是否正在rx
u8 iftx; //是否正在tx
u8 timerid;
}tls_io_uart_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup IOUART_Driver_APIs IOUART Driver APIs
* @brief IOUART driver APIs
*/
/**
* @addtogroup IOUART_Driver_APIs
* @{
*/
/**
* @brief This function is used to initialize uart io
*
* @param[in] bandrate iouart baudrate
*
* @return WM_SUCCESS success
* @return WM_FAILED fail
*
* @note None
*/
int tls_iouart_init(int bandrate);
/**
* @brief This function is used to restore uart io cfg
*
* @param[in] None
*
* @return WM_SUCCESS success
*
* @note None
*/
int tls_iouart_destroy(void);
/**
* @brief This function is used to read data from uart io
*
* @param[in] buf is the user buffer
* @param[in] readsize is the user read size
*
* @return >0 copy data size
* @return WM_FAILED fail
*
* @note None
*/
int tls_iouart_read(u8 * buf, int bufsize);
/**
* @brief This function is used to transfer data synchronously.
*
* @param[in] buf is a buf for saving user data
* @param[in] writesize is the user data length
*
* @retval WM_SUCCESS tx success
* @retval WM_FAILED tx failed
*
* @note None
*/
int tls_iouart_write(u8 * buf, int bufsize);
/**
* @brief This function is used to output a character to the serial port.
*
* @param[in] ch character to be output
*
* @retval ch
*
* @note None
*/
int tls_iouart_output_char(int ch);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_IO_UART_H */
sdk/Include/Driver/wm_irq.h
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/**
* @file wm_irq.h
*
* @brief interupt driver module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_IRQ_H
#define WM_IRQ_H
#include "wm_type_def.h"
/* Number of interrupts. */
#define INTR_CNT 41
#define SDIO_UP_DATA_INT (0UL)
#define SDIO_DOWN_DATA_INT (1UL)
#define SDIO_UP_CMD_INT (2UL)
#define SDIO_DOWN_CMD_INT (3UL)
#define MAC_INT (4UL)
#define RX_INT (6UL)
#define TX_MGMT_COMPLETE_INT (7UL)
#define TX_DATA_COMPLETE_INT (8UL)
#define PMU_TIMER1_INT (9UL)
#define PMU_TIMER0_INT (10UL)
#define PMU_GPIO_WAKEUP_INT (11UL)
#define PMU_SDIO_WAKEUP_INT (12UL)
#define DMA0_INT (13UL)
#define DMA1_INT (14UL)
#define DMA2_INT (15UL)
#define DMA3_INT (16UL)
#define DMA4_INT (17UL)
#define DMA_BURST_INT (18UL)
#define I2C_INT (19UL)
#define ADC_INT (20UL)
#define SPI0_INT (21UL)
#define SPI1_INT (22UL)
#define UART0_INT (23UL)
#define UART1_INT (24UL)
#define GPIO_INT (25UL)
#define TIMER0_INT (26UL)
#define TIMER1_INT (27UL)
#define TIMER2_INT (28UL)
#define TIMER3_INT (29UL)
#define TIMER4_INT (30UL)
#define TIMER5_INT (31UL)
#define WATCHDOG_INT (32UL)
#define PMU_BOD_INT (33UL)
#define FLASH_INT (34UL)
#define PWM_INT (35UL)
#define I2S_INT (36UL)
#define PMU_RTC_INT (37UL)
#define RSA_INT (38UL)
#define CRYPTION_INT (39UL)
#define GPIOB_INT (40UL)
#define UART2_INT (41UL)
#define IRQ_MAX_SYSCALL_PRIORITY 0x0B
typedef void (*intr_handler_func) (void *);
/**
* @typedef struct tls_irq_handler
*/
typedef struct tls_irq_handler
{
void (*handler) (void *);
void *data;
// const char *name;
u32 counter;
} tls_irq_handler_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup IRQ_Driver_APIs IRQ Driver APIs
* @brief IRQ driver APIs
*/
/**
* @addtogroup IRQ_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial system interrupt.
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_irq_init(void);
/**
* @brief This function is used to register interrupt handler function.
*
* @param[in] vec_no interrupt NO
* @param[in] handler
* @param[in] *data
*
* @return None
*
* @note None
*/
void tls_irq_register_handler(u8 vec_no, intr_handler_func handler, void *data);
/**
* @brief This function is used to enable interrupt.
*
* @param[in] vec_no interrupt NO
*
* @return None
*
* @note None
*/
void tls_irq_enable(u8 vec_no);
/**
* @brief This function is used to set interrupt priority.
*
* @param[in] vec_no interrupt no
* @param[in] priority priority
*
* @return None
*
* @note None
*/
void tls_irq_set_priority(u8 vec_no, u8 priority);
/**
* @brief This function is used to disable interrupt.
*
* @param[in] vec_no interrupt NO
*
* @return None
*
* @note None
*/
void tls_irq_disable(u8 vec_no);
/**
* @brief This function is used to get the isr count.
*
* @param[in] None
*
* @retval count
*
* @note None
*/
u8 tls_get_isr_count(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_IRQ_H */
sdk/Include/Driver/wm_lcd.h
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/**
* @file wm_lcd.h
*
* @brief LCD Driver Module
*
* @author dave
*
* @copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_LCD_H
#define __WM_LCD_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_regs.h"
#include <stdbool.h>
/**
* @brief LCD Register Declaration
*
*/
typedef struct
{
/** Control Register */
__IO uint32_t CTRL;
/** Refresh Rate Prescaler Register */
__IO uint32_t FRAMECNT;
/** Data Register */
__IO uint32_t COM01;
/** Data Register */
__IO uint32_t COM23;
/** Data Register */
__IO uint32_t COM45;
/** Data Register */
__IO uint32_t COM67;
/** LCD IO Control Register */
__IO uint32_t IO_EN;
} LCD_T;
/** LCD base pointer */
#define LCD ((LCD_T *)HR_LCD_REG_BASE)
typedef enum
{
/** Static (2 levels) */
BIAS_STATIC = LCD_BIAS_STATIC,
/** 1/2 Bias (3 levels) */
BIAS_ONEHALF = LCD_BIAS_ONEHALF,
/** 1/3 Bias (4 levels) */
BIAS_ONETHIRD = LCD_BIAS_ONETHIRD,
/** 1/4 Bias (4 levels) */
BIAS_ONEFOURTH = LCD_BIAS_ONEFOURTH,
} LCD_BiasDef;
typedef enum
{
/** VLCD 2.7v */
VLCD27 = LCD_VLCD_27,
/** VLCD 2.9v */
VLCD29 = LCD_VLCD_29,
/** VLCD 3.1v */
VLCD31 = LCD_VLCD_31,
/** VLCD 3.3v */
VLCD33 = LCD_VLCD_33,
} LCD_VlcdDef;
typedef enum
{
/** max configuration is 8x16 */
MODE8x16 = LCD_CR_MODE_8X16,
/** max configuration is 4x20 */
MODE4x20 = LCD_CR_MODE_4x20,
} LCD_ModeDef;
typedef enum
{
/** Static (segments can be multiplexed with LCD_COM[0]) */
DUTY_STATIC = LCD_DUTY_STATIC,
/** 1/2 Duty cycle (segments can be multiplexed with LCD_COM[0:1]) */
DUTY_ONEHALF = LCD_DUTY_ONEHALF,
/** 1/3 Duty cycle (segments can be multiplexed with LCD_COM[0:2]) */
DUTY_ONETHIRD = LCD_DUTY_ONETHIRD,
/** 1/4 Duty cycle (segments can be multiplexed with LCD_COM[0:3]) */
DUTY_ONEFOURTH = LCD_DUTY_ONEFOURTH,
/** 1/5 Duty cycle (segments can be multiplexed with LCD_COM[0:4]) */
DUTY_ONEFIFTH = LCD_DUTY_ONEFIFTH,
/** 1/6 Duty cycle (segments can be multiplexed with LCD_COM[0:5]) */
DUTY_ONESIXTH = LCD_DUTY_ONESIXTH,
/** 1/7 Duty cycle (segments can be multiplexed with LCD_COM[0:6]) */
DUTY_ONESEVENTH = LCD_DUTY_ONESEVENTH,
/** 1/8 Duty cycle (segments can be multiplexed with LCD_COM[0:7]) */
DUTY_ONEEIGHTH = LCD_DUTY_ONEEIGHTH,
} LCD_DutyDef;
typedef struct tls_lcd_options
{
bool enable;
/** 8x16 or 4x20*/
LCD_ModeDef mode;
/** Bias configuration */
LCD_BiasDef bias;
/** Duty configuration */
LCD_DutyDef duty;
/** Vlcd configuration */
LCD_VlcdDef vlcd;
/** Fresh rate configuration */
uint16_t fresh_rate;
} tls_lcd_options_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup LCD_Driver_APIs LCD Driver APIs
* @brief LCD driver APIs
*/
/**
* @addtogroup LCD_Driver_APIs
* @{
*/
/**
* @brief initialize the LCD module
* param[in] opts LCD Structure pointer
*/
void tls_lcd_init(tls_lcd_options_t *opts);
/**
* @brief Initialize LCD Frame Counter
* @param[in] freq LCD reference refresh frequency in Hz that will be used
*
*/
void tls_lcd_fresh_rate(uint16_t freq);
/**
* @brief Turn on or clear a segment
* @param[in] com Which COM line to update
* @param[in] bit Bit index of which field to change
* @param[in] enable When one will set segment, when zero will clear segment
* @note Before this function be called, the module must have been intialized
*/
void tls_lcd_seg_set(int com, int bit, int on_off);
/**
* @brief Select the voltage of LCD module
* @param[in] vlcd This parameter can be one of the following values:
* - \ref VLCD27
* - \ref VLCD29
* - \ref VLCD31
* - \ref VLCD33
*/
void tls_lcd_vlcd_sel(LCD_VlcdDef vlcd);
/**
* @brief Set the duty of LCD module
* @param[in] duty This parameter can be one of the following values:
* - \ref DUTY_STATIC
* - \ref DUTY_ONEHALF
* - \ref DUTY_ONETHIRD
* - \ref DUTY_ONEFOURTH
* - \ref DUTY_ONEFIFTH
* - \ref DUTY_ONESIXTH
* - \ref DUTY_ONESEVENTH
* - \ref DUTY_ONEEIGHTH
*
*/
void tls_lcd_duty_set(LCD_DutyDef duty);
/**
* @brief Set the bias of LCD module
* @param[in] duty This parameter can be one of the following values:
* - \ref BIAS_STATIC
* - \ref BIAS_ONEHALF
* - \ref BIAS_ONETHIRD
* - \ref BIAS_ONEFOURTH
*
*/
void tls_lcd_bias_set(LCD_BiasDef bias);
/**
* @brief Enable or disable the LCD module gpio
*
* @param[in] val Each bit of the value corresponds to a LCD gpio, set 1 gpio output enable ,0 output disabled
*
*/
void tls_lcd_io_config(unsigned int val);
/**
* @brief Enable or disable clock of LCD module
* @param[in] enable When one enable the clock of LCD module, when zero disable
*/
#define TLS_LCD_CLK_ENABLE(enable) \
do { \
tls_bitband_write(HR_CLK_BASE_ADDR, HR_CLK_LCD_GATE_Pos, enable); \
} while(0)
/**
* @brief Enable or disable the LCD module
* @param[in] enable When one enable the LCD module, when zero disable
*
*/
#define TLS_LCD_ENABLE(enable) \
do { \
tls_bitband_write(HR_LCD_CR, LCD_CR_EN_Pos, enable); \
} while(0)
/**
* @brief Enable or disable the LCD module
* @param[in] enable When one close LCD module, when zero open the LCD module
*
*/
#define TLS_LCD_POWERDOWM(enable) \
do { \
tls_bitband_write(HR_LCD_CR, LCD_CR_PD_Pos, enable); \
} while(0)
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_pmu.h
+239
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/**
* @file wm_pmu.h
*
* @brief pmu driver module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_PMU_H
#define WM_PMU_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_type_def.h"
typedef void (*tls_pmu_irq_callback)(void *arg);
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup PMU_Driver_APIs PMU Driver APIs
* @brief PMU driver APIs
*/
/**
* @addtogroup PMU_Driver_APIs
* @{
*/
/**
* @brief This function is used to register pmu timer1 interrupt
*
* @param[in] callback the pmu timer1 interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* user not need clear interrupt flag.
* pmu timer1 callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_pmu_timer1_isr_register(tls_pmu_irq_callback callback, void *arg);
/**
* @brief This function is used to register pmu timer0 interrupt
*
* @param[in] callback the pmu timer0 interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* user not need clear interrupt flag.
* pmu timer0 callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_pmu_timer0_isr_register(tls_pmu_irq_callback callback, void *arg);
/**
* @brief This function is used to register pmu gpio interrupt
*
* @param[in] callback the pmu gpio interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* user not need clear interrupt flag.
* pmu gpio callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_pmu_gpio_isr_register(tls_pmu_irq_callback callback, void *arg);
/**
* @brief This function is used to register pmu sdio interrupt
*
* @param[in] callback the pmu sdio interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* user not need clear interrupt flag.
* pmu sdio callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_pmu_sdio_isr_register(tls_pmu_irq_callback callback, void *arg);
/**
* @brief This function is used to select pmu clk
*
* @param[in] bypass pmu clk whether or not use bypass mode
* 1 pmu clk use 32K by 40MHZ
* other pmu clk 32K by calibration circuit
*
* @return None
*
* @note None
*/
void tls_pmu_clk_select(u8 bypass);
/**
* @brief This function is used to start pmu timer0
*
* @param[in] second vlaue of timer0 count[s]
*
* @return None
*
* @note None
*/
void tls_pmu_timer0_start(u16 second);
/**
* @brief This function is used to stop pmu timer0
*
* @param None
*
* @return None
*
* @note None
*/
void tls_pmu_timer0_stop(void);
/**
* @brief This function is used to start pmu timer1
*
* @param[in] second vlaue of timer1 count[ms]
*
* @return None
*
* @note None
*/
void tls_pmu_timer1_start(u16 msec);
/**
* @brief This function is used to stop pmu timer1
*
* @param None
*
* @return None
*
* @note None
*/
void tls_pmu_timer1_stop(void);
/**
* @brief This function is used to start pmu goto standby
*
* @param None
*
* @return None
*
* @note None
*/
void tls_pmu_standby_start(void);
typedef enum {
TLS_PERIPHERAL_TYPE_I2C = (1 << 0),
TLS_PERIPHERAL_TYPE_UART0 = (1 << 1),
TLS_PERIPHERAL_TYPE_UART1 = (1 << 2),
TLS_PERIPHERAL_TYPE_LSPI = (1 << 3),
TLS_PERIPHERAL_TYPE_DMA = (1 << 4),
TLS_PERIPHERAL_TYPE_RFCFG = (1 << 5),
TLS_PERIPHERAL_TYPE_TIMER = (1 << 6),
TLS_PERIPHERAL_TYPE_GPIO = (1 << 7),
TLS_PERIPHERAL_TYPE_SDADC = (1 << 8),
TLS_PERIPHERAL_TYPE_PWM = (1 << 9),
TLS_PERIPHERAL_TYPE_LCD = (1 << 10),
TLS_PERIPHERAL_TYPE_I2S = (1 << 11),
TLS_PERIPHERAL_TYPE_RSA = (1 << 12),
TLS_PERIPHERAL_TYPE_GPSEC = (1 << 13),
TLS_PERIPHERAL_TYPE_7816 = (1 << 14)
}tls_peripheral_type_s;
/**
* @brief This function is used to close peripheral's clock
*
* @param[in] devices peripherals
*
* @return None
*
* @note None
*/
void tls_close_peripheral_clock(tls_peripheral_type_s devices);
/**
* @brief This function is used to open peripheral's clock
*
* @param[in] devices peripherals
*
* @return None
*
* @note None
*/
void tls_open_peripheral_clock(tls_peripheral_type_s devices);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_PMU_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_pwm.h
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/**
* @file wm_pwm.h
*
* @brief pwm driver module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_PWM_H
#define WM_PWM_H
#include "wm_type_def.h"
/** pwm channel's maximum number */
#define PWM_CHANNEL_MAX_NUM 5
/** pwm work mode for signal generate */
enum tls_pwm_out_mode
{
WM_PWM_OUT_MODE_BRAKE = 0, /**< brake mode */
WM_PWM_OUT_MODE_ALLSYC, /**< all synchronous mode */
WM_PWM_OUT_MODE_2SYC, /**< two channel synchronous mode */
WM_PWM_OUT_MODE_MC, /**< complementary mode */
WM_PWM_OUT_MODE_INDPT /**< independent mode */
};
/** interrupt type for capture mode */
enum tls_pwm_cap_int_type{
WM_PWM_CAP_RISING_EDGE_INT, /**< rising edge arises the interrupt */
WM_PWM_CAP_FALLING_EDGE_INT, /**< falling edge arises the interrupt */
WM_PWM_CAP_RISING_FALLING_EDGE_INT, /**< both rising edge and falling edge arise the interrupt */
WM_PWM_CAP_DMA_INT /**< dma request */
};
/** pwm output status */
enum tls_pwm_out_en_state{
WM_PWM_OUT_EN_STATE_TRI, /**< set tristate status */
WM_PWM_OUT_EN_STATE_OUT /**< set output status */
};
/** pwm count mode */
enum tls_pwm_cnt_type{
WM_PWM_CNT_TYPE_EDGE_ALLGN_CAP, /**< edge alignment(only capture mode) */
WM_PWM_CNT_TYPE_EDGE_ALIGN_OUT, /**< edge alignment(only output mode) */
WM_PWM_CNT_TYPE_CENTER_ALIGN /**< central alignment */
};
/** pwm cycle type */
enum tls_pwm_loop_type{
WM_PWM_LOOP_TYPE_SINGLE, /**< single mode */
WM_PWM_LOOP_TYPE_LOOP /**< auto load */
};
/** pwm waveform inversion mode */
enum tls_pwm_waveform_inversion{
WM_PWM_WAVEFORM_NOINVERSION, /**< not inverse */
WM_PWM_WAVEFORM_INVERSION /**< inversion */
};
/** pwm output level in the brake mode */
enum tls_pwm_brake_out_level{
WM_PWM_BRAKE_OUT_HIGH, /**< output high level */
WM_PWM_BRAKE_OUT_LOW /**< output low level */
};
/** pwm initial parameters */
typedef struct _pwm_init_param{
enum tls_pwm_out_mode mode; /**< work mode */
u8 channel; /**< channel id 0~4 */
u16 clkdiv; /**< clock divided value */
u8 period; /**< period value(output frequency F = CLK/CLK_DIV/PERIOD) */
u8 duty; /**< duty radio (range 0~255, high level or low level by out_inversion decided */
bool dten; /**< enable dead zone time (ENABLE or DISABLE) */
u8 dtclkdiv; /**< dead zone clock divided value (0~3) */
u8 dtcnt; /**< period number of dead zone time (0~255) */
enum tls_pwm_cnt_type cnt_type; /**< count type */
enum tls_pwm_loop_type loop_type; /**< cycle type */
bool inverse_en; /**< output is inverse */
u8 pnum; /**< generate interrupt after pnum period */
bool pnum_int; /**< period interrupt is enable */
}pwm_init_param;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup PWM_Driver_APIs PWM Driver APIs
* @brief PWM driver APIs
*/
/**
* @addtogroup PWM_Driver_APIs
* @{
*/
/**
* @brief This function is used to register the pwm interrupt callback function
*
* @param[in] callback the pwm interrupt callback function
*
* @return None
*
* @note None
*/
void tls_pwm_isr_register(void (*callback)(void));
/**
* @brief This function is used to set duty radio
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] duty Number of active levels
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_duty_config(u8 channel, u8 duty);
/**
* @brief This function is used to set frequency
*
* @param[in] channel pwm channel NO., range form 0 to 4
* @param[in] clkdiv clock divider, range 0 to 65535
* @param[in] period the number of the counting clock cycle
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_freq_config(u8 channel, u16 clkdiv, u8 period);
/**
* @brief This function is used to set the output mode
*
* @param[in] channel pwm channel NO., range form 0 to 4
* @param[in] mode pwm work mode for signal generate
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_out_mode_config(u8 channel, enum tls_pwm_out_mode mode);
/**
* @brief This function is used to set the counting mode
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] cnt_type counting mode
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_cnt_type_config(u8 channel, enum tls_pwm_cnt_type cnt_type);
/**
* @brief This function is used to set whether to loop
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] loop_mode whether to loop
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_loop_mode_config(u8 channel, enum tls_pwm_loop_type loop_mode);
/**
* @brief This function is used to set whether to inverse the output
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] en ENABLE or DISABLE
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_out_inverse_cmd(u8 channel, bool en);
/**
* @brief This function is used to set the number of period to be generated
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] pnum the number of period to be generated,range from 0 to 255
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_stoptime_by_period_config(u8 channel, u8 pnum);
/**
* @brief This function is used to set output enable
*
* @param[in] channel pwm channel NO.,channel 0 or channel 4
* @param[in] en ENABLE or DISABLE
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_output_en_cmd(u8 channel, bool en);
/**
* @brief This function is used to set the dead time
*
* @param[in] channel pwm channel NO.,channel 0 or channel 2
* @param[in] dten whether enalbe the dead time, ENABLE or DISABLE
* @param[in] dtclkdiv dead zone clock divider, range 0 to 3
* @param[in] dtcnt the number of the counting clock cycle, range 0 to 255
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_deadzone_config(u8 channel, bool dten, u8 dtclkdiv, u8 dtcnt);
/**
* @brief This function is used to set whether to inverse the capture input
*
* @param[in] channel pwm channel NO.,channel 0 or channel 4
* @param[in] en ENABLE or DISABLE
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_capture_inverse_cmd(u8 channel, bool en);
/**
* @brief This function is used to set break mode
*
* @param[in] channel pwm channel NO.,channel 0 or channel 4
* @param[in] en whether enable the break mode,ENABLE or DISABLE
* @param[in] brok when break
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_brake_mode_config(u8 channel, bool en, enum tls_pwm_brake_out_level brok);
/**
* @brief This function is used to enable the capture mode
*
* @param[in] channel pwm channel NO.,channel 0 or channel 4
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_capture_mode_config(u8 channel);
/**
* @brief This function is used to set the interrupt about the number of period
*
* @param[in] channel pwm channel,range from 0 to 4
* @param[in] en enble or disable
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_stoptime_irq_cmd(u8 channel, bool en);
/**
* @brief This function is used to set the interrupt about the capture
*
* @param[in] channel pwm channel,channel 0 or channel 4
* @param[in] int_type interrupt type
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_capture_irq_type_config(u8 channel, enum tls_pwm_cap_int_type int_type);
/**
* @brief This function is used to initial pwm(out mode)
*
* @param[in] pwm_param structure containing the initialization parameters
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_out_init(pwm_init_param pwm_param);
/**
* @brief This function is used to initial pwm(capture mode)
*
* @param[in] channel pwm channel, channel 0 or channel 4
* @param[in] clkdiv clock divider, range 0 to 65535
* @param[in] inverse_en whether the input signal is reversed
* @param[in] int_type interrupt type
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_cap_init(u8 channel, u16 clkdiv, bool inverse_en, enum tls_pwm_cap_int_type int_type);
/**
* @brief This function is used to start pwm
*
* @param[in] channel pwm channel, range from 0 to 4
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_start(u8 channel);
/**
* @brief This function is used to set pwm's frequency
*
* @param[in] channel pwm channel no, range form 0 to 4
* @param[in] freq frequency, range from 1 to 156250
*
* @return None
*
* @note None
*/
void tls_pwm_freq_set(u8 channel, u32 freq);
/**
* @brief This function is used to set duty radio
*
* @param[in] channel pwm channel NO., range form 0 to 4
* @param[in] duty duty radio, range from 0 to 255
*
* @return None
*
* @note None
*/
void tls_pwm_duty_set(u8 channel, u8 duty);
/**
* @brief This function is used to initial pwm
*
* @param[in] channel pwm channel, range from 0 to 4
* @param[in] freq is a pointer to frequency, freq range from 1 to 156250
* @param[in] duty is a pointer to duty radio, duty range from 0 to 255
* @param[in] pnum period num,range from 0 to 255
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_init(u8 channel,u32 freq, u8 duty, u8 pnum);
/**
* @brief This function is used to initial pwm
*
* @param[in] channel pwm channel, range from 0 to 4
* @param[in] freq freq range from 1 to 156250
* @param[in] duty duty range from 0 to 255
* @param[in] pnum period num,range from 0 to 255
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_ineverse_init(u8 channel,u32 freq, u8 duty, u8 pnum);
/**
* @brief This function is used to stop pwm
*
* @param[in] channel pwm channel, range from 0 to 4
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_stop(u8 channel);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_PWM_H */
sdk/Include/Driver/wm_rtc.h
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/**
* @file wm_rtc.h
*
* @brief rtc Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_RTC_H
#define WM_RTC_H
#include <time.h>
#include "wm_type_def.h"
/** rtc interrupt callback */
typedef void (*tls_rtc_irq_callback)(void *arg);
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup RTC_Driver_APIs RTC Driver APIs
* @brief RTC driver APIs
*/
/**
* @addtogroup RTC_Driver_APIs
* @{
*/
/**
* @brief This function is used to set pmu rtc time
*
* @param[in] tblock time value
*
* @return None
*
* @note None
*/
void tls_set_rtc(struct tm *tblock);
/**
* @brief This function is used to get pmu rtc time
*
* @param[out] tblock time value
*
* @return None
*
* @note None
*/
void tls_get_rtc(struct tm *tblock);
/**
* @brief This function is used to register pmu rtc interrupt
*
* @param[in] callback the rtc interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* User does not need to clear the interrupt flag.
* Rtc callback function is called in interrupt,
* so do not operate the critical data in the callback fuuction.
* Sending messages to other tasks to handle is recommended.
*/
void tls_rtc_isr_register(tls_rtc_irq_callback callback, void *arg);
/**
* @brief This function is used to start pmu rtc timer
*
* @param[in] tblock timer value
*
* @return None
*
* @note None
*/
void tls_rtc_timer_start(struct tm *tblock);
/**
* @brief This function is used to stop pmu rtc timer
*
* @param None
*
* @return None
*
* @note This function also is used to clear rtc timer interrupt
*/
void tls_rtc_timer_stop(void);
/**
* @}
*/
/**
* @}
*/
#endif
sdk/Include/Driver/wm_timer.h
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/**
* @file wm_timer.h
*
* @brief Timer Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_TIMER_H
#define WM_TIMER_H
/** invalid timer id */
#define WM_TIMER_ID_INVALID 0xFF
#define TIMER_MS_UNIT_FLAG 1
#define TIMER_US_UNIT_FLAG 0
/** timer interrupt callback */
typedef void (*tls_timer_irq_callback)(void *arg);
/** timer unit */
enum tls_timer_unit{
TLS_TIMER_UNIT_US = 0, /**< microsecond level(us) */
TLS_TIMER_UNIT_MS /**< millisecond level(ms) */
};
/** timer configuration */
struct tls_timer_cfg {
enum tls_timer_unit unit; /**< timer accuracy */
u32 timeout; /**< timeout period */
bool is_repeat; /**< cycle timer */
tls_timer_irq_callback callback; /**< timeout callback function */
void *arg; /**< parameter fot the timeout callback function */
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup TIMER_Driver_APIs TIMER Driver APIs
* @brief TIMER driver APIs
*/
/**
* @addtogroup TIMER_Driver_APIs
* @{
*/
/**
* @brief This function is used to create a timer
*
* @param[in] cfg timer configuration
*
* @retval WM_TIMER_ID_INVALID failed
* @retval other timer id
*
* @note
* User does not need to clear the interrupt flag.
* Rtc callback function is called in interrupt,
* so do not operate the critical data in the callback fuuction.
* Sending messages to other tasks to handle is recommended.
*/
u8 tls_timer_create(struct tls_timer_cfg *cfg);
/**
* @brief This function is used to start a timer
*
* @param[in] timer_id timer id
*
* @return None
*
* @note None
*/
void tls_timer_start(u8 timer_id);
/**
* @brief This function is used to stop a timer
*
* @param[in] timer_id timer id
*
* @return None
*
* @note None
*/
void tls_timer_stop(u8 timer_id);
/**
* @brief This function is used to change a timer wait time
*
* @param[in] timer_id timer id[0~5]
*
* @param[in] newtime new wait time
*
* @retval None
*
* @note If the timer does not start, this function will start the timer
*/
void tls_timer_change(u8 timer_id, u32 newtime);
/**
* @brief This function is used to delete a timer
*
* @param[in] timer_id timer id
*
* @return None
*
* @note None
*/
void tls_timer_destroy(u8 timer_id);
/**
* @brief This function is create a delay to elapse
*
* @param[timeout] timeout the value written into TMR0_PRD
* @param[in] m_flag millisecond flag in TIMER0
*
* @return 0
*
* @note None
*/
int tls_delay_via_timer(unsigned int timeout, unsigned int m_flag);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_TIMER_H */
sdk/Include/Driver/wm_uart.h
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/**
* @file wm_uart.h
*
* @brief uart Driver Module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_UART_H
#define WM_UART_H
#include "list.h"
//#include "wm_regs.h"
#include "wm_type_def.h"
#include "wm_osal.h"
#define TLS_UART_RX_BUF_SIZE 4096
#define TLS_UART_TX_BUF_SIZE 4096
#define WAKEUP_CHARS 256
#define MBOX_MSG_UART_RX 1
#define MBOX_MSG_UART_TX 2
/** baud rate definition */
#define UART_BAUDRATE_B600 600
#define UART_BAUDRATE_B1200 1200
#define UART_BAUDRATE_B1800 1800
#define UART_BAUDRATE_B2400 2400
#define UART_BAUDRATE_B4800 4800
#define UART_BAUDRATE_B9600 9600
#define UART_BAUDRATE_B19200 19200
#define UART_BAUDRATE_B38400 38400
#define UART_BAUDRATE_B57600 57600
#define UART_BAUDRATE_B115200 115200
#define UART_BAUDRATE_B230400 230400
#define UART_BAUDRATE_B460800 460800
#define UART_BAUDRATE_B921600 921600
#define UART_BAUDRATE_B1000000 1000000
#define UART_BAUDRATE_B1250000 1250000
#define UART_BAUDRATE_B1500000 1500000
#define UART_BAUDRATE_B2000000 2000000
#define UART_RX_INT_FLAG (UIS_RX_FIFO | UIS_RX_FIFO_TIMEOUT | UIS_BREAK |\
UIS_OVERRUN | UIS_FRM_ERR | UIS_PARITY_ERR)
#define UART_RX_ERR_INT_FLAG (UIS_BREAK | UIS_FRM_ERR | \
UIS_PARITY_ERR)
#define UART_TX_INT_FLAG (UIS_TX_FIFO | UIS_TX_FIFO_EMPTY)
#ifndef UART0_INT
#define UART0_INT (23UL)
#endif
#ifndef UART1_INT
#define UART1_INT (24UL)
#endif
/** return count in buffer. */
#define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1))
/** Return space available, 0..size-1. We always leave one free char
as a completely full buffer has head == tail, which is the same as
empty. */
#define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size))
/** Return count up to the end of the buffer. Carefully avoid
accessing head and tail more than once, so they can change
underneath us without returning inconsistent results. */
#define CIRC_CNT_TO_END(head,tail,size) \
({int end = (size) - (tail); \
int n = ((head) + end) & ((size)-1); \
n < end ? n : end;})
/** Return space available up to the end of the buffer. */
#define CIRC_SPACE_TO_END(head,tail,size) \
({int end = (size) - 1 - (head); \
int n = (end + (tail)) & ((size)-1); \
n <= end ? n : end+1;})
#define CIRC_SPACE_TO_END_FULL(head,tail,size) \
({int end = (size) - 1 - (head); \
int n = (end + (tail)) & ((size)-1); \
n < end ? n : end+1;})
#define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
#define uart_circ_chars_pending(circ) \
(CIRC_CNT((circ)->head, (circ)->tail, TLS_UART_TX_BUF_SIZE))
/**
* @struct tls_uart_baud_rate baudrate define
*/
struct tls_uart_baud_rate
{
u32 baud_rate;
u16 ubdiv;
u16 ubdiv_frac;
};
/**
* @enum uart number enum
*/
enum
{
TLS_UART_0 = 0,
TLS_UART_1 = 1,
TLS_UART_2 = 2,
};
/**
* @typedef enum TLS_UART_PMODE Parity Mode
*/
typedef enum TLS_UART_PMODE
{
TLS_UART_PMODE_DISABLED = 0, /**< No Parity */
TLS_UART_PMODE_ODD = 1, /**< Odd Parity */
TLS_UART_PMODE_EVEN = 2, /**< Even Parity */
TLS_UART_PMODE_MARK = 3, /**< The parity bit is always 1. */
TLS_UART_PMODE_SPACE = 4, /**< The parity bit is always 0. */
} TLS_UART_PMODE_T;
/**
* @typedef enum TLS_UART_CHSIZE Character Size
*/
typedef enum TLS_UART_CHSIZE
{
TLS_UART_CHSIZE_5BIT = (0x00 << 0), /**< Character size: 5 bit */
TLS_UART_CHSIZE_6BIT = (0x01 << 0), /**< Character size: 6 bit */
TLS_UART_CHSIZE_7BIT = (0x02 << 0), /**< Character size: 7 bit */
TLS_UART_CHSIZE_8BIT = (0x03 << 0), /**< Character size: 8 bit */
} TLS_UART_CHSIZE_T;
/**
* @typedef enum TLS_UART_FLOW_CTRL_MODE flow control mode
*/
typedef enum TLS_UART_FLOW_CTRL_MODE
{
TLS_UART_FLOW_CTRL_NONE,
TLS_UART_FLOW_CTRL_HARDWARE,
} TLS_UART_FLOW_CTRL_MODE_T;
/**
* @typedef enum TLS_UART_RX_FLOW_CTRL_FLAG flow control rx flag
*/
typedef enum TLS_UART_RX_FLOW_CTRL_FLAG
{
TLS_UART_RX_DISABLE,
TLS_UART_RX_ENABLE,
} TLS_UART_RX_FLOW_CTRL_FLAG_T;
/**
* @typedef enum TLS_UART_STOPBITS
*/
typedef enum TLS_UART_STOPBITS
{
TLS_UART_ONE_STOPBITS,
TLS_UART_TWO_STOPBITS,
} TLS_UART_STOPBITS_T;
/**
* @typedef enum TLS_UART_STATUS
*/
typedef enum TLS_UART_STATUS
{
TLS_UART_STATUS_OK,
TLS_UART_STATUS_ERROR,
} TLS_UART_STATUS_T;
/**
* @typedef enum TLS_UART_MODE operation mode
*/
typedef enum TLS_UART_MODE
{
TLS_UART_MODE_POLL, /**< uart operation mode: poll */
TLS_UART_MODE_INT, /**< uart operation mode: interrupt mode */
} TLS_UART_MODE_T;
/**
* @struct tls_uart_icount
*/
struct tls_uart_icount
{
u32 cts;
u32 dsr;
u32 rng;
u32 dcd;
u32 rx;
u32 tx;
u32 frame;
u32 overrun;
u32 parity;
u32 brk;
u32 buf_overrun;
};
/**
* @typedef struct tls_uart_options
*/
typedef struct tls_uart_options
{
u32 baudrate; /**< Set baud rate of the UART */
TLS_UART_CHSIZE_T charlength; /**< Number of bits to transmit as a character (5 to 8). */
TLS_UART_PMODE_T paritytype; /**< Parity type */
TLS_UART_FLOW_CTRL_MODE_T flow_ctrl; /**< Flow control type */
TLS_UART_STOPBITS_T stopbits; /**< Number of stop bits */
} tls_uart_options_t;
/**
* @typedef struct tls_uart_circ_buf
*/
typedef struct tls_uart_circ_buf
{
u8 *buf;
u32 head;
u32 tail;
} tls_uart_circ_buf_t;
/**
* @typedef struct TLS_UART_REGS
*/
typedef struct TLS_UART_REGS
{
u32 UR_LC; /**< line control register */
u32 UR_FC; /**< flow control register */
u32 UR_DMAC; /**< dma control register */
u32 UR_FIFOC; /**< fifo control register */
u32 UR_BD; /**< baud rate register */
u32 UR_INTM; /**< interrupt mask register */
u32 UR_INTS; /**< interrupt source register */
u32 UR_FIFOS; /**< fifo status register */
u32 UR_TXW; /**< tx windows register */
u32 UR_RES0;
u32 UR_RES1;
u32 UR_RES2;
u32 UR_RXW; /**< rx windows register */
} TLS_UART_REGS_T;
/**
* @typedef struct tls_uart_port
*/
typedef struct tls_uart_port
{
u32 uart_no; /**< uart number: 0 or 1 */
u32 uart_irq_no; /**< uart interrupt number */
u32 plus_char_cnt;
TLS_UART_MODE_T uart_mode; /**< uart work mode: interrupt mode or poll mode */
struct tls_uart_options opts; /**< uart config parameters */
int fcStatus; /**< flow ctrl status,0 closed ,1 opened */
enum TLS_UART_RX_FLOW_CTRL_FLAG rxstatus;
u32 tx_fifofull; /**< uart tx fifo trigger level */
TLS_UART_REGS_T volatile *regs; /**< uart registers struct pointer */
struct tls_uart_icount icount; /**< uart statistics information */
struct tls_uart_circ_buf recv; /**< uart ring buffer */
// struct tls_uart_circ_buf xmit;
struct dl_list tx_msg_pending_list;
struct dl_list tx_msg_to_be_freed_list;
u8 hw_stopped;
tls_os_sem_t *tx_sem;
char *buf_ptr;
u16 buf_len;
s16(*rx_callback) (u16 len);
s16(*tx_callback) (struct tls_uart_port * port);
bool tx_dma_on;
} tls_uart_port_t;
/**
* @typedef struct tls_uart_tx_msg
*/
typedef struct tls_uart_tx_msg
{
struct dl_list list;
char *buf;
u16 buflen;
u16 offset;
void (*finish_callback) (void *arg);
void *callback_arg;
} tls_uart_tx_msg_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup UART_Driver_APIs UART Driver APIs
* @brief UART driver APIs
*/
/**
* @addtogroup UART_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial uart port.
*
* @param[in] uart_no is the uart number. TLS_UART_0 or TLS_UART_1
* @param[in] opts is the uart setting options,if this param is NULL,this function will use the default options.
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note When the system is initialized, the function has been called, so users can not call the function.
*/
int tls_uart_port_init(u16 uart_no, tls_uart_options_t * opts, u8 modeChoose);
/**
* @brief This function is used to register uart rx interrupt.
*
* @param[in] uart_no TLS_UART_0 or TLS_UART_1
* @param[in] rx_callback is the uart rx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_uart_rx_callback_register(u16 uart_no, s16(*rx_callback) (u16 len));
/**
* @brief This function is used to copy circular buffer data to user buffer.
*
* @param[in] uart_no is the uart numer
* @param[in] buf is the user buffer
* @param[in] readsize is the user read size
*
* @retval copy data size
*
* @note None
*/
int tls_uart_read(u16 uart_no, u8 * buf, u16 readsize);
/**
* @brief This function is used to transfer data synchronously.
*
* @param[in] uart_no is the uart number
* @param[in] buf is a buf for saving user data
* @param[in] writesize is the user data length
*
* @retval WM_SUCCESS tx success
* @retval WM_FAILED tx failed
*
* @note None
*/
int tls_uart_write(u16 uart_no, char *buf, u16 writesize);
/**
* @brief This function is used to transfer data with DMA.
*
* @param[in] buf is a buf for saving user data
* @param[in] writesize is the user data length
* @param[in] cmpl_callback function point,when the transfer is completed, the function will be called.
* @param[in] uart_no is the uart number
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note Only uart1 support DMA transfer.
*/
int tls_uart_dma_write(char *buf, u16 writesize, void (*cmpl_callback) (void *p), u16 uart_no);
/**
* @brief This function is used to set uart parity.
*
* @param[in] uart_no is the uart number
* @param[in] paritytype is a parity type defined in TLS_UART_PMODE_T
*
* @retval WM_SUCCESS if setting success
* @retval WM_FAILED if setting fail
*
* @note None
*/
int tls_uart_set_parity(u16 uart_no, TLS_UART_PMODE_T paritytype);
/**
* @brief This function is used to set uart baudrate.
*
* @param[in] uart_no is the uart number
* @param[in] baudrate is the baudrate user want used,the unit is HZ.
*
* @retval WM_SUCCESS if setting success
* @retval WM_FAILED if setting fail
*
* @note None
*/
int tls_uart_set_baud_rate(u16 uart_no, u32 baudrate);
/**
* @brief This function is used to set uart stop bits.
*
* @param[in] uart_no is the uart number
* @param[in] stopbits is a stop bit type defined in TLS_UART_STOPBITS_T
*
* @retval WM_SUCCESS if setting success
* @retval WM_FAILED if setting fail
*
* @note None
*/
int tls_uart_set_stop_bits(u16 uart_no, TLS_UART_STOPBITS_T stopbits);
/**
* @brief This function is used to output a character to the serial port.
*
* @param[in] ch character to be output
*
* @retval ch
*
* @note None
*/
int tls_uart_output_char(int ch);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_UART_H */
sdk/Include/Driver/wm_watchdog.h
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/**
* @file wm_watchdog.h
*
* @brief watchdog Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_WATCHDOG_H
#define WM_WATCHDOG_H
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup WDG_Driver_APIs WDG Driver APIs
* @brief WDG driver APIs
*/
/**
* @addtogroup WDG_Driver_APIs
* @{
*/
/**
* @brief This function is used to clear watchdog irq in case watchdog reset.
*
* @param None
*
* @return None
*
* @note None
*/
void tls_watchdog_clr(void);
/**
* @brief This function is used to init and start the watchdog.
*
* @param[in] usec microseconds
*
* @return None
*
* @note None
*/
void tls_watchdog_init(u32 usec);
/**
* @brief This function is used to start calculating elapsed time.
*
* @param[in] None
*
* @return elapsed time, unit:millisecond
*
* @note None
*/
void tls_watchdog_start_cal_elapsed_time(void);
/**
* @brief This function is used to stop calculating & return elapsed time.
*
* @param[in] none
*
* @return elapsed time, unit:millisecond
*
* @note None
*/
u32 tls_watchdog_stop_cal_elapsed_time(void);
/**
* @brief This function is used to reset the system.
*
* @param None
*
* @return None
*
* @note None
*/
void tls_sys_reset(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_WATCHDOG_H */
sdk/Include/Net/wm_socket.h
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/**
* @file wm_socket.h
*
* @brief socket Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_SOCKET_H
#define WM_SOCKET_H
#include "wm_config.h"
#include "wm_socket2.0.3.h"
#endif
sdk/Include/Net/wm_socket2.0.3.h
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/**
* @file wm_socket2.0.3.h
*
* @brief socket203 Module
*
* @author dave
*
* @copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_SOCKET2_0_3_H
#define WM_SOCKET2_0_3_H
#include "wm_type_def.h"
#include "wm_netif.h"
//socket state defination
#define NETCONN_STATE_NONE 0
#define NETCONN_STATE_WAITING 1
#define NETCONN_STATE_CONNECTED 2
#define NETCONN_STATE_CLOSED 3
//socket event defination
#define NET_EVENT_TCP_JOINED 0
#define NET_EVENT_TCP_DISCONNECT 1
#define NET_EVENT_TCP_CONNECTED 2
#define NET_EVENT_TCP_CONNECT_FAILED 3
#define NET_EVENT_UDP_START 4
#define NET_EVENT_UDP_START_FAILED 5
#define TLS_MAX_SOCKET_NUM 8
#define TLS_MAX_NETCONN_NUM 20
/** Main packet buffer struct */
struct pbuf {
/** next pbuf in singly linked pbuf chain */
struct pbuf *next;
/** pointer to the actual data in the buffer */
void *payload;
/**
* total length of this buffer and all next buffers in chain
* belonging to the same packet.
*
* For non-queue packet chains this is the invariant:
* p->tot_len == p->len + (p->next? p->next->tot_len: 0)
*/
u16_t tot_len;
/** length of this buffer */
u16_t len;
/** pbuf_type as u8_t instead of enum to save space */
u8_t /*pbuf_type*/ type;
/** misc flags */
u8_t flags;
/**
* the reference count always equals the number of pointers
* that refer to this pbuf. This can be pointers from an application,
* the stack itself, or pbuf->next pointers from a chain.
*/
u16_t ref;
};
/**
* @brief This Function prototype for tcp error callback functions. Called when
* receives a RST or is unexpectedly closed for any other reason.
* The corresponding socket is already freed when this callback is called!
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @param[in] err Error code to indicate why the socket has been closed
* ERR_ABRT: aborted through returning ERR_ABRT from within others
* callback functions
* ERR_RST: the connection was reset by the remote host
*/
typedef void (*socket_err_fn)(u8 skt_num, err_t err);
/**
* @brief This Function prototype for socket receive callback functions. Called when data has
* been received.
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @param[in] p The received data (or NULL when the connection has been closed!)
*
* @param[in] err An error code if there has been an error receiving, always be ERR_OK
* when cs mode is udp.
*
* @retval The return value is only valid for tcp receive, for upd it means nothing.
* ERR_OK: Return this value after handling the received data.
* ERR_ABRT: Only return ERR_ABRT if you want to abort the socket from within the
* callback function!
*/
typedef err_t (*socket_recv_fn)(u8 skt_num, struct pbuf *p, err_t err);
/**
* @brief This Function prototype for socket srce ip callback functions. Called when data has
* been received.
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @param[in] datalen The received data length
*
* @param[in] ipsrc source ip addr
*
* @param[in] port source port
*
* @param[in] err An error code if there has been an error receiving, always be ERR_OK
* when cs mode is udp.
*
* @retval The return value is only valid for UDP receive, for udp it means nothing.
* ERR_OK: Return this value after handling the received data.
* ERR_ABRT: Only return ERR_ABRT if you want to abort the socket from within the
* callback function!
*/
typedef err_t (*socket_recv_ip_rpt_fn)(u8 skt_num, u16 datalen, u8 *ipsrc, u16 port, err_t err);
/**
* @brief This Function prototype for tcp connected callback functions. Called when
* connected to the remote side.
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @param[in] err An unused error code, always ERR_OK currently.
*
* @retval ERR_OK: Return this value after handling your logic.
* @retval ERR_ABRT: Only return ERR_ABRT if you want to abort the socket from within the
* callback function!
*/
typedef err_t (*socket_connected_fn)(u8 skt_num, err_t err);
/**
* @brief This Function prototype for tcp poll callback functions. Called periodically.
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @retval ERR_OK: Try to do something periodically.
* @retval ERR_ABRT: Only return ERR_ABRT if you want to abort the socket from within the
* callback function!
*/
typedef err_t (*socket_poll_fn)(u8 skt_num);
/**
* @brief This Function prototype for tcp accept callback functions. Called when a new
* connection can be accepted on a listening tcp.
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @param[in] err An error code if there has been an error accepting.
*
* @retval ERR_OK: Return this value after handling your logic.
* @retval ERR_ABRT: Only return ERR_ABRT if you want to abort the socket from within the
* callback function!
*/
typedef err_t (*socket_accept_fn)(u8 skt_num, err_t err);
/**
* @brief This Function prototype for socket state changed callback functions. Called when socket
* the sockte's state changed.
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @param[in] event Is the event number, see socket event defination.
*
* @param[in] state Is the socket state, see socket state defination.
*/
typedef void(*socket_state_changed_fn)(u8 skt_num, u8 event, u8 state);
/** Definitions for error constants. */
typedef enum {
/** No error, everything OK. */
ERR_OK = 0,
/** Out of memory error. */
ERR_MEM = -1,
/** Buffer error. */
ERR_BUF = -2,
/** Timeout. */
ERR_TIMEOUT = -3,
/** Routing problem. */
ERR_RTE = -4,
/** Operation in progress */
ERR_INPROGRESS = -5,
/** Illegal value. */
ERR_VAL = -6,
/** Operation would block. */
ERR_WOULDBLOCK = -7,
/** Address in use. */
ERR_USE = -8,
/** Already connecting. */
ERR_ALREADY = -9,
/** Conn already established.*/
ERR_ISCONN = -10,
/** Not connected. */
ERR_CONN = -11,
/** Low-level netif error */
ERR_IF = -12,
/** Connection aborted. */
ERR_ABRT = -13,
/** Connection reset. */
ERR_RST = -14,
/** Connection closed. */
ERR_CLSD = -15,
/** Illegal argument. */
ERR_ARG = -16
} err_enum_t;
enum tls_socket_protocol{
SOCKET_PROTO_TCP, /* TCP Protocol */
SOCKET_PROTO_UDP, /* UDP Protocol */
};
enum tls_socket_cs_mode{
SOCKET_CS_MODE_CLIENT, /* Client mode */
SOCKET_CS_MODE_SERVER, /* Server mode */
};
struct tls_socket_desc {
enum tls_socket_cs_mode cs_mode; /* Server mode or Client mode, Only for tcp protocol is valid */
enum tls_socket_protocol protocol; /* TCP Protocol or UDP Protocol */
ip_addr_t ip_addr; /* Remote ip address, for tcp client mode is remote server's ip address; for tcp server mode can be any address. */
/* for udp is remote server's ip address */
u16 port; /* port, for tcp client mode is remote server's port; for tcp server mode is local listen port .
for udp is remote server's port */
u16 localport; /* local port, for udp and tcp client is local listen port, for tcp server means nothing, tcp server always listen at port */
char host_name[32]; /* remote host name, not support for now */
u8 host_len; /* the length of host name */
u32 timeout; /* poll timeout, not implemented for now */
socket_err_fn errf; /* a pointer to socket_err_fn */
socket_recv_fn recvf; /* a pointer to socket_recv_fn */
socket_connected_fn connf; /* a pointer to socket_connected_fn */
socket_poll_fn pollf; /* a pointer to socket_poll_fn */
socket_accept_fn acceptf; /* a pointer to socket_accept_fn */
socket_state_changed_fn state_changed; /* a pointer to socket_state_changed_fn */
socket_recv_ip_rpt_fn recvwithipf; /*recv skt info report*/
};
/**
* @brief This function is called by your application code to create a socket.
*
* @param[in] skd Is a pointer to an tls_socket_desc.
*
* @retval ERR_OK If create socket successfully.
* negative number If an error was detected.
*/
int tls_socket_create(struct tls_socket_desc * skd);
/**
* @brief This function is called by your application code to send data by the socket.
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @param[in] pdata Is a pointer to the data which need to be send by the socket.
*
* @param[in] len The data's length.
*
* @retval ERR_OK If send data successfully.
* negative number If an error was detected.
*/
int tls_socket_send(u8 skt_num, void *pdata, u16 len);
/**
* @brief This function is called by your application code to close the socket, and the related resources would be released.
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @retval ERR_OK If close socket successfully.
* negative number If an error was detected.
*/
int tls_socket_close(u8 skt_num);
struct tls_skt_status_ext_t {
u8 socket;
u8 status;
enum tls_socket_protocol protocol;
u8 host_ipaddr[4];
u16 remote_port;
u16 local_port;
};
struct tls_skt_status_t {
u32 socket_cnt;
struct tls_skt_status_ext_t skts_ext[1];
};
/**
* @brief This function is called by your application code to get the socket status of specified socket num.
*
* @param[in] skt_num Is the socket number that returned by tls_socket_create function.
*
* @param[in] buf Is a pointer to the data contains the socket status, if the socket is server, also contains it's client's status.
*
* @param[in] len The buf's length. At least, the len should be bigger than sizeof(struct tls_skt_status_t).
*
* @retval ERR_OK If send data successfully.
* negative number If an error was detected.
*/
int tls_socket_get_status(u8 skt_num, u8 *buf, u32 bufsize);
/**
* @brief This function is called by your application code to send data by udp socket.
*
* @param[in] localport This function will search all created sockets, if there is a socket whose localport equals this value and it's protocol is udp,
* then send the data by this socket, otherwise, nothing to send.
*
* @param[in] ip_addr Is the remote ip address.
*
* @param[in] port Is the remote port which upd send to.
*
* @param[in] pdata Is a pointer to the data which need to be send by the socket.
*
* @param[in] len The data's length.
* @retval ERR_OK If send data successfully.
* negative number If an error was detected.
*/
int tls_socket_udp_sendto(u16 localport, u8 *ip_addr, u16 port, void *pdata, u16 len);
/**
* @ingroup pbuf
* Enumeration of pbuf layers
*/
typedef enum {
/** Includes spare room for transport layer header, e.g. UDP header.
* Use this if you intend to pass the pbuf to functions like udp_send().
*/
PBUF_TRANSPORT,
/** Includes spare room for IP header.
* Use this if you intend to pass the pbuf to functions like raw_send().
*/
PBUF_IP,
/** Includes spare room for link layer header (ethernet header).
* Use this if you intend to pass the pbuf to functions like ethernet_output().
* @see PBUF_LINK_HLEN
*/
PBUF_LINK,
/** Includes spare room for additional encapsulation header before ethernet
* headers (e.g. 802.11).
* Use this if you intend to pass the pbuf to functions like netif->linkoutput().
* @see PBUF_LINK_ENCAPSULATION_HLEN
*/
PBUF_RAW_TX,
/** Use this for input packets in a netif driver when calling netif->input()
* in the most common case - ethernet-layer netif driver. */
PBUF_RAW
} pbuf_layer;
/**
* @ingroup pbuf
* Enumeration of pbuf types
*/
typedef enum {
/** pbuf data is stored in RAM, used for TX mostly, struct pbuf and its payload
are allocated in one piece of contiguous memory (so the first payload byte
can be calculated from struct pbuf).
pbuf_alloc() allocates PBUF_RAM pbufs as unchained pbufs (although that might
change in future versions).
This should be used for all OUTGOING packets (TX).*/
PBUF_RAM,
/** pbuf data is stored in ROM, i.e. struct pbuf and its payload are located in
totally different memory areas. Since it points to ROM, payload does not
have to be copied when queued for transmission. */
PBUF_ROM,
/** pbuf comes from the pbuf pool. Much like PBUF_ROM but payload might change
so it has to be duplicated when queued before transmitting, depending on
who has a 'ref' to it. */
PBUF_REF,
/** pbuf payload refers to RAM. This one comes from a pool and should be used
for RX. Payload can be chained (scatter-gather RX) but like PBUF_RAM, struct
pbuf and its payload are allocated in one piece of contiguous memory (so
the first payload byte can be calculated from struct pbuf).
Don't use this for TX, if the pool becomes empty e.g. because of TCP queuing,
you are unable to receive TCP acks! */
PBUF_POOL
} pbuf_type;
/**
* @brief This Function allocates a pbuf of the given type (possibly a chain for PBUF_POOL type).
*
* The actual memory allocated for the pbuf is determined by the
* layer at which the pbuf is allocated and the requested size
* (from the size parameter).
*
* @param[in] l layer flag to define header size
* @param[in] length size of the pbuf's payload
* @param[in] type this parameter decides how and where the pbuf
*
* @retval The allocated pbuf. If multiple pbufs where allocated, this
* is the first pbuf of a pbuf chain.
*/
struct pbuf *pbuf_alloc(pbuf_layer l, u16_t length, pbuf_type type);
/**
* @brief This Function for release the buffer that you receive within the socket_recv_fn callback function.
* Attention please: If you return ERR_OK in the socket_recv_fn callback function, you must call this
* function to release the buffer by yourself. Otherwise, the buffer do not need be
* released by your code.
*
* @param[in] p The buffer you received in the socket_recv_fn callback function.
*
* @retval The number of de-allocated pbufs
*/
u8 pbuf_free(struct pbuf *p);
/**
* @brief This Function for copy (part of) the contents of a packet buffer to an application supplied buffer.
*
* @param[in] p the pbuf from which to copy data.
*
* @param[in] dataptr the application supplied buffer
*
* @param[in] len length of data to copy (dataptr must be big enough). No more
* than buf->tot_len will be copied, irrespective of len
*
* @param[in] offset offset into the packet buffer from where to begin copying len bytes
*
* @retval The number of bytes copied, or 0 on failure
*/
u16_t pbuf_copy_partial(const struct pbuf *p, void *dataptr, u16_t len, u16_t offset);
#endif
sdk/Include/Net/wm_sockets.h
+15
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/**
* @file wm_sockets.h
*
* @brief socket apis
*
* @author winnermicro
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_SOCKET_API_H
#define WM_SOCKET_API_H
#include "wm_config.h"
#include "wm_sockets2.0.3.h"
#endif
sdk/Include/Net/wm_sockets2.0.3.h
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sdk/Include/OS/wm_config_gcc.inc
+3
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@.equ __TLS_OS_UCOS, 0 @;//二选一
@.equ __TLS_OS_FREERTOS, 1
sdk/Include/OS/wm_os_config.h
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/**
* @file wm_os_config.h
*
* @brief WM OS select freertos or ucos
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_OS_CONFIG_H__
#define __WM_OS_CONFIG_H__
#define OS_CFG_ON 1
#define OS_CFG_OFF 0
#define TLS_OS_UCOS OS_CFG_OFF /*UCOSII need to modify wm_config.inc*/
#undef TLS_OS_FREERTOS
#define TLS_OS_FREERTOS OS_CFG_ON /*FreeRTOS need to modify wm_config.inc*/
#endif
sdk/Include/OS/wm_os_config.inc
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;__TLS_OS_UCOS EQU 1 ;二选一
__TLS_OS_FREERTOS EQU 1
END
sdk/Include/OS/wm_osal.h
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/**
* @file wm_osal.h
*
* @brief WM OS adapter layer
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_OSAL_H
#define WM_OSAL_H
#include <stdio.h>
#include <stdlib.h>
#include "wm_config.h"
#include "wm_type_def.h"
/** OS TICK Frequency ,this value needs to keep the same as OS self-defined tick value*/
extern const unsigned int HZ;
/** Type definition of os_time_t */
typedef long os_time_t;
/** Structure definition of os_time */
struct os_time {
os_time_t sec;
os_time_t usec;
};
/** ENUMERATION of OS */
enum TLS_OS_TYPE{
OS_UCOSII = 0,
OS_FREERTOS = 1,
OS_MAX_NUM
};
/** TYPE definition of OS_STK */
#ifdef OS_STK
#undef OS_STK
#endif
typedef unsigned int OS_STK;
/** TYPE definition of OS_CPU_SR */
#ifdef OS_CPU_SR
#undef OS_CPU_SR
#endif
typedef unsigned int OS_CPU_SR;
/** TYPE definition of tls_os_task_t */
typedef void * tls_os_task_t;
/** TYPE definition of tls_os_timer_t */
typedef void tls_os_timer_t;
/** TYPE definition of tls_os_sem_t */
typedef void tls_os_sem_t;
/** TYPE definition of tls_os_queue_t */
typedef void tls_os_queue_t;
/** TYPE definition of tls_os_mailbox_t */
typedef void tls_os_mailbox_t;
/** TYPE definition of tls_os_mutex_t */
typedef void tls_os_mutex_t;
/** TYPE definition of TLS_OS_TIMER_CALLBACK */
typedef void (*TLS_OS_TIMER_CALLBACK)(void *ptmr, void *parg);
/** MACRO definition of TIMER ONE times */
#define TLS_OS_TIMER_OPT_ONE_SHORT 1u
/** MACRO definition of TIMER PERIOD */
#define TLS_OS_TIMER_OPT_PERIOD 2u
/** ENUMERATION definition of OS STATUS */
typedef enum tls_os_status {
TLS_OS_SUCCESS = 0,
TLS_OS_ERROR,
TLS_OS_ERR_TIMEOUT,
} tls_os_status_t;
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup OS_APIs OS APIs
* @brief Operate system APIs
*/
/**
* @addtogroup OS_APIs
* @{
*/
/**
* @brief This function is used to register OS tick timer irq
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_os_timer_init(void);
/**
* @brief This function is used to tick handler
*
* @param[in] *p argument
*
* @return None
*
* @note None
*/
void tls_os_time_tick(void *p);
/**
* @brief This function is used to initialize OS common resource
*
* @param[in] *arg
*
* @return None
*
* @note None
*/
void tls_os_init(void *arg);
/**
* @brief This function is used to start task scheduler
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_os_start_scheduler(void);
/**
* @brief This function is used to get OS type
*
* @param[in] None
*
* @retval 0 OS_UCOSII
* @retval 1 OS_FREERTOS
*
* @note May not be used by now.
*/
int tls_os_get_type(void);
/**
* @brief This function is used to create a task. Tasks can either be created prior to
the start of multitasking or by a running task.
A task cannot be created in an ISR.
*
* @param[in] *task pointer to the task
* @param[in] name the task's name
* @param[in] entry the task's entry function
* @param[in] param pointer to an optional data area which can be
used to pass parameters to the task when the
task first executes. Where the task is
concerned it thinks it was invoked and passed
the argument 'param' as follows:
void Task (void *param)
{
for (;;) {
Task code;
}
}
* @param[in] *stk_start pointer to the task's bottom of stack. Address must be between 0x20000000 and 0x20028000
* @param[in] stk_size the size of the stack in number of elements.
If OS_STK is set to INT8U,
'stk_size' corresponds to the number of bytes
available.
If OS_STK is set to INT16U, 'stk_size' contains
the number of 16-bit entries available.
Finally, if OS_STK is set to INT32U,
'stk_size' contains the number of 32-bit entries
available on the stack.
* @param[in] prio the task's priority. A unique priority MUST be
assigned to each task and the lower the number,
the higher the priority.
* @param[in] flag contains additional information about the behavior of the task
*
* @retval TLS_OS_SUCCESS the call was successful.
* @retval TLS_OS_ERROR failed
*
* @note 1) Stack Range: [stk_start, stk_start + stk_size) must be between 0x20000000 and 0x20028000
* 2) task stack: Using static memory like array, not using dynamic memory.
* 3) And if you use static memory like array (large size) as data storage in your application,
* we suggest you change it to dynamic memory by tls_mem_alloc.
*/
tls_os_status_t tls_os_task_create(tls_os_task_t *task,
const char* name,
void (*entry)(void* param),
void* param,
u8 *stk_start,
u32 stk_size,
u32 prio,
u32 flag);
/**
* @brief This function allows you to delete a task. The calling
task can delete itself by its own priority number.
The deleted task is returned to the dormant state
and can be re-activated by creating the deleted task
again.
*
* @param[in] prio task priority to delete
* @param[in] (*freefun)(void) function to free resource
*
* @retval TLS_OS_SUCCESS the call is successful
* @retval TLS_OS_ERROR failed
*
* @note Generally, you do not need to call this function in your application.
*/
tls_os_status_t tls_os_task_del(u8 prio, void (*freefun)(void));
/**
* @brief This function creates a mutual exclusion semaphore
*
* @param[in] prio the priority to use when accessing the mutual
exclusion semaphore. In other words, when the
semaphore is acquired and a higher priority task
attempts to obtain the semaphore then the
priority of the task owning the semaphore is
raised to this priority. It is assumed that
you will specify a priority that is LOWER in
value than ANY of the tasks competing for the
mutex.
* @param[in] **mutex pointer to the event control clock (OS_EVENT)
associated with the created mutex.
*
* @retval TLS_OS_SUCCESS the call was successful
* @retval TLS_OS_ERROR failed
*
* @note 1) The LEAST significant 8 bits of '.OSEventCnt' are used
to hold the priority number of the task owning the mutex
or 0xFF if no task owns the mutex.
2) The MOST significant 8 bits of '.OSEventCnt' are used to
hold the priority number to use to reduce priority
inversion.
*/
tls_os_status_t tls_os_mutex_create(u8 prio, tls_os_mutex_t **mutex);
/**
* @brief This function deletes a mutual exclusion semaphore and
readies all tasks pending on the it
*
* @param[in] *mutex pointer to the event control block associated
with the desired mutex
*
* @retval TLS_OS_SUCCESS The call was successful and the mutex
was deleted
* @retval TLS_OS_ERROR failed
*
* @note 1) This function must be used with care. Tasks that would
normally expect the presence of the mutex MUST check the
return code of OSMutexPend().
2) This call can potentially disable interrupts for a long
time. The interrupt disable time is directly
proportional to the number of tasks waiting on the mutex.
3) Because ALL tasks pending on the mutex will be readied,
you MUST be careful because the resource(s) will no
longer be guarded by the mutex.
4) IMPORTANT: In the 'OS_DEL_ALWAYS' case, we assume that
the owner of the Mutex (if there is one) is ready-to-run
and is thus NOT pending on another kernel object or has
delayed itself.In other words, if a task owns the mutex
being deleted,that task will be made ready-to-run at
its original priority.
*/
tls_os_status_t tls_os_mutex_delete(tls_os_mutex_t *mutex);
/**
* @brief This function waits for a mutual exclusion semaphore
*
* @param[in] *mutex pointer to the event control block
associated with the desired mutex
* @param[in] wait_time an optional timeout period (in clock ticks).
If non-zero, your task will wait for the resource
up to the amount of time specified by
this argument.
If you specify 0, however, your task will wait
forever at the specified mutex or,
until the resource becomes available.
*
* @retval TLS_OS_SUCCESS The call was successful and your task
owns the mutex
* @retval TLS_OS_ERROR failed
*
* @note 1) The task that owns the Mutex MUST NOT pend on
any other event while it owns the mutex.
2) You MUST NOT change the priority of the task
that owns the mutex
*/
tls_os_status_t tls_os_mutex_acquire(tls_os_mutex_t *mutex,
u32 wait_time);
/**
* @brief This function releases a mutual exclusion semaphore
*
* @param[in] *mutex pointer to the event control block
associated with the desired mutex
*
* @retval TLS_OS_SUCCESS The call was successful and the mutex was signaled.
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_mutex_release(tls_os_mutex_t *mutex);
/**
* @brief This function creates a semaphore
*
* @param[in] **sem pointer to the event control block (OS_EVENT)
associated with the created semaphore
* @param[in] cnt the initial value for the semaphore.
If the value is 0, no resource is available
(or no event has occurred).
You initialize the semaphore to a non-zero value
to specify how many resources are available
(e.g. if you have 10 resources, you would
initialize the semaphore to 10).
*
* @retval TLS_OS_SUCCESS success,The call was successful
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_sem_create(tls_os_sem_t **sem, u32 cnt);
/**
* @brief This function deletes a semaphore and readies all tasks
pending on this semaphore.
*
* @param[in] *sem pointer to the event control block associated
with the desired semaphore
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_sem_delete(tls_os_sem_t *sem);
/**
* @brief This function waits for a semaphore
*
* @param[in] *sem pointer to the event control block
associated with the desired semaphore
* @param[in] wait_time an optional timeout period (in clock ticks).
If non-zero, your task will wait for the
resource up to the amount of time specified
by this argument.If you specify 0, however,
your task will wait forever at the specified
semaphore or, until the resource becomes
available (or the event occurs).
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_sem_acquire(tls_os_sem_t *sem,
u32 wait_time);
/**
* @brief This function signals a semaphore
*
* @param[in] *sem pointer to the event control block associated
with the desired semaphore
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_sem_release(tls_os_sem_t *sem);
/**
* @brief This function sets the semaphore count to the value specified
as an argument.Typically,this value would be 0.You
would typically use this function when a semaphore is
used as a signaling mechanism and, you want to reset
the count value.
*
* @param[in] *sem pointer to the event control block
* @param[in] cnt the new value for the semaphore count. You would
pass 0 to reset the semaphore count.
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_sem_set(tls_os_sem_t *sem, u16 cnt);
/**
* @brief This function creates a message queue if free event cont
rol blocks are available
*
* @param[in] **queue pointer to the event control clock (OS_EVENT)
associated with the created queue
* @param[in] queue_size the number of elements in the storage area
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_queue_create(tls_os_queue_t **queue, u32 queue_size);
/**
* @brief This function deletes a message queue and readies all
tasks pending on the queue
*
* @param[in] *queue pointer to the event control block associated
with the desired queue
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_queue_delete(tls_os_queue_t *queue);
/**
* @brief This function sends a message to a queue
*
* @param[in] *queue pointer to the event control block
associated with the desired queue
* @param[in] *msg pointer to the message to send.
* @param[in] msg_size message size
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
tls_os_status_t tls_os_queue_send(tls_os_queue_t *queue,
void *msg,
u32 msg_size);
/**
* @brief This function is used to flush the contents of the message
queue.
*
* @param[in] *queue
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_queue_flush(tls_os_queue_t *queue);
/**
* @brief This function waits for a message to be sent to a queue
*
* @param[in] *queue pointer to the event control block associated
with the desired queue
* @param[in] **msg pointer to the message received
* @param[in] msg_size message size
* @param[in] wait_time an optional timeout period (in clock ticks).
If non-zero, your task will wait for a message
to arrive at the queue up to the amount of time
specified by this argument. If you specify 0,
however, your task will wait forever at the
specified queue or, until a message arrives.
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_queue_receive(tls_os_queue_t *queue,void **msg,
u32 msg_size,
u32 wait_time);
/**
* @brief This function creates a message mailbox if free event
control blocks are available.
*
* @param[in] **mailbox pointer to the event control clock (OS_EVENT)
associated with the created mailbox
* @param[in] mailbox_size size
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_mailbox_create(tls_os_mailbox_t **mailbox, u32 mailbox_size);
/**
* @brief This function deletes a mailbox and readies all of the tasks
pending on the this mailbox.
*
* @param[in] *mailbox pointer to the event control block
associated with the desired mailbox.
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_mailbox_delete(tls_os_mailbox_t *mailbox);
/**
* @brief This function sends a message to a mailbox
*
* @param[in] *mailbox pointer to the event control block associated
with the desired mailbox
* @param[in] *msg pointer to the message to send.
You MUST NOT send a NULL pointer
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_mailbox_send(tls_os_mailbox_t *mailbox,void *msg);
/**
* @brief This function waits for a message to be sent to a mailbox
*
* @param[in] *mailbox pointer to the event control block associated
with the desired mailbox
* @param[in] **msg pointer to the message received
* @param[in] wait_time an optional timeout period (in clock ticks).
If non-zero, your task will wait for a message
to arrive at the mailbox up to the amount of
time specified by this argument.
If you specify 0, however, your task will wait
forever at the specified mailbox or,
until a message arrives.
*
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_mailbox_receive(tls_os_mailbox_t *mailbox,
void **msg,
u32 wait_time);
/**
* @brief This function is used by your application to obtain the
current value of the 32-bit counter which keeps track
of the number of clock ticks since the system starts.
*
* @param[in] None
*
* @retval current value of OSTime
*
* @note None
*/
u32 tls_os_get_time(void);
/**
* @brief This function is used to disable interrupts by preserving
the state of interrupts
*
* @param[in] None
*
* @retval cpu_sr
*
* @note None
*/
u32 tls_os_set_critical(void);
/**
* @brief This function is used to enable interrupts by preserving
the state of interrupts
*
* @param[in] cpu_sr
*
* @return None
*
* @note None
*/
void tls_os_release_critical(u32 cpu_sr);
/**
* @brief This function is called by your application code to create
a timer
*
* @param[in] **timer pointer to an OS_TMR data structure.
This is the 'handle' that your application will
use to reference the timer created
* @param[in] callback pointer to a callback function that will
be called when the timer expires. The callback
function must be declared as follows
void MyCallback (OS_TMR *ptmr, void *p_arg);
* @param[in] *callback_arg argument (a pointer) that is passed to
the callback function when it is called
* @param[in] period The 'period' being repeated for the timer.
If you specified 'OS_TMR_OPT_PERIODIC' as
an option, when the timer expires, it will
automatically restart with the same period.
* @param[in] repeat if repeat
* @param[in] *name pointer to an ASCII string that is used to
name the timer. Names are useful for
debugging.
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_timer_create(tls_os_timer_t **timer,
TLS_OS_TIMER_CALLBACK callback,
void *callback_arg,
u32 period,
bool repeat,
u8 *name);
/**
* @brief This function is called by your application code to start
a timer.
*
* @param[in] *timer pointer to an OS_TMR
*
* @return None
*
* @note None
*/
void tls_os_timer_start(tls_os_timer_t *timer);
/*
************************************************************************************************************************
* CHANGE A TIMER WAIT TIME
*
* Description: This function is called by your application code to change a timer wait time.
*
* Arguments : timer Is a pointer to an OS_TMR
*
* ticks is the wait time
************************************************************************************************************************
*/
void tls_os_timer_change(tls_os_timer_t *timer, u32 ticks);
/**
* @brief This function is called by your application code to stop
a timer
*
* @param[in] *timer pointer to the timer to stop.
*
* @return None
*
* @note None
*/
void tls_os_timer_stop(tls_os_timer_t *timer);
/**
* @brief This function is called by your application code to delete
a timer
*
* @param[in] *timer pointer to the timer to delete
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
tls_os_status_t tls_os_timer_delete(tls_os_timer_t *timer);
/**
* @brief This function is called to delay execution of the currently
running task until the specified number of system
ticks expires. This, of course, directly equates to
delaying the current task for some time to expire.
There will be no delay if the specified delay is 0.
If the specified delay is greater than 0 then,
a context switch will executed.
*
* @param[in] ticks the time delay that the task will be suspended
in number of clock 'ticks'.Note that by specifying 0,
the task will not be delayed.
*
* @return None
*
* @note None
*/
void tls_os_time_delay(u32 ticks);
/**
* @brief This function is used to display all the tasks' detail status.
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_os_disp_task_stat_info(void);
/**
* @}
*/
/**
* @}
*/
#endif /* end of WM_OSAL_H */
sdk/Include/Platform/aes.h
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/**
* @file aes.h
* @brief AES functions
* @copyright (c) 2003-2006, Jouni Malinen <jkmaline@cc.hut.fi>
*
* @note This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Alternatively, this software may be distributed under the terms of BSD
* license.
*
* See README and COPYING for more details.
*/
#ifndef AES_H
#define AES_H
//#include "crypto/cryptoApi.h"
#include <stddef.h>
#include "wm_type_def.h"
#define USE_AES
#define PSPUBLIC
#ifndef CRYPT_INVALID_KEYSIZE
#define CRYPT_INVALID_KEYSIZE -21
#endif
#ifndef MAXBLOCKSIZE
#define MAXBLOCKSIZE 24
#endif
#define STORE32H(x, y) { \
(y)[0] = (unsigned char)(((x)>>24)&255); \
(y)[1] = (unsigned char)(((x)>>16)&255); \
(y)[2] = (unsigned char)(((x)>>8)&255); \
(y)[3] = (unsigned char)((x)&255); \
}
#define LOAD32H(x, y) { \
x = ((unsigned long)((y)[0] & 255)<<24) | \
((unsigned long)((y)[1] & 255)<<16) | \
((unsigned long)((y)[2] & 255)<<8) | \
((unsigned long)((y)[3] & 255)); \
}
#define byte(x, n) (((x) >> (8 * (n))) & 255)
#define ROR(x, y) \
( ((((unsigned long)(x)&0xFFFFFFFFUL)>>(unsigned long)((y)&31)) | \
((unsigned long)(x)<<(unsigned long)(32-((y)&31)))) & 0xFFFFFFFFUL)
#define psTraceCrypto(x)
/******************************************************************************/
/*
Universal return codes
*/
#define PS_SUCCESS 0
#define PS_FAILURE -1
/* NOTE: Failure return codes MUST be < 0 */
/* NOTE: The range for core error codes should be between -2 and -29 */
#define PS_ARG_FAIL -6 /* Failure due to bad function param */
#define PS_PLATFORM_FAIL -7 /* Failure as a result of system call error */
#define PS_MEM_FAIL -8 /* Failure to allocate requested memory */
#define PS_LIMIT_FAIL -9 /* Failure on sanity/limit tests */
#define PS_UNSUPPORTED_FAIL -10 /* Unimplemented feature error */
#define PS_DISABLED_FEATURE_FAIL -11 /* Incorrect #define toggle for feature */
#define PS_PROTOCOL_FAIL -12 /* A protocol error occurred */
#define PS_TIMEOUT_FAIL -13 /* A timeout occurred and MAY be an error */
#define PS_INTERRUPT_FAIL -14 /* An interrupt occurred and MAY be an error */
#define PS_PENDING -15 /* In process. Not necessarily an error */
#define PS_EAGAIN -16 /* Try again later. Not necessarily an error */
#define PS_TRUE 1
#define PS_FALSE 0
//typedef int int32; //µ÷ÓÃwm_type_def.h
//typedef unsigned int uint32;
//typedef short int16;
//typedef unsigned short uint16;
//typedef unsigned char uint8;
//typedef long long int64;
//typedef unsigned long long uint64;
//#if (GCC_COMPILE==0)
//typedef unsigned int size_t;
//#endif
/******************************************************************************/
#ifdef USE_AES
/******************************************************************************/
#ifndef USE_AES_CBC_EXTERNAL
typedef struct {
unsigned int eK[64], dK[64];
int Nr;
} psAesKey_t;
typedef struct {
int blocklen;
unsigned char IV[16];
psAesKey_t key;
#if defined(USE_AES_GCM) || defined(USE_AES_CCM)
unsigned char EncCtr[16];
unsigned char CtrBlock[16];
#endif
#ifdef USE_AES_GCM
unsigned char gInit[16];
unsigned int TagTemp[4];
unsigned char Hash_SubKey[16];
unsigned int ProcessedBitCount[4];
unsigned int InputBufferCount;
unsigned int OutputBufferCount;
union
{
unsigned char Buffer[128];
unsigned int BufferAlignment;
} Input;
#endif /* USE_AES_GCM */
#ifdef USE_AES_CCM
unsigned int ccmTagTemp[16 / sizeof(unsigned int)]; /* 32 */
union
{
/* Used for formatting IV. */
unsigned char Temporary[16];
/* Used for processing Mac. */
unsigned char Y0[16];
} u; /* 48 */
#endif /* USE_AES_CCM */
} psAesCipher_t;
typedef union {
#ifdef USE_AES
psAesCipher_t aes;
#endif
} psAesCipherContext_t;
#endif /* USE_AES_CBC_EXTERNAL */
#endif /* USE_AES */
#if 0
void * aes_encrypt_init(const u8 *key, size_t len);
void aes_encrypt(void *ctx, const u8 *plain, u8 *crypt);
void aes_encrypt_deinit(void *ctx);
void * aes_decrypt_init(const u8 *key, size_t len);
void aes_decrypt(void *ctx, const u8 *crypt, u8 *plain);
void aes_decrypt_deinit(void *ctx);
#endif
#ifndef USE_AES
#error "Must Enable USE_AES in cryptoConfig.h!"
#endif
#ifdef USE_AES
/******************************************************************************/
/*
CBC Mode AES
*/
PSPUBLIC int psAesInit(psAesCipherContext_t *ctx, unsigned char *IV,
unsigned char *key, unsigned int keylen);
PSPUBLIC int psAesDecrypt(psAesCipherContext_t *ctx, unsigned char *ct,
unsigned char *pt, unsigned int len);
PSPUBLIC int psAesEncrypt(psAesCipherContext_t *ctx, unsigned char *pt,
unsigned char *ct, unsigned int len);
/*
Block Mode AES
*/
PSPUBLIC int psAesInitKey(const unsigned char *key, unsigned int keylen,
psAesKey_t *skey);
PSPUBLIC void psAesEncryptBlock(const unsigned char *pt, unsigned char *ct,
psAesKey_t *skey);
PSPUBLIC void psAesDecryptBlock(const unsigned char *ct, unsigned char *pt,
psAesKey_t *skey);
int aes_128_cbc_encrypt(const u8 *key, const u8 *iv, u8 *data,
size_t data_len);
int aes_128_cbc_decrypt(const u8 *key, const u8 *iv, u8 *data,
size_t data_len);
#endif
#endif /* AES_H */
sdk/Include/Platform/wm_crypto_hard.h
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/**
* @file wm_crypto_hard.h
*
* @brief hard crypto module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_CRYPTO_HARD_H
#define WM_CRYPTO_HARD_H
#include "wm_type_def.h"
#include "aes.h"
#ifndef min
#define min(a,b) (((a) < (b)) ? (a) : (b))
#endif /* min */
/** The base address of the registers of encryption/decryption module. */
#define HR_CRYPTO_BASE_ADDR 0x40003200
/** The address of the source text address register. */
#define HR_CRYPTO_SRC_ADDR (HR_CRYPTO_BASE_ADDR + 0x00)
/** The address of the encrypted/decrypted text address register. */
#define HR_CRYPTO_DEST_ADDR (HR_CRYPTO_BASE_ADDR + 0x04)
/** The address of the configuration register. */
#define HR_CRYPTO_SEC_CFG (HR_CRYPTO_BASE_ADDR + 0x08)
/** The address of the control register. */
#define HR_CRYPTO_SEC_CTRL (HR_CRYPTO_BASE_ADDR + 0x0C)
/** The address of the key0 register. */
#define HR_CRYPTO_KEY0 (HR_CRYPTO_BASE_ADDR + 0x10)
/** The address of the key1 register. */
#define HR_CRYPTO_KEY1 (HR_CRYPTO_BASE_ADDR + 0x14)
/** The address of the key2 register. */
#define HR_CRYPTO_KEY2 (HR_CRYPTO_BASE_ADDR + 0x18)
/** The address of the key3 register. */
#define HR_CRYPTO_KEY3 (HR_CRYPTO_BASE_ADDR + 0x1C)
/** The address of the key4 register. */
#define HR_CRYPTO_KEY4 (HR_CRYPTO_BASE_ADDR + 0x20)
/** The address of the key5 register. */
#define HR_CRYPTO_KEY5 (HR_CRYPTO_BASE_ADDR + 0x24)
/** The address of the IV0 register. */
#define HR_CRYPTO_IV0 (HR_CRYPTO_BASE_ADDR + 0x28)
/** The address of the IV1 register. */
#define HR_CRYPTO_IV1 (HR_CRYPTO_BASE_ADDR + 0x20)
/** The address of the encrypted/decrypted status register. */
#define HR_CRYPTO_SEC_STS (HR_CRYPTO_BASE_ADDR + 0x30)
/** The address of the SHA1/MD5 digest0 register. */
#define HR_CRYPTO_SHA1_DIGEST0 (HR_CRYPTO_BASE_ADDR + 0x34)
/** The address of the SHA1/MD5 digest1 register. */
#define HR_CRYPTO_SHA1_DIGEST1 (HR_CRYPTO_BASE_ADDR + 0x38)
/** The address of the SHA1/MD5 digest2 register. */
#define HR_CRYPTO_SHA1_DIGEST2 (HR_CRYPTO_BASE_ADDR + 0x3C)
/** The address of the SHA1/MD5 digest3 register. */
#define HR_CRYPTO_SHA1_DIGEST3 (HR_CRYPTO_BASE_ADDR + 0x40)
/** The address of the SHA1 digest4 and CRC in/output register. */
#define HR_CRYPTO_SHA1_DIGEST4 (HR_CRYPTO_BASE_ADDR + 0x44)
/** The address of the RNG RESULT register. */
#define HR_CRYPTO_RNG_RESULT (HR_CRYPTO_BASE_ADDR + 0x48)
/** The address of the CRC in register. */
#define HR_CRYPTO_CRC_KEY HR_CRYPTO_SHA1_DIGEST4
/** The address of the CRC output register. */
#define HR_CRYPTO_CRC_RESULT HR_CRYPTO_SHA1_DIGEST4
#define ERR_CRY_OK 0 ///< No error, everything OK.
#define ERR_FAILURE -1 /* failure */
#define ERR_ARG_FAIL -6 /* Failure due to bad function param */
//CRC
#define OUTPUT_REFLECT 1
#define INPUT_REFLECT 2
typedef enum __CRYPTO_METHOD
{
CRYPTO_METHOD_RSV=0,
CRYPTO_METHOD_RC4,
CRYPTO_METHOD_SHA1,
CRYPTO_METHOD_AES,
CRYPTO_METHOD_DES,
CRYPTO_METHOD_3DES,
CRYPTO_METHOD_CRC, ///< CRC
CRYPTO_METHOD_MD5 ///< MD5
}CRYPTO_METHOD;
/**
* The enum of the encryption/decryption way.
*/
typedef enum __CRYPTO_WAY
{
CRYPTO_WAY_ENCRYPT=0, ///< Encryption
CRYPTO_WAY_DECRYPT ///< Decryption
}CRYPTO_WAY;
typedef enum __CRYPTO_RNG_SWITCH
{
CRYPTO_RNG_SWITCH_16 = 0,
CRYPTO_RNG_SWITCH_32
}CRYPTO_RNG_SWITCH;
/**
* The enum of the encryption/decryption mode, only for (aes des 3des).
*/
typedef enum __CRYPTO_MODE
{
CRYPTO_MODE_ECB=0, ///< ECB
CRYPTO_MODE_CBC, ///< CBC
CRYPTO_MODE_CTR ///< CTR, only for AES
}CRYPTO_MODE;
/**
* The enum of the CRC type.
*/
typedef enum __CRYPTO_CRC_TYPE
{
CRYPTO_CRC_TYPE_8=0, ///< 8 bits CRC
CRYPTO_CRC_TYPE_16_MODBUS, ///< 16 bits Modbus CRC
CRYPTO_CRC_TYPE_16_CCITT, ///< 16 bits CCITT CRC
CRYPTO_CRC_TYPE_32 ///< 32 bits CRC
}CRYPTO_CRC_TYPE;
/**
* The struct of the CRC context.
*/
typedef struct {
u32 state; ///< The initial value input and result value output.
u8 type; ///< The type of CRC, refernec the CRYPTO_CRC_TYPE enum.
u8 mode; ///< The mode of CRC, bit0 means output reflection and bit1 means input reflection.
}psCrcContext_t;
#if 1
struct hsha1_state {
#ifdef HAVE_NATIVE_INT64
uint64 length;
#else
u32 lengthHi;
u32 lengthLo;
#endif /* HAVE_NATIVE_INT64 */
u32 state[5], curlen;
unsigned char buf[64];
};
struct hmd5_state {
#ifdef HAVE_NATIVE_INT64
uint64 length;
#else
u32 lengthHi;
u32 lengthLo;
#endif /* HAVE_NATIVE_INT64 */
u32 state[4], curlen;
unsigned char buf[64];
};
typedef union {
struct hsha1_state sha1;
struct hmd5_state md5;
} hsDigestContext_t;
typedef u32 hstm_digit;
typedef struct {
s16 used, alloc, sign;
hstm_digit *dp;
} hstm_int;
struct sha1_state {
#ifdef HAVE_NATIVE_INT64
u64 length;
#else
u32 lengthHi;
u32 lengthLo;
#endif /* HAVE_NATIVE_INT64 */
u32 state[5], curlen;
unsigned char buf[64];
};
struct md5_state {
#ifdef HAVE_NATIVE_INT64
u64 length;
#else
u32 lengthHi;
u32 lengthLo;
#endif /* HAVE_NATIVE_INT64 */
u32 state[4], curlen;
unsigned char buf[64];
};
typedef union {
struct sha1_state sha1;
struct md5_state md5;
} psDigestContext_t;
typedef struct {
unsigned char state[256];
u32 byteCount;
unsigned char x;
unsigned char y;
} psRc4Key_t;
#define DES3_KEY_LEN 24
#define DES3_IV_LEN 8
#define DES_KEY_LEN 8
typedef struct {
u32 ek[3][32], dk[3][32];
} psDes3Key_t;
/*
A block cipher CBC structure
*/
typedef struct {
s32 blocklen;
unsigned char IV[8];
psDes3Key_t key;
} des3_CBC;
typedef union {
psRc4Key_t arc4;
des3_CBC des3;
psAesCipher_t aes;
} psCipherContext_t;
#endif
/**
* @brief This function is used to stop random produce.
*
* @param[in] None
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_crypto_random_stop(void);
/**
* @brief This function initializes random digit seed and BIT number.
*
* @param[in] seed The random digit seed.
* @param[in] rng_switch The random digit bit number. (0: 16bit 1:32bit)
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_crypto_random_init(u32 seed, CRYPTO_RNG_SWITCH rng_switch);
/**
* @brief This function is used to get random digit content.
*
* @param[in] out Pointer to the output of random digit.
* @param[in] len The random digit bit number will output.
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_crypto_random_bytes(unsigned char *out, u32 len);
/**
* @brief This function initializes a RC4 encryption algorithm,
* i.e. fills the psCipherContext_t structure pointed to by ctx with necessary data.
*
* @param[in] ctx Pointer to the Cipher Context.
* @param[in] key Pointer to the key.
* @param[in] keylen the length of key.
*
* @retval 0 success
* @retval other failed
*
* @note The first parameter ctx must be a structure which is allocated externally.
* And all of Context parameters in the initializing methods should be allocated externally too.
*/
int tls_crypto_rc4_init(psCipherContext_t * ctx, const unsigned char *key, u32 keylen);
/**
* @brief This function encrypts a variable length data stream according to RC4.
* The RC4 algorithm it generates a "keystream" which is simply XORed with the plaintext to produce the ciphertext stream.
* Decryption is exactly the same as encryption. This function also decrypts a variable length data stream according to RC4.
*
* @param[in] ctx Pointer to the Cipher Context.
* @param[in] in Pointer to the input plaintext data stream(or the encrypted text data stream) of variable length.
* @param[in] out Pointer to the resulting ciphertext data stream.
* @param[in] len Length of the plaintext data stream in octets.
*
* @retval 0 success
* @retval other failed
*
* @note The address needs to be four-byte aligned, and it needs to operate in words, not in bytes.
*/
int tls_crypto_rc4(psCipherContext_t * ctx, unsigned char *in, unsigned char *out, u32 len);
/**
* @brief This function initializes a AES encryption algorithm, i.e. fills the psCipherContext_t structure pointed to by ctx with necessary data.
*
* @param[in] ctx Pointer to the Cipher Context.
* @param[in] IV Pointer to the Initialization Vector
* @param[in] key Pointer to the key.
* @param[in] keylen the length of key.
* @param[in] cbc the encryption mode, AES supports ECB/CBC/CTR modes.
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_crypto_aes_init(psCipherContext_t * ctx, const unsigned char *IV, const unsigned char *key, u32 keylen, CRYPTO_MODE cbc);
/**
* @brief This function encrypts or decrypts a variable length data stream according to AES.
*
* @param[in] ctx Pointer to the Cipher Context.
* @param[in] in Pointer to the input plaintext data stream(or the encrypted text data stream) of variable length.
* @param[in] out Pointer to the resulting ciphertext data stream.
* @param[in] len Length of the plaintext data stream in octets.
* @param[in] dec The cryption way which indicates encryption or decryption.
*
* @retval 0 success
* @retval other failed
*
* @note The address needs to be four-byte aligned, and it needs to operate in words, not in bytes.
*/
int tls_crypto_aes_encrypt_decrypt(psCipherContext_t * ctx, unsigned char *in, unsigned char *out, u32 len, CRYPTO_WAY dec);
/**
* @brief This function initializes a 3DES encryption algorithm, i.e. fills the psCipherContext_t structure pointed to by ctx with necessary data.
*
* @param[in] ctx Pointer to the Cipher Context.
* @param[in] IV Pointer to the Initialization Vector
* @param[in] key Pointer to the key.
* @param[in] keylen the length of key.
* @param[in] cbc the encryption mode, 3DES supports ECB/CBC modes.
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_crypto_3des_init(psCipherContext_t * ctx, const unsigned char *IV, const unsigned char *key, u32 keylen, CRYPTO_MODE cbc);
/**
* @brief This function encrypts or decrypts a variable length data stream according to 3DES.
*
* @param[in] ctx Pointer to the Cipher Context.
* @param[in] in Pointer to the input plaintext data stream(or the encrypted text data stream) of variable length.
* @param[in] out Pointer to the resulting ciphertext data stream.
* @param[in] len Length of the plaintext data stream in octets.
* @param[in] dec The cryption way which indicates encryption or decryption.
*
* @retval 0 success
* @retval other failed
*
* @note The address needs to be four-byte aligned, and it needs to operate in words, not in bytes.
*/
int tls_crypto_3des_encrypt_decrypt(psCipherContext_t * ctx, unsigned char *in, unsigned char *out, u32 len, CRYPTO_WAY dec);
/**
* @brief This function initializes a DES encryption algorithm, i.e. fills the psCipherContext_t structure pointed to by ctx with necessary data.
*
* @param[in] ctx Pointer to the Cipher Context.
* @param[in] IV Pointer to the Initialization Vector
* @param[in] key Pointer to the key.
* @param[in] keylen the length of key.
* @param[in] cbc the encryption mode, DES supports ECB/CBC modes.
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_crypto_des_init(psCipherContext_t * ctx, const unsigned char *IV, const unsigned char *key, u32 keylen, CRYPTO_MODE cbc);
/**
* @brief This function encrypts or decrypts a variable length data stream according to DES.
*
* @param[in] ctx Pointer to the Cipher Context.
* @param[in] in Pointer to the input plaintext data stream(or the encrypted text data stream) of variable length.
* @param[in] out Pointer to the resulting ciphertext data stream.
* @param[in] len Length of the plaintext data stream in octets.
* @param[in] dec The cryption way which indicates encryption or decryption.
*
* @retval 0 success
* @retval other failed
*
* @note The address needs to be four-byte aligned, and it needs to operate in words, not in bytes.
*/
int tls_crypto_des_encrypt_decrypt(psCipherContext_t * ctx, unsigned char *in, unsigned char *out, u32 len, CRYPTO_WAY dec);
/**
* @brief This function initializes a CRC algorithm, i.e. fills the psCrcContext_t structure pointed to by ctx with necessary data.
*
* @param[in] ctx Pointer to the CRC Context.
* @param[in] key The initialization key.
* @param[in] crc_type The CRC type, supports CRC8/CRC16 MODBUS/CRC16 CCITT/CRC32
* @param[in] mode Set input or outpu reflect.
* @param[in] dec The cryption way which indicates encryption or decryption.
* see OUTPUT_REFLECT
* see INPUT_REFLECT
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_crypto_crc_init(psCrcContext_t * ctx, u32 key, CRYPTO_CRC_TYPE crc_type, u8 mode);
/**
* @brief This function updates the CRC value with a variable length bytes.
* This function may be called as many times as necessary, so the message may be processed in blocks.
*
* @param[in] ctx Pointer to the CRC Context.
* @param[in] in Pointer to a variable length bytes
* @param[in] len The bytes 's length
*
* @retval 0 success
* @retval other failed
*
* @note The address needs to be four-byte aligned.
*/
int tls_crypto_crc_update(psCrcContext_t * ctx, unsigned char *in, u32 len);
/**
* @brief This function ends a CRC operation and produces a CRC value.
*
* @param[in] ctx Pointer to the CRC Context.
* @param[in] crc_val Pointer to the CRC value.
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_crypto_crc_final(psCrcContext_t * ctx, u32 *crc_val);
/**
* @brief This function initializes Message-Diggest context for usage in SHA1 algorithm, starts a new SHA1 operation and writes a new Digest Context.
*
* @param[in] md Pointer to the SHA1 Digest Context.
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
void tls_crypto_sha1_init(psDigestContext_t * md);
/**
* @brief Process a message block using SHA1 algorithm.
* This function performs a SHA1 block update operation. It continues an SHA1 message-digest operation,
* by processing InputLen-byte length message block pointed to by buf, and by updating the SHA1 context pointed to by md.
* This function may be called as many times as necessary, so the message may be processed in blocks.
*
* @param[in] md Pointer to the SHA1 Digest Context.
* @param[in] buf InputLen-byte length message block
* @param[in] len The buf 's length
*
* @returnl None
*
* @note None
*/
void tls_crypto_sha1_update(psDigestContext_t * md, const unsigned char *buf, u32 len);
/**
* @brief This function ends a SHA1 operation and produces a Message-Digest.
* This function finalizes SHA1 algorithm, i.e. ends an SHA1 Message-Digest operation,
* writing the Message-Digest in the 20-byte buffer pointed to by hash in according to the information stored in context.
*
* @param[in] md Pointer to the SHA1 Digest Context.
* @param[in] hash Pointer to the Message-Digest
*
* @retval 20 success, return the hash size.
* @retval <0 failed
*
* @note None
*/
int tls_crypto_sha1_final(psDigestContext_t * md, unsigned char *hash);
/**
* @brief This function initializes Message-Diggest context for usage in MD5 algorithm, starts a new MD5 operation and writes a new Digest Context.
* This function begins a MD5 Message-Diggest Algorithm, i.e. fills the psDigestContext_t structure pointed to by md with necessary data.
* MD5 is the algorithm which takes as input a message of arbitrary length and produces as output a 128-bit "fingerprint" or "message digest" of the input.
* It is conjectured that it is computationally infeasible to produce two messages having the same message digest,
* or to produce any message having a given prespecified target message digest.
*
* @param[in] md MD5 Digest Context.
*
* @return None
*
* @note None
*/
void tls_crypto_md5_init(psDigestContext_t * md);
/**
* @brief Process a message block using MD5 algorithm.
* This function performs a MD5 block update operation. It continues an MD5 message-digest operation,
* by processing InputLen-byte length message block pointed to by buf, and by updating the MD5 context pointed to by md.
* This function may be called as many times as necessary, so the message may be processed in blocks.
*
* @param[in] md MD5 Digest Context.
* @param[in] buf InputLen-byte length message block
* @param[in] len The buf 's length
*
* @return None
*
* @note None
*/
void tls_crypto_md5_update(psDigestContext_t * md, const unsigned char *buf, u32 len);
/**
* @brief This function ends a MD5 operation and produces a Message-Digest.
* This function finalizes MD5 algorithm, i.e. ends an MD5 Message-Digest operation,
* writing the Message-Digest in the 16-byte buffer pointed to by hash in according to the information stored in context.
*
* @param[in] md MD5 Digest Context.
* @param[in] hash the Message-Digest
*
* @retval 16 success, return the hash size.
* @retval <0 failed
*
* @note None
*/
int tls_crypto_md5_final(psDigestContext_t * md, unsigned char *hash);
/**
* @brief This function implements the large module power multiplication algorithm.
* res = a**e (mod n)
*
* @param[in] a Pointer to a bignumber.
* @param[in] e Pointer to a bignumber.
* @param[in] n Pointer to a bignumber.
* @param[out] res Pointer to the result bignumber.
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_crypto_exptmod(hstm_int *a, hstm_int *e, hstm_int *n, hstm_int *res);
/**
* @brief This function initializes the encryption module.
*
* @param None
*
* @return None
*
* @note None
*/
void tls_crypto_init(void);
#endif
sdk/Include/Platform/wm_fwup.h
+343
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/**
* @file wm_fwup.h
*
* @brief Firmware upgrade
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_FWUP_H
#define WM_FWUP_H
#include "wm_osal.h"
#include "list.h"
/** firmware update status */
#define TLS_FWUP_STATUS_OK (0)
#define TLS_FWUP_STATUS_EINVALID (1)
#define TLS_FWUP_STATUS_EMEM (2)
#define TLS_FWUP_STATUS_EPERM (3)
#define TLS_FWUP_STATUS_EBUSY (4)
#define TLS_FWUP_STATUS_ESESSIONID (5)
#define TLS_FWUP_STATUS_EIO (6)
#define TLS_FWUP_STATUS_ESIGNATURE (7)
#define TLS_FWUP_STATUS_ECRC (8)
#define TLS_FWUP_STATUS_EUNDEF (9)
/** firmware signature */
#define TLS_FWUP_IMAGE_SIGNATURE_WORD 0x64365577
#define TLS_FWUP_IMAGE_SIGNATURE_WORD_B 0x62161900
/** firmware block size for one time */
#define TLS_FWUP_BLK_SIZE 512
/** firmware update request status */
#define TLS_FWUP_REQ_STATUS_IDLE (0)
#define TLS_FWUP_REQ_STATUS_BUSY (1)
#define TLS_FWUP_REQ_STATUS_SUCCESS (2)
#define TLS_FWUP_REQ_STATUS_FIO (3)
#define TLS_FWUP_REQ_STATUS_FSIGNATURE (4)
#define TLS_FWUP_REQ_STATUS_FMEM (5)
#define TLS_FWUP_REQ_STATUS_FCRC (6)
#define TLS_FWUP_REQ_STATUS_FCOMPLETE (7)
/** firmware update state */
#define TLS_FWUP_STATE_UNDEF (0xffff)
#define TLS_FWUP_STATE_BUSY (1 << 0)
#define TLS_FWUP_STATE_COMPLETE (1 << 1)
#define TLS_FWUP_STATE_ERROR_IO (1 << 2)
#define TLS_FWUP_STATE_ERROR_SIGNATURE (1 << 3)
#define TLS_FWUP_STATE_ERROR_MEM (1 << 4)
#define TLS_FWUP_STATE_ERROR_CRC (1 << 5)
#define TLS_FWUP_STATE_ERROR (TLS_FWUP_STATE_ERROR_IO | TLS_FWUP_STATE_ERROR_SIGNATURE | TLS_FWUP_STATE_ERROR_MEM | TLS_FWUP_STATE_ERROR_CRC)
/** update type 0:firmware, 1: data */
#define TLS_FWUP_DEST_SPECIFIC_FIRMWARE (0)
#define TLS_FWUP_DEST_SPECIFIC_DATA (1)
enum IMAGE_TYPE_ENUM{
IMG_TYPE_OLD_PLAIN = 0,
IMG_TYPE_FLASHBIN = 1,
IMG_TYPE_SECBOOT = 2,
IMG_TYPE_NEW_PLAIN = 3
};
enum {
NOT_ZIP_FILE = 0,
ZIP_FILE = 1
};
typedef struct __T_BOOTER
{
unsigned int magic_no;
unsigned short img_type;
unsigned short zip_type; /** image type zip flag, 0: non-zip, 1:zip*/
unsigned int run_img_addr; /** run area image start address */
unsigned int run_img_len; /** run area image length */
unsigned int run_org_checksum; /** run area image checksum */
unsigned int upd_img_addr; /** upgrade area image start address*/
unsigned int upd_img_len; /** upgrade area image length*/
unsigned int upd_checksum; /** upgrade area image checksum */
unsigned int upd_no;
unsigned char ver[16];
unsigned int hd_checksum;
} T_BOOTER;
/** Structure for firmware image header */
struct tls_fwup_image_hdr {
u32 magic;
u8 crc8;
u8 dest_specific;
u16 dest_offset; // unit: 4KB, valid when dest_specific is TRUE
u32 file_len;
char time[4];
};
/** Structure for one packet data */
struct tls_fwup_block {
u16 number; //0~Sum-1
u16 sum;
u8 data[TLS_FWUP_BLK_SIZE];
u32 crc32;
u8 pad[8];
};
/** Enumeration for image soure when firmware update */
enum tls_fwup_image_src {
TLS_FWUP_IMAGE_SRC_LUART = 0, /**< LOW SPEED UART */
TLS_FWUP_IMAGE_SRC_HUART, /**< HIGH SPEED UART */
TLS_FWUP_IMAGE_SRC_HSPI, /**< HIGH SPEED SPI */
TLS_FWUP_IMAGE_SRC_WEB /**< WEB SERVER */
};
/** Structure for firmware update request */
struct tls_fwup_request {
struct dl_list list;
u8 *data;
u32 data_len;
int status;
void (*complete)(struct tls_fwup_request *request, void *arg);
void *arg;
};
/** Structure for firmware update */
struct tls_fwup {
struct dl_list wait_list;
tls_os_sem_t *list_lock;
bool busy;
enum tls_fwup_image_src current_image_src;
u16 current_state;
u32 current_session_id;
u32 received_len;
u32 total_len;
u32 updated_len;
u32 program_base;
u32 program_offset;
s32 received_number;
};
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup FWUP_APIs FWUP APIs
* @brief firmware upgrade APIs
*/
/**
* @addtogroup FWUP_APIs
* @{
*/
/**
* @brief This function is used to initialize firmware update task
*
* @param[in] None
*
* @retval TLS_FWUP_STATUS_OK initial success
* @retval TLS_FWUP_STATUS_EBUSY already initialed
* @retval TLS_FWUP_STATUS_EMEM memory error
* @note None
*/
int tls_fwup_init(void);
/**
* @brief This function is used to enter firmware update progress.
*
* @param[in] image_src image file's source,
from TLS_FWUP_IMAGE_SRC_LUART,
TLS_FWUP_IMAGE_SRC_WEB,TLS_FWUP_IMAGE_SRC_HUART,
TLS_FWUP_IMAGE_SRC_HSPI
*
* @retval non-zero successfully, return session id
* @retval 0 failed
*
* @note None
*/
u32 tls_fwup_enter(enum tls_fwup_image_src image_src);
/**
* @brief This function is used to exit firmware update progress.
*
* @param[in] session_id session identity of firmware update progress
*
* @retval TLS_FWUP_STATUS_OK exit success
* @retval TLS_FWUP_STATUS_EPERM globle param is not initialed
* @retval TLS_FWUP_STATUS_ESESSIONID error session id
* @retval TLS_FWUP_STATUS_EBUSY update state is busy
*
* @note None
*/
int tls_fwup_exit(u32 session_id);
/**
* @brief This function is used to start update progress
*
* @param[in] session_id current sessin id
* @param[in] *data the data want to update
* @param[in] data_len data length
*
* @retval TLS_FWUP_STATUS_OK updade success
* @retval TLS_FWUP_STATUS_EPERM globle param is not initialed
* @retval TLS_FWUP_STATUS_ESESSIONID error session id
* @retval TLS_FWUP_STATUS_EINVALID invalid param
* @retval TLS_FWUP_STATUS_EMEM memory error
* @retval TLS_FWUP_STATUS_EIO write flash error
* @retval TLS_FWUP_STATUS_ECRC crc error
* @retval TLS_FWUP_STATUS_ESIGNATURE signature error
* @retval TLS_FWUP_STATUS_EUNDEF other error
*
* @note None
*/
int tls_fwup_request_sync(u32 session_id, u8 *data, u32 data_len);
/**
* @brief This function is used to get current update status
*
* @param[in] session_id current sessin id
*
* @retval current state TLS_FWUP_STATUS_OK to TLS_FWUP_STATUS_EUNDEF
*
* @note None
*/
u16 tls_fwup_current_state(u32 session_id);
/**
* @brief This function is used to reset the update information
*
* @param[in] session_id current sessin id
*
* @retval TLS_FWUP_STATUS_OK reset success
* @retval TLS_FWUP_STATUS_EPERM globle param is not initialed
* @retval TLS_FWUP_STATUS_ESESSIONID error session id
* @retval TLS_FWUP_STATUS_EBUSY update state is busy
*
* @note None
*/
int tls_fwup_reset(u32 session_id);
/**
* @brief This function is used to clear error update state
*
* @param[in] session_id current sessin id
*
* @retval TLS_FWUP_STATUS_OK reset success
*
* @note None
*/
int tls_fwup_clear_error(u32 session_id);
/**
* @brief This function is used to set update state to
TLS_FWUP_STATE_ERROR_CRC
*
* @param[in] session_id current sessin id
*
* @retval TLS_FWUP_STATUS_OK set success
* @retval TLS_FWUP_STATUS_EPERM globle param is not initialed
* @retval TLS_FWUP_STATUS_ESESSIONID error session id
*
* @note None
*/
int tls_fwup_set_crc_error(u32 session_id);
/**
* @brief This function is used to get progress's status
*
* @param[in] None
*
* @retval TRUE busy
* @retval FALSE idle
*
* @note None
*/
int tls_fwup_get_status(void);
/**
* @brief This function is used to set update packet number
*
* @param[in] number
*
* @retval TLS_FWUP_STATUS_OK success
* @retval TLS_FWUP_STATE_UNDEF failed
*
* @note None
*/
int tls_fwup_set_update_numer(int number);
/**
* @brief This function is used to get received update packet number
*
* @param[in] None
*
* @retval return current packet number
*
* @note None
*/
int tls_fwup_get_current_update_numer(void);
/**
* @brief This function is used to get current session id
*
* @param[in] None
*
* @retval non-zoro session id
* @retval 0 error
*
* @note None
*/
int tls_fwup_get_current_session_id(void);
/**
* @brief This function is used to check image header
*
* @param[in] None
*
* @retval TRUE: success
* @retval FALSE: failure
*
* @note None
*/
int tls_fwup_img_header_check(T_BOOTER *img_param);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_FWUP_H */
sdk/Include/Platform/wm_mem.h
+201
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/*****************************************************************************
*
* File Name : wm_mem.h
*
* Description: memory manager Module
*
* Copyright (c) 2014 Winner Micro Electronic Design Co., Ltd.
* All rights reserved.
*
* Author : dave
*
* Date : 2014-6-12
*****************************************************************************/
#ifndef WM_MEM_H
#define WM_MEM_H
#include "wm_type_def.h"
//#define WM_MEM_DEBUG 1
#if WM_MEM_DEBUG
#include "list.h"
#define MEM_HEADER_PATTERN 0x76028412
#define MEM_TAILER_PATTERN 0x83395627
#define MEM_FREED_PATTERN 0x82962503
extern u32 alloc_heap_mem_bytes;
extern u32 alloc_heap_mem_blk_cnt;
extern u32 alloc_heap_mem_max_size;
//
// Note: it's important that the size of MP_MEMORY_BLOCK structure
// be multiple of 16 bytes.
//
typedef struct _MEMORY_BLOCK {
struct dl_list list; /**< Pointer to next and previous blocks */
char *file; /**< name of the file which is doing the allocation */
u32 pad; /**< pad to make the size of whole structure multiple of 16 bytes */
u32 line; /**< line number where allocated */
u32 length; /**< ulong index of trailer (=(length/4)-1 relative to data start */
u32 header_pattern; /**< To help detect underflows. A trailer is also added to find overflows */
} MEMORY_BLOCK, *PMEMORY_BLOCK;
typedef struct _MEMORY_PATTERN{
u32 pattern0;
//u32 pattern1;
//u32 pattern2;
//u32 pattern3;
}MEMORY_PATTERN, *PMEMORY_PATTERN;
void mem_free_debug(void *p, char* file, int line);
#define tls_mem_free(p) mem_free_debug( p, __FILE__, __LINE__)
void *mem_alloc_debug(u32 size, char* file, int line);
void mem_free_allocated_blocks(void);
#define tls_mem_alloc(size) mem_alloc_debug(size, __FILE__, __LINE__)
void * mem_realloc_debug(void *mem_address, u32 size, char* file, int line);
#define tls_mem_realloc(mem_address, size) mem_realloc_debug(mem_address, size, __FILE__, __LINE__)
void *mem_calloc_debug(u32 n,u32 size,char * file,int line);
#define tls_mem_calloc(n, size) mem_calloc_debug(n, size, __FILE__, __LINE__)
void tls_mem_alloc_info(void);
int is_safe_addr_debug(void* p, u32 len, char* file, int line);
#define tls_is_safe_addr(p, len) is_safe_addr_debug(p, len, __FILE__, __LINE__)
#if 1
#define MEMCPY memcpy
#define SMEMCPY MEMCPY
#else
#define MEMCPY(dst,src,len) do { \
if(tls_is_safe_addr(dst, len)){ \
memcpy(dst,src,len);}}while(0)
#define SMEMCPY(dst,src,len) do { \
if(tls_is_safe_addr(dst, len)){ \
memcpy(dst,src,len);}}while(0)
#endif
#else /* WM_MEM_DEBUG */
void * mem_alloc_debug(u32 size);
void mem_free_debug(void *p);
void * mem_realloc_debug(void *mem_address, u32 size);
void *mem_calloc_debug(u32 length, u32 size);
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup MEM_APIs MEM APIs
* @brief memory manager APIs
*/
/**
* @addtogroup MEM_APIs
* @{
*/
/**
* @brief This function is called by memory allocation
*
* @param[in] size
*
* @retval NULL malloc failed
* @retval pointer pointer to the address of the allocated memory
*
* @note None
*/
#define tls_mem_alloc(size) mem_alloc_debug(size)
/**
* @brief This function is used to free memory
*
* @param None
*
* @return None
*
* @note None
*/
#define tls_mem_free mem_free_debug
/**
* @brief This function is used to realloc memory
*
* @param None
*
* @retval NULL realloc failed
* @retval Pointer pointer to the address of the allocated memory
*
* @note None
*/
#define tls_mem_realloc mem_realloc_debug
/**
* @brief This function is used to calloc memory
*
* @param None
*
* @retval NULL realloc failed
* @retval Pointer pointer to the address of the allocated memory
*
* @note None
*/
#define tls_mem_calloc mem_calloc_debug
/**
* @brief This function is used to copy memory content from one address to another address
*
* @param[in] dst pointer to destination address
* @param[in] src pointer to source address
* @param[in] len length to copy
*
* @retval dst
*
* @note None
*/
#define MEMCPY(dst,src,len) memcpy(dst,src,len)
/**
* @brief This function is used to copy memory content from one address to another address
*
* @param[in] dst pointer to destination address
* @param[in] src pointer to source address
* @param[in] len length to copy
*
* @retval dst
*
* @note None
*/
#define SMEMCPY(dst,src,len) memcpy(dst,src,len)
/**
* @brief This function is used to get available memory
*
* @param[in] None
*
* @return None
*
* @note This api just can get coarse memory that is remained
*/
unsigned int tls_mem_get_avail_heapsize(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_MEM_DEBUG */
#endif /* TLS_MEM_H */
sdk/Include/Platform/wm_params.h
+615
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/**
* @file wm_params.h
*
* @brief param manager Module
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef TLS_PARAMS_H
#define TLS_PARAMS_H
#include "wm_type_def.h"
/***************************************************************************************
ID | Data Type
***************************************************************************************
TLS_PARAM_ID_SSID | struct tls_param_ssid ssid
TLS_PARAM_ID_ENCRY | u8 encry
TLS_PARAM_ID_KEY | struct tls_param_key key
TLS_PARAM_ID_IP | struct tls_param_ip ipcfg
TLS_PARAM_ID_AUTOMODE | u8 auto_mode
TLS_PARAM_ID_DEFSOCKET | N/A
TLS_PARAM_ID_BSSID | struct tls_param_bssid bssid
TLS_PARAM_ID_CHANNEL | u8 channel
TLS_PARAM_ID_CHANNEL_EN | u8 channel_enable
TLS_PARAM_ID_COUNTRY_REGION | u8 wireless_region
TLS_PARAM_ID_WPROTOCOL | u8 wireless_protocol
TLS_PARAM_ID_ADHOC_AUTOCREATE | N/A
TLS_PARAM_ID_ROAMING | u8 auto_roam
TLS_PARAM_ID_AUTO_RETRY_CNT | N/A
TLS_PARAM_ID_WBGR | struct tls_param_bgr wbgr
TLS_PARAM_ID_USRINTF | N/A
TLS_PARAM_ID_AUTO_TRIGGER_LENGTH | N/A
TLS_PARAM_ID_DEBUG_MODE | N/A
TLS_PARAM_ID_HARDVERSION | struct tls_param_hardware_version hardware_v
TLS_PARAM_ID_BRDSSID | u8 ssid_broadcast_enable
TLS_PARAM_ID_DNSNAME | u8 local_dnsname[32]
TLS_PARAM_ID_DEVNAME | u8 local_device_name[32]
TLS_PARAM_ID_PSM | u8 auto_powersave
TLS_PARAM_ID_ORAY_CLIENT | N/A
TLS_PARAM_ID_UPNP | N/A
TLS_PARAM_ID_UART | struct tls_param_uart uart_cfg
TLS_PARAM_ID_WPS | struct tls_param_wps wps
TLS_PARAM_ID_AUTO_TRIGGER_PERIOD | N/A
TLS_PARAM_ID_ESCAPE_CHAR | N/A
TLS_PARAM_ID_ESCAPE_PERIOD | N/A
TLS_PARAM_ID_IO_MODE | N/A
TLS_PARAM_ID_CMD_MODE | N/A
TLS_PARAM_ID_PASSWORD | u8 PassWord[6]
TLS_PARAM_ID_CHANNEL_LIST | u16 channellist
TLS_PARAM_ID_WEBS_CONFIG | struct tls_webs_cfg WebsCfg
TLS_PARAM_ID_ONESHOT_CFG | u8 oneshotflag
TLS_PARAM_ID_SHA1 | N/A
TLS_PARAM_ID_ORIGIN_KEY | N/A
TLS_PARAM_ID_ORIGIN_SSID | N/A
TLS_PARAM_ID_AUTO_RECONNECT | u8 auto_reconnect
***************************************************************************************/
#define TLS_PARAM_STATUS_OK (0)
#define TLS_PARAM_STATUS_EINVALID (1)
#define TLS_PARAM_STATUS_EMEM (2)
#define TLS_PARAM_STATUS_EIO (3)
#define TLS_PARAM_STATUS_EPERM (4)
#define TLS_PARAM_STATUS_EINVALIDID (5)
/** MACRO of Magic number initial value */
#define TLS_PARAM_INIT_MAGIC (0xffffffff)
/** MACRO of Magic number valid value */
#define TLS_PARAM_MAGIC (0x4947414d)
/** MACRO of parameter partition number */
#define TLS_PARAM_PARTITION_NUM (2)
/** MACRO of parameter identity */
#define TLS_PARAM_ID_ALL (-1)
#define TLS_PARAM_ID_SSID (0)
#define TLS_PARAM_ID_ENCRY (1)
#define TLS_PARAM_ID_KEY (2)
#define TLS_PARAM_ID_IP (3)
#define TLS_PARAM_ID_AUTOMODE (4)
#define TLS_PARAM_ID_DEFSOCKET (5)
#define TLS_PARAM_ID_BSSID (6)
#define TLS_PARAM_ID_CHANNEL (7)
#define TLS_PARAM_ID_CHANNEL_EN (8)
#define TLS_PARAM_ID_COUNTRY_REGION (9)
#define TLS_PARAM_ID_WPROTOCOL (10)
#define TLS_PARAM_ID_ADHOC_AUTOCREATE (11)
#define TLS_PARAM_ID_ROAMING (12)
#define TLS_PARAM_ID_AUTO_RETRY_CNT (13)
#define TLS_PARAM_ID_WBGR (14)
#define TLS_PARAM_ID_USRINTF (15)
#define TLS_PARAM_ID_AUTO_TRIGGER_LENGTH (16)
#define TLS_PARAM_ID_DEBUG_MODE (17)
#define TLS_PARAM_ID_HARDVERSION (18)
#define TLS_PARAM_ID_BRDSSID (19)
#define TLS_PARAM_ID_DNSNAME (20)
#define TLS_PARAM_ID_DEVNAME (21)
#define TLS_PARAM_ID_PSM (22)
#define TLS_PARAM_ID_ORAY_CLIENT (23)
#define TLS_PARAM_ID_UPNP (24)
#define TLS_PARAM_ID_UART (26)
#define TLS_PARAM_ID_WPS (27)
#define TLS_PARAM_ID_AUTO_TRIGGER_PERIOD (28)
#define TLS_PARAM_ID_ESCAPE_CHAR (29)
#define TLS_PARAM_ID_ESCAPE_PERIOD (30)
#define TLS_PARAM_ID_IO_MODE (31)
#define TLS_PARAM_ID_CMD_MODE (32)
#define TLS_PARAM_ID_PASSWORD (33)
#define TLS_PARAM_ID_CHANNEL_LIST (34)
#define TLS_PARAM_ID_WEBS_CONFIG (35)
#define TLS_PARAM_ID_ONESHOT_CFG (36)
#define TLS_PARAM_ID_SHA1 (37)
#define TLS_PARAM_ID_ORIGIN_KEY (38)
#define TLS_PARAM_ID_ORIGIN_SSID (39)
#define TLS_PARAM_ID_AUTO_RECONNECT (40)
#define TLS_PARAM_ID_QUICK_CONNECT (41)
#define TLS_PARAM_ID_KEY_CHANGE (42)
#define TLS_PARAM_ID_SSID_CHANGE (43)
#define TLS_PARAM_ID_SOFTAP_SSID (44)
#define TLS_PARAM_ID_SOFTAP_PSK (45)
#define TLS_PARAM_ID_SOFTAP_ENCRY (46)
#define TLS_PARAM_ID_SOFTAP_KEY (47)
#define TLS_PARAM_ID_SOFTAP_IP (48)
#define TLS_PARAM_ID_SOFTAP_CHANNEL (49)
#define TLS_PARAM_ID_SOFTAP_WBGR (50)
#define TLS_PARAM_ID_SNTP_SERVER1 (51)
#define TLS_PARAM_ID_SNTP_SERVER2 (52)
#define TLS_PARAM_ID_SNTP_SERVER3 (53)
#define TLS_PARAM_ID_TEM_OFFSET (54)
#define TLS_PARAM_ID_MAX (55)
/** MACRO of Physical moe of Ieee802.11 */
#define TLS_PARAM_PHY_11BG_MIXED (0)
#define TLS_PARAM_PHY_11B (1)
#define TLS_PARAM_PHY_11BGN_MIXED (2)
/** MACRO of Ieee802.11 Tx Rate for parameter set */
#define TLS_PARAM_TX_RATEIDX_1M (0)
#define TLS_PARAM_TX_RATEIDX_2M (1)
#define TLS_PARAM_TX_RATEIDX_5_5M (2)
#define TLS_PARAM_TX_RATEIDX_11M (3)
#define TLS_PARAM_TX_RATEIDX_6M (4)
#define TLS_PARAM_TX_RATEIDX_9M (5)
#define TLS_PARAM_TX_RATEIDX_12M (6)
#define TLS_PARAM_TX_RATEIDX_18M (7)
#define TLS_PARAM_TX_RATEIDX_24M (8)
#define TLS_PARAM_TX_RATEIDX_36M (9)
#define TLS_PARAM_TX_RATEIDX_48M (10)
#define TLS_PARAM_TX_RATEIDX_54M (11)
#define TLS_PARAM_TX_RATEIDX_MCS0 (12)
#define TLS_PARAM_TX_RATEIDX_MCS1 (13)
#define TLS_PARAM_TX_RATEIDX_MCS2 (14)
#define TLS_PARAM_TX_RATEIDX_MCS3 (15)
#define TLS_PARAM_TX_RATEIDX_MCS4 (16)
#define TLS_PARAM_TX_RATEIDX_MCS5 (17)
#define TLS_PARAM_TX_RATEIDX_MCS6 (18)
#define TLS_PARAM_TX_RATEIDX_MCS7 (19)
#define TLS_PARAM_TX_RATEIDX_MCS8 (20)
#define TLS_PARAM_TX_RATEIDX_MCS9 (21)
#define TLS_PARAM_TX_RATEIDX_MCS10 (22)
#define TLS_PARAM_TX_RATEIDX_MCS11 (23)
#define TLS_PARAM_TX_RATEIDX_MCS12 (24)
#define TLS_PARAM_TX_RATEIDX_MCS13 (25)
#define TLS_PARAM_TX_RATEIDX_MCS14 (26)
#define TLS_PARAM_TX_RATEIDX_MCS15 (27)
#define TLS_PARAM_TX_RATEIDX_MCS32 (28)
/** MACRO of SSID Broadcast */
#define TLS_PARAM_SSIDBRD_DISABLE (0)
#define TLS_PARAM_SSIDBRD_ENABLE (1)
#define TLS_PARAM_ROAM_DISABLE (0)
#define TLS_PARAM_ROAM_ENABLE (1)
/** MACRO of Power Saving Mode */
#define TLS_PARAM_PSM_DISABLE (0)
#define TLS_PARAM_PSM_ENABLE (1)
#define TLS_PARAM_DDNS_DISABLE (0)
#define TLS_PARAM_DDNS_ENABLE (1)
#define TLS_PARAM_AUTO_CREATE_ADHOC_DISABLE (0)
#define TLS_PARAM_AUTO_CREATE_ADHOC_ENABLE (1)
#define TLS_PARAM_WPS_DISABLE (0)
#define TLS_PARAM_WPS_ENABLE (1)
#define TLS_PARAM_WPS_MODE_PIN (0)
#define TLS_PARAM_WPS_MODE_PBC (1)
#define TLS_PARAM_WPS_FLAG_NEGOTIATED (1 << 0)
#define TLS_PARAM_UPNP_DISABLE (0)
#define TLS_PARAM_UPNP_ENABLE (1)
/** MACRO of IEEE802.11 Work MODE */
#define TLS_PARAM_IEEE80211_INFRA (1)
#define TLS_PARAM_IEEE80211_ADHOC (2)
#define TLS_PARAM_IEEE80211_SOFTAP (4)
/** MACRO of Command or Transparent Mode */
#define TLS_PARAM_MANUAL_MODE (0)
#define TLS_PARAM_AUTO_MODE (1)
#define TLS_PARAM_ALWAYS_ONLINE_ENABLE (1)
#define TLS_PARAM_ALWAYS_ONLINE_DISABLE (0)
/** MACRO of DHCP ENABLE or DISABLE */
#define TLS_PARAM_DHCP_ENABLE (1)
#define TLS_PARAM_DHCP_DISABLE (0)
/** MACRO of COUNTRY CODE for channel number */
#define TLS_PARAM_REGION_0_BG_BAND (0) /* 1-11 */
#define TLS_PARAM_REGION_1_BG_BAND (1) /* 1-13 */
#define TLS_PARAM_REGION_2_BG_BAND (2) /* 10-11 */
#define TLS_PARAM_REGION_3_BG_BAND (3) /* 10-13 */
#define TLS_PARAM_REGION_4_BG_BAND (4) /* 14 */
#define TLS_PARAM_REGION_5_BG_BAND (5) /* 1-14 */
#define TLS_PARAM_REGION_6_BG_BAND (6) /* 3-9 */
#define TLS_PARAM_REGION_7_BG_BAND (7) /* 5-13 */
#define TLS_PARAM_REGION_MAXIMUM_BG_BAND TLS_PARAM_REGION_7_BG_BAND
/** MACRO of ENCRYPT TYPE */
#define TLS_PARAM_ENCRY_OPEN (0)
#define TLS_PARAM_ENCRY_WEP64 (1)
#define TLS_PARAM_ENCRY_WEP128 (2)
#define TLS_PARAM_ENCRY_WPA_PSK_TKIP (3)
#define TLS_PARAM_ENCRY_WPA_PSK_AES (4)
#define TLS_PARAM_ENCRY_WPA2_PSK_TKIP (5)
#define TLS_PARAM_ENCRY_WPA2_PSK_AES (6)
/** MACRO of USER INTERFACE TYPE */
#define TLS_PARAM_USR_INTF_LUART (0)
#define TLS_PARAM_USR_INTF_HUART (1)
#define TLS_PARAM_USR_INTF_HSPI (2)
#define TLS_PARAM_USR_INTF_HSDIO (3)
/** MACRO of UART BAUDRATE */
#define TLS_PARAM_UART_BAUDRATE_B600 (600)
#define TLS_PARAM_UART_BAUDRATE_B1200 (1200)
#define TLS_PARAM_UART_BAUDRATE_B1800 (1800)
#define TLS_PARAM_UART_BAUDRATE_B2400 (2400)
#define TLS_PARAM_UART_BAUDRATE_B4800 (4800)
#define TLS_PARAM_UART_BAUDRATE_B9600 (9600)
#define TLS_PARAM_UART_BAUDRATE_B19200 (19200)
#define TLS_PARAM_UART_BAUDRATE_B38400 (38400)
#define TLS_PARAM_UART_BAUDRATE_B57600 (57600)
#define TLS_PARAM_UART_BAUDRATE_B115200 (115200)
#define TLS_PARAM_HUART_BAUDRATE_B230400 (230400)
#define TLS_PARAM_HUART_BAUDRATE_B460800 (460800)
#define TLS_PARAM_HUART_BAUDRATE_B921600 (921600)
#define TLS_PARAM_HUART_BAUDRATE_B1000000 (1000000)
#define TLS_PARAM_HUART_BAUDRATE_B1250000 (1250000)
#define TLS_PARAM_HUART_BAUDRATE_B1500000 (1500000)
#define TLS_PARAM_HUART_BAUDRATE_B2000000 (2000000)
/** MACRO of UART PARITY */
#define TLS_PARAM_UART_PARITY_NONE (0)
#define TLS_PARAM_UART_PARITY_EVEN (1)
#define TLS_PARAM_UART_PARITY_ODD (2)
#define TLS_PARAM_UART_PARITY_MARK (3)
#define TLS_PARAM_UART_PARITY_SPACE (4)
/** MACRO of UART STOP BITS */
#define TLS_PARAM_UART_STOPBITS_1BITS (0)
#define TLS_PARAM_UART_STOPBITS_2BITS (1)
/** MACRO of UART FLOW CONTROL */
#define TLS_PARAM_UART_FLOW_DISABLE (0)
#define TLS_PARAM_UART_FLOW_ENABLE (1)
#define TLS_PARAM_HSPI_MAX_SCLK (33000000)
/** MACRO of SOCKET PARAMETER */
#define TLS_PARAM_SOCKET_TCP (0)
#define TLS_PARAM_SOCKET_UDP (1)
#define TLS_PARAM_SOCKET_CLIENT (0)
#define TLS_PARAM_SOCKET_SERVER (1)
#define TLS_PARAM_SOCKET_DEFAULT_PORT (60000)
/** Structure of hardware parameter */
struct tls_param_hardware_version {
u8 mark;
u8 main;
u8 sub;
u8 material;
u8 year;
u8 week;
u8 res[2];
};
/** Structure of specified BSSID parameter */
struct tls_param_bssid {
u8 bssid_enable;
u8 res;
u8 bssid[6];
};
/** Structure of SSID parameter */
struct tls_param_ssid {
u8 ssid[32];
u32 ssid_len;
};
/** Structure of TEM parameter */
struct tls_param_tem_offset {
u8 offset_len;
s32 offset;
};
/** Structure of KEY parameter */
struct tls_param_key {
u8 psk[64];
u8 key_length;
u8 key_index;
u8 key_format;
u8 res;
};
/** Structure of original KEY parameter */
struct tls_param_original_key {
u8 psk[64];
u32 key_length;
};
/** Structure of SHA1 KEY parameter */
struct tls_param_sha1{
u8 psk_set;
u8 psk[32];
};
/** Structure of 802.11 bgn rate parameter */
struct tls_param_bgr {
u8 bg;
u8 max_rate;
u8 res[2];
};
/** Structure of IP parameter */
struct tls_param_ip {
u8 dhcp_enable;
u8 res[3];
u8 ip[4];
u8 netmask[4];
u8 gateway[4];
u8 dns1[4];
u8 dns2[4];
};
/** Structure of uart parameter */
struct tls_param_uart {
u32 baudrate;
u8 stop_bits;
u8 parity;
u8 flow;
u8 charsize;
};
/** Structure of socket parameter */
struct tls_param_socket {
u8 protocol;
u8 client_or_server;
u16 port_num;
u8 host[32];
};
struct tls_param_wps {
u8 wps_enable;
u8 mode;
u8 flag;
u8 res;
u8 pin[8];
};
/** Structure of oray client */
struct tls_param_oray_client {
u32 oray_client_enable;
u8 oray_client_user[32];
u8 oray_client_pass[32];
};
/** Structure of web server parameter */
struct tls_webs_cfg {
u8 AutoRun;
u8 Reserved;
u16 PortNum;
};
/** Structure of user default parameter */
typedef struct tls_user_param{
u8 wireless_protocol;
u8 auto_mode;
u8 dhcp_enable;
u8 user_port_mode;
u8 ip[4];
u8 netmask[4];
u8 gateway[4];
u8 dns[4];
u32 baudrate;
u8 socket_protocol;
u8 socket_client_or_server;
u16 socket_port_num;
u8 socket_host[32];
u8 auto_powersave;
u8 PassWord[6];
}ST_Wm_User_Param;
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup Param_APIs Param APIs
* @brief Param manager APIs
*/
/**
* @addtogroup Param_APIs
* @{
*/
/**
* @brief This function is used to initialize parameter's manage module
*
* @param[in] None
*
* @retval TLS_PARAM_STATUS_OK init success
* @retval TLS_PARAM_STATUS_EMEM memory error
* @retval TLS_PARAM_STATUS_EIO io error
* @retval TLS_PARAM_STATUS_EPERM magic number error
*
* @note None
*/
int tls_param_init(void);
/**
* @brief This function is used to load the system's default
parameters
*
* @param[in] None
*
* @return None
*
* @note This function read user defined parameters first,
if wrong, all the parameters restore factory settings
*/
void tls_param_load_factory_default(void);
/**
* @brief This function is used to set one system parameter by its id
*
* @param[in] id param id,from TLS_PARAM_ID_SSID
to (TLS_PARAM_ID_MAX - 1)
* @param[in] *argv store parameters
* @param[in] to_flash whether the parameter is written to flash,
1:write to flash,0:only write memory
*
* @retval TLS_PARAM_STATUS_OK set success
* @retval TLS_PARAM_STATUS_EINVALID invalid param
*
* @note None
*/
int tls_param_set(int id, void *argv, bool to_flash);
/**
* @brief This function is used to get one system parameter by its id.
*
* @param[in] id param id,from TLS_PARAM_ID_SSID
to (TLS_PARAM_ID_MAX - 1)
* @param[in] *argv store parameters
* @param[in] from_flash whether the parameter is readed from flash,
1 read from flash,0 read from memory
*
* @retval TLS_PARAM_STATUS_OK success
* @retval TLS_PARAM_STATUS_EINVALID invalid param
*
* @note None
*/
int tls_param_get(int id, void *argv, bool from_flash);
/**
* @brief This function is used to write parameter into flash
*
* @param[in] id param id,from TLS_PARAM_ID_ALL
to (TLS_PARAM_ID_MAX - 1)
*
* @retval TLS_PARAM_STATUS_OK success
* @retval TLS_PARAM_STATUS_EINVALID invalid param
* @retval TLS_PARAM_STATUS_EIO read or write flash error
*
* @note None
*/
int tls_param_to_flash(int id);
/**
* @brief This function is used to recovery the parameters from
the backup area to the parameter area,and load them into ram
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_restore_param_from_backup(void);
/**
* @brief This function is used to load default parametes into ram
*
* @param[in] None
*
* @retval TLS_PARAM_STATUS_OK set success
* @retval TLS_PARAM_STATUS_EINVALID parameter wrong
* @retval TLS_PARAM_STATUS_EIO read or write falsh error
*
* @note This function read user defined parameters first,
if wrong, all the parameters restore factory settings
*/
int tls_param_to_default(void);
/**
* @brief This function is used to write user's parameters into the
flash
*
* @param[in] None
*
* @retval TLS_PARAM_STATUS_OK success
* @retval other failed
*
* @note None
*/
int tls_param_save_user_default(void);
/**
* @brief This function is used to modify user's default parameters,
then write them into flash
*
* @param[in] *user_param
*
* @retval TLS_PARAM_STATUS_OK success
* @retval other failed
*
* @note None
*/
int tls_param_save_user(struct tls_user_param *user_param);
/**
* @brief This function is used to get updp mode.(updp:update user
default parameters)
*
* @param[in] None
*
* @retval update mode
*
* @note None
*/
u8 tls_param_get_updp_mode(void);
/**
* @brief This function is used to set updp mode
*
* @param[in] mode
*
* @return None
*
* @note None
*/
void tls_param_set_updp_mode(u8 mode);
/**
* @brief This function is used to get program param
*
* @param[in] *pBase pointer to save base address
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_param_get_program_param(u32 *pBase);
/**
* @brief This function is used to set program base,image len,and
checksum
*
* @param[in] base base address
* @param[in] totallen total length of the image
* @param[in] checksum checksum value of the image
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int tls_param_set_program_param(u32 base, u32 totallen, u32 checksum);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_PARAM_H */
sdk/Include/Platform/wm_wl_mbox.h
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/**
* @file wm_wl_mbox.h
*
* @brief mailbox (mbox) APIs
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __TLS_WL_MBOX_H__
#define __TLS_WL_MBOX_H__
#include "wm_type_def.h"
#include "wm_osal.h"
/** max value of time out */
#define SYS_ARCH_TIMEOUT 0xffffffffUL
/** pointer to the mailbox */
typedef tls_os_queue_t * tls_mbox_t;
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup MBOX_APIs MBOX APIs
* @brief Software mailbox APIs
*/
/**
* @addtogroup MBOX_APIs
* @{
*/
/**
* @brief Create a malibox
*
* @param[out] *mbox pointer to the mailbox
* @param[in] size size of mailbox
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
s8 tls_mbox_new(tls_mbox_t *mbox, int size);
/**
* @brief Check if an mbox is valid/allocated
*
* @param[in] mbox pointer to the mailbox
*
* @retval 0 invalid
* @retval 1 valid
*
* @note None
*/
int tls_mbox_valid(tls_mbox_t mbox);
/**
* @brief Sends a message to a mailbox
*
* @param[in] mbox pointer to the mailbox
* @param[in] *msg pointer to the message to be post
*
* @return None
*
* @note None
*/
void tls_mbox_post(tls_mbox_t mbox, void *msg);
/**
* @brief Posts the msg to the mailbox.
*
* @param[in] mbox pointer to the mailbox
* @param[in] *msg pointer to the message to be post
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note this function have to block until the "msg" is really posted.
*/
s8 tls_mbox_trypost(tls_mbox_t mbox, void *msg);
/**
* @brief Waits for a message within specified time
*
* @param[in] mbox pointer to the mailbox
* @param[out] **msg pointer to the message to be received
* @param[in] timeout the specified time
*
* @retval SYS_ARCH_TIMEOUT time out
* @retval other time of elapsed
*
* @note None
*/
u32 tls_arch_mbox_fetch(tls_mbox_t mbox, void **msg, u32 timeout);
/**
* @}
*/
/**
* @}
*/
#endif
sdk/Include/Platform/wm_wl_task.h
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/**
* @file wm_wl_task.h
*
* @brief task APIs
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __TLS_WL_TASK_H__
#define __TLS_WL_TASK_H__
#include "wm_type_def.h"
#include "wm_wl_mbox.h"
#include "wm_wl_timers.h"
//#include "ithread.h"
#define TLS_TASK_START_PRIO 0
#define TASK_WL_PRIO 9
#define TASK_WL_PRIO_MAX 12
#define TLS_SUPPLICANT_TASK_PRIO (TASK_WL_PRIO_MAX + 1)
#define TLS_SUPPLICANT_TIMER_TASK_PRIO (TASK_WL_PRIO_MAX + 2)
#define TLS_LWIP_TASK_PRIO (TASK_WL_PRIO_MAX + 3)
#define TLS_SYS_TASK_PRIO (TASK_WL_PRIO_MAX + 5)
#define TLS_HOSTIF_TASK_PRIO (TASK_WL_PRIO_MAX + 6)
#define TLS_SPI_SCHEDULER_TASK_PRIO (TASK_WL_PRIO_MAX + 7)
#define TLS_FWUP_TASK_PRIO (TASK_WL_PRIO_MAX + 8)
#define TLS_HTTP_CLIENT_TASK_PRIO (TASK_WL_PRIO_MAX + 9)
#define AP_SOCKET_S_TASK_PRIO (TASK_WL_PRIO_MAX + 10)
#define TLS_UPNP_TASK_PRIO (TASK_WL_PRIO_MAX + 11)
// #define TLS_ONESHOT_TASK_PRIO (TASK_WL_PRIO_MAX + 15)
// #define TLS_ONESHOT_SPEC_TASK_PRIO (TASK_WL_PRIO_MAX + 16)
#define TLS_MBOX_ALL_COUNT 8
#define TLS_MBOX_ID_WL_TASK 0
#define TLS_MBOX_ID_HOSTIF_TASK 1
#define TLS_MBOX_ID_JDCLOUD_SERVER 2
#define TLS_MBOX_ID_JDCLOUD_DATA 3
#define TLS_MBOX_ID_UPNP_HD 4
#define TLS_MBOX_ID_UPNP_COMMON 5
#define TLS_MBOX_ID_UPNP_GENA 6
#define TLS_MBOX_ID_UPNP_MINISERVER 7
#define TLS_TIMEO_ALL_COUONT 9
#define TLS_TIMEO_ID_NULL 0
#define TLS_TIMEO_ID_WL_TASK 1
#define TLS_TIMEO_ID_HOSTIF_TASK 2
#define TLS_TIMEO_ID_JDCLOUD_SERVER 3
#define TLS_TIMEO_ID_JDCLOUD_DATA 4
#define TLS_TIMEO_ID_UPNP_HD 5
#define TLS_TIMEO_ID_UPNP_COMMON 6
#define TLS_TIMEO_ID_UPNP_GENA 7
#define TLS_TIMEO_ID_UPNP_MINISERVER 8
#define TLS_MSG_ALL_COUONT 9
#define TLS_MSG_ID_TX_MGMT_CMPLT 0
#define TLS_MSG_ID_MLME_TASK 1
#define TLS_MSG_ID_UART_SENT_FREE 2
#define TLS_MSG_ID_UART0_RX 3
#define TLS_MSG_ID_HSPI_RX_CMD 4
#define TLS_MSG_ID_HSPI_RX_DATA 5
#define TLS_MSG_ID_HSPI_TX_DATA 6
#define TLS_MSG_ID_TX_DATA_CMPLT 7
#define TLS_MSG_ID_UART1_RX 8
/** pointer to the semaphore */
typedef tls_os_sem_t * tls_sem_t;
/** Thread start routine */
typedef void *(*start_routine)(void *arg);
/** message type of task */
enum task_msg_type {
TASK_MSG_TIMEOUT,
TASK_MSG_UNTIMEOUT,
TASK_MSG_CALLBACK_WITH_BLOCK,
TASK_MSG_CALLBACK,
TASK_MSG_CALLBACK_STATIC,
TASK_MSG_NULL
};
/** message of task */
struct task_msg {
enum task_msg_type type;
tls_sem_t *sem;
union {
struct {
start_routine function;
void *ctx;
} cb;
struct {
start_routine function;
void *ctx;
u8 cnt;
} cbs;
struct {
u32 msecs;
tls_timeout_handler h;
void *arg;
} tmo;
} msg;
};
/** task parameters */
struct task_parameter{
u8 task_id; /**< task ID */
const char * name; /**< task name */
u8 *stk_start; /**< start address of task stack */
u32 stk_size; /**< size of task stack */
u8 mbox_size; /**< size of mailbox */
u8 mbox_id; /**< mailbox ID */
u8 timeo_id; /**< timer ID */
};
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup Task_APIs Task APIs
* @brief Software task APIs
*/
/**
* @addtogroup Task_APIs
* @{
*/
/**
* @brief Task initialized
*
* @param None
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
s8 tls_wl_task_init(void);
/**
* @brief Running the task
*
* @param[in] *task_param pointer to the task parameters
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
s8 tls_wl_task_run(struct task_parameter *task_param);
/**
* @brief Running the callback function
*
* @param[in] *task_param pointer to the task parameters
* @param[in] function the callback function
* @param[in] *ctx parameter of the callback function
* @param[in] block
* @param[in] msg_id
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
s8 tls_wl_task_callback_static(struct task_parameter *task_param,
start_routine function, void *ctx, u8 block, u8 msg_id);
/**
* @brief Running the callback function
*
* @param[in] *task_param pointer to the task parameters
* @param[in] function the callback function
* @param[in] *ctx parameter of the callback function
* @param[in] block
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
s8 tls_wl_task_callback(struct task_parameter *task_param,
start_routine function, void *ctx, u8 block);
/**
* @brief Add a timer to the task
*
* @param[in] *task_param pointer to the task parameters
* @param[in] msecs timer value
* @param[in] h the callback function
* @param[in] *arg parameter of the callback function
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
s8 tls_wl_task_add_timeout(struct task_parameter *task_param, u32 msecs,
tls_timeout_handler h, void *arg);
/**
* @brief Stop or delay the timer to expire.
*
* @param[in] *task_param pointer to the task parameters
* @param[in] h the callback function
* @param[in] *arg parameter of the callback function
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
s8 tls_wl_task_untimeout(struct task_parameter *task_param,
tls_timeout_handler h, void *arg);
/**
* @}
*/
/**
* @}
*/
#endif
sdk/Include/Platform/wm_wl_timers.h
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/**
* @file wm_wl_timers.h
*
* @brief task APIs
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __TLS_WL_TIMERS_H__
#define __TLS_WL_TIMERS_H__
#include "wm_type_def.h"
#include "wm_wl_mbox.h"
/** callback function of time out */
typedef void (* tls_timeout_handler)(void *arg);
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup Timer_APIs Timer APIs
* @brief Software timer APIs
*/
/**
* @addtogroup Timer_APIs
* @{
*/
/**
* @brief Create a one-shot timer (aka timeout)
*
* @param[in] timeo_assigned timer NO. by assigned
* @param[in] msecs time in milliseconds after that the timer should expire
* @param[in] handler callback function that would be called by the timeout
* @param[in] *arg callback argument that would be passed to handler
*
* @return None
*
* @note While waiting for a message using sys_timeouts_mbox_fetch()
*/
void tls_timeout_p(u8 timeo_assigned, u32 msecs, tls_timeout_handler handler, void *arg);
/**
* @brief Go through timeout list (for this task only) and remove the first
* matching entry, even though the timeout has not been triggered yet
*
* @param[in] timeo_assigned timer NO. by assigned
* @param[in] handler callback function that would be called by the timeout
* @param[in] *arg callback argument that would be passed to handler
*
* @return None
*
* @note None
*/
void tls_untimeout_p(u8 timeo_assigned, tls_timeout_handler handler, void *arg);
/**
* @brief Wait (forever) for a message to arrive in an mbox.
* While waiting, timeouts are processed
*
* @param[in] timeo_assigned timer NO. by assigned
* @param[in] mbox the mbox to fetch the message from
* @param[out] **msg the place to store the message
*
* @return None
*
* @note None
*/
void tls_timeouts_mbox_fetch_p(u8 timeo_assigned, tls_mbox_t mbox, void **msg);
/**
* @brief Initialize the timer
*
* @param None
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
s8 tls_wl_timer_init(void);
/**
* @}
*/
/**
* @}
*/
#endif
sdk/Include/WiFi/litepoint.h
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#ifndef __LITEPOINT_H
#define __LITEPOINT_H
#include "wm_type_def.h"
typedef struct _ltpt_rx_info
{
volatile int cnt_total;
volatile int cnt_good;
volatile int cnt_bad;
volatile unsigned char valid;
volatile unsigned char snr;
volatile unsigned char rcpi;
volatile unsigned char rate;
volatile unsigned char channel;
volatile unsigned char bandwidth;
volatile unsigned char bprocess;
}ltpt_rx_info;
typedef struct _ltpt_tx_info
{
volatile int cnt_total;
volatile int packetcount;
volatile int psdulen;
/* input parameters */
volatile unsigned char txgain;
volatile unsigned char datarate;
volatile unsigned char gimode;
volatile unsigned char greenfield;
volatile unsigned char rifs;
volatile unsigned char bprocess;
volatile unsigned char channel;
volatile unsigned char longpreamble;
}ltpt_tx_info;
enum Rate
{
S2M = 0x0000,
S5M5 = 0x0001,
S11M = 0x0002,
L1M = 0x0003,
L2M = 0x0004,
L5M5 = 0x0005,
L11M = 0x0006,
R06M = 0x0100,
R09M = 0x0101,
R12M = 0x0102,
R18M = 0x0103,
R24M = 0x0104,
R36M = 0x0105,
R48M = 0x0106,
R54M = 0x0107,
MCS0 = 0x0200,
MCS1 = 0x0201,
MCS2 = 0x0202,
MCS3 = 0x0203,
MCS4 = 0x0204,
MCS5 = 0x0205,
MCS6 = 0x0206,
MCS7 = 0x0207,
MCS8 = 0x0208,
MCS9 = 0x0209,
MCS10 = 0x0210,
MCS11 = 0x0211,
MCS12 = 0x0212,
MCS13 = 0x0213,
MCS14 = 0x0214,
MCS15 = 0x0215,
MCS32 = 0x0232,
};
extern volatile int g_ltpt_testmode;
extern ltpt_rx_info *g_ltpt_rxinfo;
extern ltpt_tx_info *g_ltpt_txinfo;
extern unsigned char hed_rf_txgainmap[];
extern const unsigned int hed_bbp_value[];
void tls_litepoint_start(void);
void tls_tx_send_litepoint(void);
void tls_set_test_channel(u8 channel, u8 bandwidth);
void tls_tx_litepoint_test_start(u32 Packetcnt, u16 Psdulen, u32 Gain, u32 TxRate, u8 GiMode, u8 Gf, u8 Rifs);
void tls_txrx_litepoint_test_stop(void);
void tls_txrx_litepoint_clear_data(void);
int tls_tx_litepoint_test_get_totalsnd(void);
void tls_rx_litepoint_test_start(u32 Channel, u32 BandWidth);
void tls_rx_litepoint_test_result(u32 *total, u32 *goodcnt, u32 *badcnt);
void tls_tx_litepoint_param_update(u8 Gain, u8 TxRate);
void tls_rx_litepoint_test_rate(u8 rate);
void tls_rx_litepoint_pwr_result(u32 *valid, u32 *snr, u32 *rcpi);
void tls_tx_litepoint_period(u32 period);
#endif
sdk/Include/WiFi/wm_ieee80211.h
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sdk/Include/WiFi/wm_ieee80211_gcc.h
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sdk/Include/WiFi/wm_wifi.h
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sdk/Include/list.h
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/*
* @file list.h
* @brief Doubly-linked list
* @copyright (c) 2009, Jouni Malinen <j@w1.fi>
*
* @note This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Alternatively, this software may be distributed under the terms of BSD
* license.
*
* See README and COPYING for more details.
*/
#ifndef LIST_H
#define LIST_H
#include <stdio.h>
/** struct dl_list - Doubly-linked list */
struct dl_list {
struct dl_list *next; /**< pointer to the next */
struct dl_list *prev; /**< pointer to the previous */
};
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup DLIST_APIs DLIST APIs
* @brief Double listed APIs
*/
/**
* @addtogroup DLIST_APIs
* @{
*/
/**
* @brief reinitialize the list
*
* @param[in] *list the list
*
* @return None
*
* @note None
*/
static __inline void dl_list_init(struct dl_list *list)
{
list->next = list;
list->prev = list;
}
/**
* @brief Insert a new entry after the specified head
*
* @param[in] *list list head to add it after
* @param[in] *item new entry to be added
*
* @return None
*
* @note None
*/
static __inline void dl_list_add(struct dl_list *list, struct dl_list *item)
{
item->next = list->next;
item->prev = list;
list->next->prev = item;
list->next = item;
}
/**
* @brief Insert a new entry before the specified head
*
* @param[in] *list list head to add it after
* @param[in] *item new entry to be added
*
* @return None
*
* @note None
*/
static __inline void dl_list_add_tail(struct dl_list *list, struct dl_list *item)
{
dl_list_add(list->prev, item);
}
/**
* @brief deletes entry from list
*
* @param[in] *item the element to delete from the list
*
* @return None
*
* @note None
*/
static __inline void dl_list_del(struct dl_list *item)
{
item->next->prev = item->prev;
item->prev->next = item->next;
item->next = NULL;
item->prev = NULL;
}
/**
* @brief tests whether a list is empty
*
* @param[in] *list the list to test
*
* @retval 0 not empty
* @retval 1 empty
*
* @note None
*/
static __inline int dl_list_empty(struct dl_list *list)
{
return list->next == list;
}
/**
* @brief count length of the list
*
* @param[in] *list the list to count
*
* @return length
*
* @note None
*/
static __inline unsigned int dl_list_len(struct dl_list *list)
{
struct dl_list *item;
int count = 0;
for (item = list->next; item != list; item = item->next)
count++;
return count;
}
/**
* @}
*/
/**
* @}
*/
#ifndef offsetof
/** offset address of the struct member */
#define offsetof(type, member) ((long) &((type *) 0)->member)
#endif
/**
* @brief get the struct for this entry
*
* @param[in] item the &struct list_head pointer
* @param[in] type the type of the struct this is embedded in
* @param[in] member the name of the list_struct within the struct
*
* @return pointer to the struct for this entry
*
* @note None
*/
#define dl_list_entry(item, type, member) \
((type *) ((char *) item - offsetof(type, member)))
/**
* @brief get the first element from a list
*
* @param[in] list the list head to take the element from
* @param[in] type the type of the struct this is embedded in
* @param[in] member the name of the list_struct within the struct
*
* @return pointer to the first element from a list
*
* @note None
*/
#define dl_list_first(list, type, member) \
(dl_list_empty((list)) ? NULL : \
dl_list_entry((list)->next, type, member))
/**
* @brief get the last element from a list
*
* @param[in] list the list head to take the element from
* @param[in] type the type of the struct this is embedded in
* @param[in] member the name of the list_struct within the struct
*
* @return pointer to the last element from a list
*
* @note None
*/
#define dl_list_last(list, type, member) \
(dl_list_empty((list)) ? NULL : \
dl_list_entry((list)->prev, type, member))
/**
* @brief iterate over list of given type
*
* @param[in] item a loop cursor
* @param[in] list the head for your list
* @param[in] type struct type
* @param[in] member the name of the list_struct within the struct
*
* @return None
*
* @note None
*/
#define dl_list_for_each(item, list, type, member) \
for (item = dl_list_entry((list)->next, type, member); \
&item->member != (list); \
item = dl_list_entry(item->member.next, type, member))
/**
* @brief iterate over list of given type safe against removal of list entry
*
* @param[in] item a loop cursor
* @param[in] n temporary storage
* @param[in] list the head for your list
* @param[in] type struct type
* @param[in] member the name of the list_struct within the struct
*
* @return None
*
* @note None
*/
#define dl_list_for_each_safe(item, n, list, type, member) \
for (item = dl_list_entry((list)->next, type, member), \
n = dl_list_entry(item->member.next, type, member); \
&item->member != (list); \
item = n, n = dl_list_entry(n->member.next, type, member))
/**
* @brief iterate backwards over list of given type
*
* @param[in] item a loop cursor
* @param[in] list the head for your list
* @param[in] type struct type
* @param[in] member the name of the list_struct within the struct
*
* @return None
*
* @note None
*/
#define dl_list_for_each_reverse(item, list, type, member) \
for (item = dl_list_entry((list)->prev, type, member); \
&item->member != (list); \
item = dl_list_entry(item->member.prev, type, member))
/** define the list head */
#define DEFINE_DL_LIST(name) \
struct dl_list name = { &(name), &(name) }
/**
* @brief iterate over list of given type
*
* @param[in] item the type * to use as a loop cursor
* @param[in] list the head for your list
* @param[in] member the name of the list_struct within the struct
*
* @return None
*
* @note None
*/
#define __dl_list_for_each(item, list, member) \
for (item = dl_list_entry((list)->next, typeof(*(item)), member); \
&item->member != (list); \
item = dl_list_entry(item->member.next, typeof(*(item)), member))
/**
* @brief iterate over list of given type safe against removal of list entry
*
* @param[in] item the type * to use as a loop cursor
* @param[in] n temporary storage
* @param[in] list the head for your list
* @param[in] member the name of the list_struct within the struct
*
* @return None
*
* @note None
*/
#define __dl_list_for_each_safe(item, n, list, member) \
for (item = dl_list_entry((list)->next, typeof(*(item)), member), \
n = dl_list_entry(item->member.next, typeof(*(item)), member); \
&item->member != (list); \
item = n, n = dl_list_entry(n->member.next, typeof(*(item)), member))
/**
* @brief iterate backwards over list of given type
*
* @param[in] item the type * to use as a loop cursor
* @param[in] list the head for your list
* @param[in] member the name of the list_struct within the struct
*
* @return None
*
* @note None
*/
#define __dl_list_for_each_reverse(item, list, member) \
for (item = dl_list_entry((list)->prev, typeof(*(item)), member); \
&item->member != (list); \
item = dl_list_entry(item->member.prev, typeof(*(item)), member))
#endif /* LIST_H */
sdk/Include/random.h
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/*
* @file random.h
* @brief Random number generator
* @copyright (c) 2010-2011, Jouni Malinen <j@w1.fi>
*
*
* @note This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* @note Alternatively, this software may be distributed under the terms of BSD
* license.
*
* @note See README and COPYING for more details.
*/
#ifndef RANDOM_H
#define RANDOM_H
void random_deinit(void);
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup Random_APIs Random APIs
* @brief Random APIs
*/
/**
* @addtogroup Random_APIs
* @{
*/
/**
* @brief This function is used to add number to random pool
*
* @param[in] *buf number to add
* @param[in] len number count
*
* @return None
*
* @note None
*/
void random_add_randomness(const void *buf, size_t len);
/**
* @brief This function is used to get random number with len from
random pool
*
* @param[in] *buf used to save random number
* @param[in] len length of random number
*
* @retval 0 success
* @retval other failed
*
* @note None
*/
int random_get_bytes(void *buf, size_t len);
/**
* @}
*/
/**
* @}
*/
#define random_mark_pool_ready() do { } while (0)
/** random pool ready */
#define random_pool_ready() 1
#endif /* RANDOM_H */
sdk/Include/wm_config.h
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/**
* @file wm_config.h
*
* @brief w600 chip inferface configure
*
* @author dave
*
* @copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_CONFIG_H__
#define __WM_CONFIG_H__
#define CFG_ON 1
#define CFG_OFF 0
#define WM_CONFIG_DEBUG_UART1 CFG_OFF /*PRINTF PORT USE UART1*/
#define WM_CONFIG_DEBUG_UART2 CFG_OFF /*PRINTF PORT USE UART2*/
/**Driver Support**/
#define TLS_CONFIG_HS_SPI CFG_ON /*High Speed SPI*/
#define TLS_CONFIG_LS_SPI CFG_ON /*Low Speed SPI*/
#define TLS_CONFIG_UART CFG_ON /*UART*/
/**Host Interface&Command**/
#define TLS_CONFIG_HOSTIF CFG_OFF
#define TLS_CONFIG_AT_CMD (CFG_OFF && TLS_CONFIG_HOSTIF)
#define TLS_CONFIG_RI_CMD (CFG_ON && TLS_CONFIG_HOSTIF)
#define TLS_CONFIG_RMMS CFG_OFF
//LWIP CONFIG
#define TLS_CONFIG_IPV4 CFG_ON //must ON
#define TLS_CONFIG_IPV6 CFG_OFF
#define TLS_CONFIG_DHCP_OPTION60 "Klyqa:W600_01"
/** SOCKET CONFIG **/
#define TLS_CONFIG_SOCKET_STD CFG_ON
#define TLS_CONFIG_SOCKET_RAW CFG_ON
#define TLS_CONFIG_CMD_USE_RAW_SOCKET (CFG_ON && TLS_CONFIG_SOCKET_RAW)
#define TLS_CONFIG_HARD_CRYPTO CFG_ON
#define TLS_CONFIG_USE_POLARSSL CFG_OFF
#define TLS_CONFIG_SERVER_SIDE_SSL (CFG_OFF && TLS_CONFIG_HTTP_CLIENT_SECURE) /*MUST configure TLS_CONFIG_HTTP_CLIENT_SECURE CFG_ON */
/** HTTP CLIENT **/
/*
HTTP Lib
HTTPS Lib
SSL LIB
CRYPTO
*/
#define TLS_CONFIG_HTTP_CLIENT (CFG_ON)
#define TLS_CONFIG_HTTP_CLIENT_PROXY CFG_OFF
#define TLS_CONFIG_HTTP_CLIENT_AUTH_BASIC CFG_OFF
#define TLS_CONFIG_HTTP_CLIENT_AUTH_DIGEST CFG_OFF
#define TLS_CONFIG_HTTP_CLIENT_AUTH (TLS_CONFIG_HTTP_CLIENT_AUTH_BASIC || TLS_CONFIG_HTTP_CLIENT_AUTH_DIGEST)
#define TLS_CONFIG_HTTP_CLIENT_SECURE (CFG_OFF)
#define TLS_CONFIG_HTTP_CLIENT_TASK (CFG_ON && TLS_CONFIG_HTTP_CLIENT)
/**IGMP**/
#define TLS_CONFIG_IGMP CFG_ON
/** UPNP AND DLNA**/
#define TLS_CONFIG_UPNP CFG_OFF
#define TLS_CONFIG_DLNA CFG_OFF && TLS_CONFIG_UPNP
#define TLS_CONFIG_NTP CFG_OFF
#define VERC_DNS_OPT CFG_ON
#define VERC_LWIP_OPT CFG_ON
#include "wm_os_config.h" //if you want to use source code,please open
#include "wm_wifi_config.h"
#include "wm_ram_config.h"
#endif /*__WM_CONFIG_H__*/
sdk/Include/wm_debug.h
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/**
* @file wm_debug.h
*
* @brief debug Module APIs
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_DEBUG_H
#define WM_DEBUG_H
#include <stdio.h>
#include <stdlib.h>
#include "wm_config.h"
#include "wm_osal.h"
/* 0x00000000 - 0x80000000 */
/** Define the debugging switch: on */
#define TLS_DBG_ON 1
/** Define the debugging switch: off */
#define TLS_DBG_OFF 0
/* 0x0000000F - 0x00000001 */
/** Define the debugging level: info */
#define TLS_DBG_LEVEL_INFO TLS_DBG_OFF
/** Define the debugging level: warning */
#define TLS_DBG_LEVEL_WARNING TLS_DBG_OFF
/** Define the debugging level: error */
#define TLS_DBG_LEVEL_ERR TLS_DBG_OFF
/** Define the debugging level: dump */
#define TLS_DBG_LEVEL_DUMP TLS_DBG_OFF
/** general debug info switch, default: off */
#define TLS_GENERAL_DBG TLS_DBG_OFF
#define __TLS_DBGPRT_INFO(fmt, ...) \
do { \
u32 time = tls_os_get_time(); \
wm_printf("[WM_I] <%d.%02d> %s : "fmt, (time/100), (time%100), __func__ , ##__VA_ARGS__); \
} while (0)
#define __TLS_DBGPRT_WARNING(fmt, ...) \
do { \
u32 time = tls_os_get_time(); \
wm_printf("[WM_W] <%d.%02d> %s : "fmt, (time/100), (time%100), __func__ , ##__VA_ARGS__); \
} while (0)
#define __TLS_DBGPRT_ERR(fmt, ...) \
do { \
u32 time = tls_os_get_time(); \
wm_printf("[WM_E] <%d.%02d> %s : "fmt, (time/100), (time%100), __func__ , ##__VA_ARGS__); \
} while (0)
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup DEBUG_APIs DEBUG APIs
* @brief DEBUG APIs
*/
/**
* @addtogroup DEBUG_APIs
* @{
*/
#if (TLS_GENERAL_DBG && TLS_DBG_LEVEL_INFO)
/** Print information of the info level */
#define TLS_DBGPRT_INFO(f, a...) __TLS_DBGPRT_INFO(f, ##a)
#else
/** Print information of the info level */
#define TLS_DBGPRT_INFO(f, a...)
#endif
#if (TLS_GENERAL_DBG && TLS_DBG_LEVEL_WARNING)
/** Print information of the warning level */
#define TLS_DBGPRT_WARNING(f, a...) __TLS_DBGPRT_WARNING(f, ##a)
#else
/** Print information of the warning level */
#define TLS_DBGPRT_WARNING(f, a...)
#endif
#if (TLS_GENERAL_DBG && TLS_DBG_LEVEL_ERR)
/** Print information of the error level */
#define TLS_DBGPRT_ERR(f, a...) __TLS_DBGPRT_ERR(f, ##a)
#else
/** Print information of the error level */
#define TLS_DBGPRT_ERR(f, a...)
#endif
#if (TLS_GENERAL_DBG && TLS_DBG_LEVEL_DUMP)
/**
* @brief dump memory
*
* @param[in] *p pointer the memory
* @param[in] len length of memory
*
* @return None
*
* @note None
*/
void TLS_DBGPRT_DUMP(char *p, u32 len);
#else
/** Print information of the dump level */
#define TLS_DBGPRT_DUMP(p, len)
#endif
/**
* @}
*/
/**
* @}
*/
#endif /* end of WM_DEBUG_H */
sdk/Include/wm_include.h
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/**
* @file wm_include.h
*
* @brief the configuration file of sdk
*
* @author winnermicro
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_INCLUDE_H__
#define __WM_INCLUDE_H__
/**
* @mainpage WinnerMicro SDK
*
* Quick Start of WinnerMicro SDK.
*
*
* HOW TO CODE ?
*
* Function UserMain(void) is the entrance function of the application:
* @code
* void UserMain(void)
* {
* printf("\n user task\n");
*
* #if DEMO_CONSOLE
* CreateDemoTask();
* #endif
*
* //user's task
* }
* @endcode
*
*
* \n
* HOW TO COMPILE ?
*
* To build with the SDK you can use the keil tools.
* Opening "Tools\Keil\Project\WM_SDK.uvproj" to compile.
*
*
* \n
* HOW TO DOWNLOAD THE FIRMWARE ?
*
* Download the "WM_W600.FLS" image
*
* This will download image which includes secboot & sdk into flash by ROM using xModem-protocol.
* @code
* Pulling down the bootmode pin and reset the device. Then UART0 will output:
* CCC...
* For details,please refer to the sdk manual.
* @endcode
*
* Download the "WM_W600_SEC.IMG" image
*
* This will download image which includes sdk by secboot using xmodem-protocol.
* @code
* Press "ESC" and then reset the device. Then UART0 will output:
* secboot running...
* CCC...
* For details,please refer to the sdk manual.
* @endcode
*
* \n
*/
#include <stdio.h>
#include <stdlib.h>
#include "wm_type_def.h"
#include "wm_uart.h"
#include "wm_gpio.h"
#include "wm_hostspi.h"
#include "wm_socket.h"
#include "wm_sockets.h"
#include "wm_wifi.h"
#include "wm_hspi.h"
#include "wm_pwm.h"
#include "wm_params.h"
#include "wm_osal.h"
#include "wm_netif.h"
#include "wm_efuse.h"
#include "wm_mem.h"
#include "wm_regs.h"
#include "FreeRTOS.h"
#endif
sdk/Include/wm_log.h
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/**
* @file wm_log.h
*
* @brief Log Module APIs
*
* @author dave
*
* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_LOG_H
#define WM_LOG_H
#include "elog.h"
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup DEBUG_APIs DEBUG APIs
* @brief DEBUG APIs
*/
/**
* @addtogroup DEBUG_APIs
* @{
*/
/**
* @brief output assert level log information
*
* @param String format list and variable parameters
*
* @return None
*
* @note The file contains the file name, function name,
* and line number information.
*/
#define wm_log_assert log_a
/**
* @brief output error level log information
*
* @param String format list and variable parameters
*
* @return None
*
* @note None
*/
#define wm_log_error log_e
/**
* @brief output warning level log information
*
* @param String format list and variable parameters
*
* @return None
*
* @note None
*/
#define wm_log_warn log_w
/**
* @brief output info level log information
*
* @param String format list and variable parameters
*
* @return None
*
* @note None
*/
#define wm_log_info log_i
/**
* @brief output raw log information
*
* @param String format list and variable parameters
*
* @return None
*
* @note The log does not have a color format,
* and the line ending automatically adds a line break.
*/
#define wm_log_raw elog_raw
/**
* @brief Output log information in hexadecimal and display its ascii code string
*
* @param[in] name, name for hex object, it will show on log header
* @param[in] width, hex number for every line, such as: 16, 32
* @param[in] buf, hex buffer
* @param[in] size, buffer size
*
* @return None
*
* @note None
*/
#define wm_log_dump elog_hexdump
/**
* @brief output debug level log information
*
* @param String format list and variable parameters
*
* @return None
*
* @note None
*/
#define wm_log_debug log_d
/**
* @brief output verbose level log information
*
* @param String format list and variable parameters
*
* @return None
*
* @note None
*/
#define wm_log_verbose log_v
/**
* @brief initialize the log system
*
* @param None
*
* @return None
*
* @note None
*/
void wm_log_init(void);
/**
* @}
*/
/**
* @}
*/
#endif /* end of WM_LOG_H */
sdk/Include/wm_ram_config.h
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/**
* @file wm_ram_config.h
*
* @brief WM ram model configure
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_RAM_CONFIG_H__
#define __WM_RAM_CONFIG_H__
/*OS Task Stack's lower & upper range*/
#define TASK_STACK_USING_MEM_LOWER_RANGE (0x20000000UL)
#define TASK_STACK_USING_MEM_UPPER_RANGE (0x20028000UL)
/*0x20000000~MASTER_SPI_DMA_ADDR for stack,heap & data*/
/*Master SPI use buffer when spi use dma transfer mode*/
// #define MASTER_SPI_DMA_ADDR 0x20038000UL
#define MASTER_SPI_DMA_ADDR 0x2003BC00UL
/*High speed SPI or SDIO buffer to exchange data*/
// #define SLAVE_HSPI_SDIO_ADDR 0x2003A000UL
#define SLAVE_HSPI_SDIO_ADDR 0x20039C00UL
/*Wi-Fi use buffer to exchange data*/
#define WIFI_MEM_START_ADDR 0x2003C000UL
#endif /*__WM_RAM_CONFIG_H__*/
sdk/Include/wm_regs.h
+917
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@@ -0,0 +1,917 @@
/**
* @file wm_regs.h
*
* @brief register & operation file
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_REGS_H
#define WM_REGS_H
#define __MPU_PRESENT 1
#define __CM3_REV 0x0201 /*!< Core Revision r2p1 */
#define __NVIC_PRIO_BITS 4 /*!< W600 uses 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
typedef enum IRQn
{
/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
/****** Venus specific Interrupt Numbers *******************************************************/
SDIO_RX_IRQn = 0, /*!< SDIO Receiver Interrupt */
SDIO_TX_IRQn = 1, /*!< SDIO Transmit Interrupt */
SDIO_RX_CMD_IRQn = 2, /*!< SDIO Command Receiver Interrupt, Not Used */
SDIO_TX_CMD_IRQn = 3, /*!< SDIO Command Transmit Interrupt */
MAC_IRQn = 4, /*!< MAC Interrupt */
Resverd_IRQn = 5, /*!< Not Used */
SEC_RX_IRQn = 6, /*!< Wi-Fi Rx Interrupt */
SEC_TX_MNGT_IRQn = 7, /*!< Wi-Fi Managment Tx Interrupt */
SEC_TX_DAT_IRQn = 8, /*!< Wi-Fi Data Tx Interrupt */
PMU_TIMER1_IRQn = 9, /*!< PMU Timer1 Interrupt */
PMU_TIMER0_IRQn = 10, /*!< PMU Timer0 Interrupt */
PMU_GPIO_WAKE_IRQn = 11, /*!< PMU GPIO Wake Interrupt */
PMU_SDIO_WAKE_IRQn = 12, /*!< PMU SDIO Wake Interrupt */
DMA_Channel0_IRQn = 13, /*!< DMA Channel 0 global Interrupt */
DMA_Channel1_IRQn = 14, /*!< DMA Channel 1 global Interrupt */
DMA_Channel2_IRQn = 15, /*!< DMA Channel 2 global Interrupt */
DMA_Channel3_IRQn = 16, /*!< DMA Channel 3 global Interrupt */
DMA_Channel4_7_IRQn = 17, /*!< DMA Channel 4~7 global Interrupt */
DMA_BURST_IRQn = 18, /*!< DMA Burst global Interrupt */
I2C_IRQn = 19, /*!< I2C Interrupts */
ADC_IRQn = 20, /*!< ADC Convert Interrupts */
SPI_LS_IRQn = 21, /*!< Low Speed SPI Interrupt */
SPI_HS_IRQn = 22, /*!< High Speed SPI Interrupt */
UART0_IRQn = 23, /*!< UART0 Interrupts */
UART1_IRQn = 24, /*!< UART1 Interrupt */
GPIOA_IRQn = 25, /*!< GPIOA Interrupt */
TIM0_IRQn = 26, /*!< Timer0 Trigger Interrupt */
TIM1_IRQn = 27, /*!< Timer1 Trigger Interrupt */
TIM2_IRQn = 28, /*!< Timer2 Trigger Interrupt */
TIM3_IRQn = 29, /*!< Timer3 Trigger Interrupt */
TIM4_IRQn = 30, /*!< Timer4 Trigger Interrupt */
TIM5_IRQn = 31, /*!< Timer5 Trigger Interrupt */
WDG_IRQn = 32, /*!< WatchDog Interrupt */
PMU_IRQn = 33, /*!< Not Used */
FLASH_IRQn = 34, /*!< Not Used */
PWM_IRQn = 35, /*!< PWM Interrupt */
I2S_IRQn = 36, /*!< I2S Interrupt */
PMU_RTC_IRQn = 37, /*!< PMU RTC Interrupt */
RSA_IRQn = 38, /*!< RSA Interrupt */
CRYPTION_IRQn = 39, /*!< Cryption Interrupt */
GPIOB_IRQn = 40, /*!< GPIOB Interrupt */
UART2_IRQn = 41, /*!< UART2&7816 Interrupt */
} IRQn_Type;
#include "core_cm3.h"
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
typedef volatile unsigned int TLS_REG; /* Hardware register definition */
#define APB_CLK (40000000) /* 40MHz */
#define DEVICE_BASE_ADDR 0x40000000
/***************************************************************
* SDIO模块寄存器定义
***************************************************************/
#define HR_SDIO_BASE_ADDR DEVICE_BASE_ADDR
#define HR_SDIO_CIS0 (HR_SDIO_BASE_ADDR + 0x008)
#define HR_SDIO_CIS1 (HR_SDIO_BASE_ADDR + 0x00C)
#define HR_SDIO_CSA (HR_SDIO_BASE_ADDR + 0x010)
#define HR_SDIO_READ (HR_SDIO_BASE_ADDR + 0x014)
#define HR_SDIO_WRITE (HR_SDIO_BASE_ADDR + 0x018)
#define HR_SDIO_INTEN (HR_SDIO_BASE_ADDR + 0x030)
#define HR_SDIO_OCR (HR_SDIO_BASE_ADDR + 0x034)
#define HR_SDIO_CIA (HR_SDIO_BASE_ADDR + 0x024)
#define HR_SDIO_PROG (HR_SDIO_BASE_ADDR + 0x028)
/***************************************************************
* SPI模块寄存器定义
***************************************************************/
#define HR_HSPI_BASE_ADDR (DEVICE_BASE_ADDR + 0x200)
#define HR_HSPI_CLEAR_FIFO (HR_HSPI_BASE_ADDR)
#define HR_HSPI_SPI_CFG (HR_HSPI_BASE_ADDR + 0x04)
#define HR_HSPI_MODE_CFG (HR_HSPI_BASE_ADDR + 0x08)
#define HR_HSPI_INT_MASK (HR_HSPI_BASE_ADDR + 0x0C)
#define HR_HSPI_INT_STTS (HR_HSPI_BASE_ADDR + 0x10)
#define HR_HSPI_RXDAT_LEN (HR_HSPI_BASE_ADDR + 0x18)
/***************************************************************
* SDIO WRAPPER寄存器定义
***************************************************************/
#define HR_SDIO_WRAPPER_BASE_ADDR (DEVICE_BASE_ADDR + 0x300)
#define HR_SDIO_INT_SRC (HR_SDIO_WRAPPER_BASE_ADDR + 0x000)
#define HR_SDIO_INT_MASK (HR_SDIO_WRAPPER_BASE_ADDR + 0x004)
#define HR_SDIO_UPCMDVALID (HR_SDIO_WRAPPER_BASE_ADDR + 0x008)
#define HR_SDIO_DOWNCMDVALID (HR_SDIO_WRAPPER_BASE_ADDR + 0x00C)
#define HR_SDIO_TXBD_LINKEN (HR_SDIO_WRAPPER_BASE_ADDR + 0x010)
#define HR_SDIO_TXBD_ADDR (HR_SDIO_WRAPPER_BASE_ADDR + 0x014)
#define HR_SDIO_TXEN (HR_SDIO_WRAPPER_BASE_ADDR + 0x018)
#define HR_SDIO_TX_STTS (HR_SDIO_WRAPPER_BASE_ADDR + 0x01C)
#define HR_SDIO_RXBD_LINKEN (HR_SDIO_WRAPPER_BASE_ADDR + 0x020)
#define HR_SDIO_RXBD_ADDR (HR_SDIO_WRAPPER_BASE_ADDR + 0x024)
#define HR_SDIO_RXEN (HR_SDIO_WRAPPER_BASE_ADDR + 0x028)
#define HR_SDIO_RX_STTS (HR_SDIO_WRAPPER_BASE_ADDR + 0x02C)
#define HR_SDIO_CMD_ADDR (HR_SDIO_WRAPPER_BASE_ADDR + 0x030)
#define HR_SDIO_CMD_SIZE (HR_SDIO_WRAPPER_BASE_ADDR + 0x034)
/* SDIO interrupt bit definition */
#define SDIO_WP_INT_SRC_CMD_DOWN (1UL<<3)
#define SDIO_WP_INT_SRC_CMD_UP (1UL<<2)
#define SDIO_WP_INT_SRC_DATA_DOWN (1UL<<1)
#define SDIO_WP_INT_SRC_DATA_UP (1UL<<0)
/***************************************************************
* DMA模块寄存器定义
***************************************************************/
#define HR_DMA_BASE_ADDR (DEVICE_BASE_ADDR + 0x400)
#define HR_DMA_INT_MASK (HR_DMA_BASE_ADDR + 0x0)
#define HR_DMA_INT_SRC (HR_DMA_BASE_ADDR + 0x4)
#define HR_DMA_CHNL_SEL (HR_DMA_BASE_ADDR + 0x08)
#define HR_DMA_CHNL0_SRC_ADDR (HR_DMA_BASE_ADDR + 0x10)
#define HR_DMA_CHNL0_DEST_ADDR (HR_DMA_BASE_ADDR + 0x14)
#define HR_DMA_CHNL0_SRC_WRAP_ADDR (HR_DMA_BASE_ADDR + 0x18)
#define HR_DMA_CHNL0_DEST_WRAP_ADDR (HR_DMA_BASE_ADDR + 0x1C)
#define HR_DMA_CHNL0_WRAP_SIZE (HR_DMA_BASE_ADDR + 0x20)
#define HR_DMA_CHNL0_CHNL_CTRL (HR_DMA_BASE_ADDR + 0x24)
#define HR_DMA_CHNL0_DMA_MODE (HR_DMA_BASE_ADDR + 0x28)
#define HR_DMA_CHNL0_DMA_CTRL (HR_DMA_BASE_ADDR + 0x2C)
#define HR_DMA_CHNL0_DMA_STATUS (HR_DMA_BASE_ADDR + 0x30)
#define HR_DMA_CHNL0_LINK_DEST_ADDR (HR_DMA_BASE_ADDR + 0x34)
#define HR_DMA_CHNL0_CURRENT_DEST_ADDR (HR_DMA_BASE_ADDR + 0x38)
#define DMA_STARTADDRESS (0x40000400)
#define DMA_INTMASK_REG (*(volatile unsigned int*)(DMA_STARTADDRESS+0x000))
#define DMA_INTSRC_REG (*(volatile unsigned int*)(DMA_STARTADDRESS+0x004))
#define DMA_CHNL_REG_BASE (DMA_STARTADDRESS+0x010)
#define DMA_SRCADDR_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x00))
#define DMA_DESTADDR_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x04))
#define DMA_SRCWRAPADDR_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x08))
#define DMA_DESTWRAPADDR_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x0C))
#define DMA_WRAPSIZE_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x10))
#define DMA_CHNLCTRL_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x14))
#define DMA_MODE_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x18))
#define DMA_CTRL_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x1C))
#define DMA_STATUS_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x20))
#define DMA_CURRSRCADDR_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x24))
#define DMA_CURRDESTADDR_REG(ch) (*(volatile unsigned int*)(DMA_CHNL_REG_BASE + 0x30 * (ch /*- 1*/) +0x28))
#define DMA_CHNL_CTRL_CHNL_ON (1<<0)
#define DMA_CHNL_CTRL_CHNL_OFF (1<<1)
#define DMA_MODE_HARD_MODE (1<<0)
#define DMA_MODE_CHAIN_MODE (1<<1)
/***************************************************************
* 节能模块寄存器定义
***************************************************************/
#define HR_PMU_BASE_ADDR (DEVICE_BASE_ADDR + 0x600)
#define HR_PMU_PS_CR (HR_PMU_BASE_ADDR + 0x00)
#define HR_PMU_TIMER0 (HR_PMU_BASE_ADDR + 0x04)
#define HR_PMU_TIMER1 (HR_PMU_BASE_ADDR + 0x08)
#define HR_PMU_RTC_CTRL1 (HR_PMU_BASE_ADDR + 0x0C)
#define HR_PMU_RTC_CTRL2 (HR_PMU_BASE_ADDR + 0x10)
#define HR_PMU_INTERRUPT_SRC (HR_PMU_BASE_ADDR + 0x14)
#define HR_PMU_INTERRUPT_MASK (HR_PMU_BASE_ADDR + 0x18)
#define HR_PMU_WLAN_STTS (HR_PMU_BASE_ADDR + 0x1C)
/* 节能寄存器位定义 */
#define PMU_WLAN_SLEEP_EN_BIT (1UL << 0)
#define PMU_PRETBTT_PERIOD_RSV (0xE0000000)
#define PMU_TBTT_TIMER_MASK (0x3FFFF)
#define PMU_TBTT_TIMER_SHIFT (11)
#define PMU_SLEEP_INTERVAL_MASK (0x7FF)
#define PMU_SLEEP_INTERVAL_SHIFT (0)
#define PMU_TBTT_OFFSET_MASK (0x7FFF)
#define PMU_TBTT_OFFSET_SHIFT (17)
#define PMU_PRETBTT_TIMER_MASK (0x1FFFF)
#define PMU_PRETBTT_TIMER_SHIFT (0)
#define PMU_PRETBTT_OFFSET_DEFAULT (((30UL) << 17) | (300UL))
#define PMU_TIMER0_WAKEUP_EN (1UL << 3)
#define PMU_TIMER1_WAKEUP_EN (1UL << 2)
#define PMU_GPIO_WAKEUP_EN (1UL << 1)
#define PMU_SDIO_WAKEUP_EN (1UL << 0)
#define PMU_TIMER0_NTERRUPT_SRC (1UL << 0)
#define PMU_TIMER1_NTERRUPT_SRC (1UL << 1)
#define PMU_GPIO_NTERRUPT_SRC (1UL << 2)
#define PMU_SDIO_NTERRUPT_SRC (1UL << 3)
#define PMU_TIMER0_NTERRUPT_MASK (1UL << 0)
#define PMU_TIMER1_NTERRUPT_MASK (1UL << 1)
#define PMU_GPIO_NTERRUPT_MASK (1UL << 2)
#define PMU_SDIO_NTERRUPT_MASK (1UL << 3)
#define PMU_WLAN_RX_IDLE_BIT (1UL << 1)
#define PMU_WLAN_TX_IDLE_BIT (1UL << 0)
#define PMU_LDO_DAC28_BYPASS (1UL<<0)
#define PMU_LDO_SW_BYPASS (1UL<<1)
#define PMU_DLDO_BYPASS (1UL<<2)
#define PMU_LDO_PRE_BYPASS (1UL<<3)
#define PMU_LDO_ADDA_D_BYPASS (1UL<<4)
#define PMU_LDO_ADDA_A_BYPASS (1UL<<5)
#define PMU_LDO_UM_PA_BYPASS (1UL<<6)
#define PMU_LDO_CHP_BYPASS (1UL<<7)
#define PMU_LDO_DM_IF_BYPASS (1UL<<8)
#define PMU_LDO_LNA_BYPASS (1UL<<9)
#define PMU_LDO_VCO_BYPASS (1UL<<10)
#define PMU_LDO_LO_BYPASS (1UL<<11)
#define PMU_LDO_PLL_BYPASS (1UL<<15)
#define PMU_LDO_WLAN_BYPASS (1UL<<19)
#define PMU_LDO_BGR_BYPASS (1UL<<20)
#define PMU_LDO_BB_BYPASS (1UL<<21)
/***************************************************************
* system clock 和bus clock寄存器定义
***************************************************************/
#define HR_CLK_BASE_ADDR (DEVICE_BASE_ADDR + 0x700)
#define HR_CLK_SOFT_CLK_MASK (HR_CLK_BASE_ADDR + 0x04)
#define HR_CLK_BBP_CLT_CTRL (HR_CLK_BASE_ADDR + 0x08)
#define HR_CLK_RST_CTL (HR_CLK_BASE_ADDR + 0x0c)
#define HR_CLK_DIV_CTL (HR_CLK_BASE_ADDR + 0x10)
#define HR_CLK_I2S_CTL (HR_CLK_BASE_ADDR + 0x18)
#define I2S_CLK_CTL_EXT_Pos (0)
#define I2S_CLK_CTL_MCLK_Pos (1)
#define I2S_CLK_CTL_MCLKDIV_Pos (2)
#define I2S_CLK_CTL_BCLKDIV_Pos (8)
/***************************************************************
* 内存模块寄存器定义
***************************************************************/
#define HR_MEM_BASE_ADDR (DEVICE_BASE_ADDR + 0x800)
#define HR_MEM_TXBUF_BASE_ADDR (HR_MEM_BASE_ADDR + 0x00)
#define HR_MEM_RXBUF_BASE_ADDR (HR_MEM_BASE_ADDR + 0x04)
#define HR_MEM_BUF_NUM_CFG (HR_MEM_BASE_ADDR + 0x08)
#define HR_MEM_BUF_SIZE_CFG (HR_MEM_BASE_ADDR + 0x0C)
#define HR_MEM_AGGR_CFG (HR_MEM_BASE_ADDR + 0x10)
#define HR_MEM_BUF_EN (HR_MEM_BASE_ADDR + 0x14)
/***************************************************************
* 中断模块寄存器定义
***************************************************************/
#define HR_VIC_BASE_ADDR 0xFFFFF000
#define HR_VIC_IRQ_STATUS (HR_VIC_BASE_ADDR + 0x0)
#define HR_VIC_FIQ_STATUS (HR_VIC_BASE_ADDR + 0x4)
#define HR_VIC_RAW_INTR (HR_VIC_BASE_ADDR + 0x8)
#define HR_VIC_INT_SELECT (HR_VIC_BASE_ADDR + 0xc)
#define HR_VIC_INT_ENABLE (HR_VIC_BASE_ADDR + 0x10)
#define HR_VIC_INT_EN_CLR (HR_VIC_BASE_ADDR + 0x14)
#define HR_VIC_SOFT_INT (HR_VIC_BASE_ADDR + 0x18)
#define HR_VIC_SOFT_INT_CLR (HR_VIC_BASE_ADDR + 0x1c)
#define HR_VIC_PROTECT (HR_VIC_BASE_ADDR + 0x20)
#define HR_VIC_VECT_ADDR (HR_VIC_BASE_ADDR + 0x30)
#define HR_VIC_DEF_VECT_ADDR (HR_VIC_BASE_ADDR + 0x34)
#define HR_VIC_VECT_ENABLE (HR_VIC_BASE_ADDR + 0x100)
#define HR_VIC_VECT_BASE_ADDR (HR_VIC_BASE_ADDR + 0x104)
#define HR_VIC_INT_NUM (HR_VIC_BASE_ADDR + 0x108)
#define HR_VIC_INT_PRIO0 (HR_VIC_BASE_ADDR + 0x10C)
#define HR_VIC_INT_PRIO1 (HR_VIC_BASE_ADDR + 0x110)
#define HR_VIC_INT_PRIO2 (HR_VIC_BASE_ADDR + 0x114)
#define HR_VIC_INT_PRIO3 (HR_VIC_BASE_ADDR + 0x118)
/* APB基地址*/
#define HR_APB_BASE_ADDR 0x40010000
/***************************************************************
* I2C模块寄存器定义
***************************************************************/
#define HR_I2C_BASE_ADDR (HR_APB_BASE_ADDR)
#define HR_I2C_PRER_LO (HR_I2C_BASE_ADDR + 0x0)
#define HR_I2C_PRER_HI (HR_I2C_BASE_ADDR + 0x04)
#define HR_I2C_CTRL (HR_I2C_BASE_ADDR + 0x08)
#define HR_I2C_TX_RX (HR_I2C_BASE_ADDR + 0x0C)
#define HR_I2C_CR_SR (HR_I2C_BASE_ADDR + 0x10)
#define HR_I2C_TXR (HR_I2C_BASE_ADDR + 0x14)
#define HR_I2C_CR (HR_I2C_BASE_ADDR + 0x18)
#define I2C_CTRL_INT_DISABLE (0x1UL<<6)
#define I2C_CTRL_ENABLE (0x1UL<<7)
#define I2C_CR_STA (0x1UL<<7)
#define I2C_CR_STO (0x1UL<<6)
#define I2C_CR_RD (0x1UL<<5)
#define I2C_CR_WR (0x1UL<<4)
#define I2C_CR_NAK (0x1UL<<3)
#define I2C_CR_IACK (0x1UL)
#define I2C_SR_NAK (0x1UL<<7)
#define I2C_SR_BUSY (0x1UL<<6)
#define I2C_SR_TIP (0x1UL<<1)
#define I2C_SR_IF (0x1UL)
/***************************************************************
* SD ADC模块寄存器定义
***************************************************************/
#define HR_SD_ADC_BASE_ADDR (HR_APB_BASE_ADDR + 0x200)
#define HR_SD_ADC_RESULT_REG ((HR_SD_ADC_BASE_ADDR+0x000))
#define HR_SD_ADC_CONFIG_REG ((HR_SD_ADC_BASE_ADDR+0x004))
/***************************************************************
* SPI模块寄存器定义
***************************************************************/
#define HR_SPI_BASE_ADDR (HR_APB_BASE_ADDR + 0x400)
#define HR_SPI_CHCFG_REG (HR_SPI_BASE_ADDR + 0x000)
#define HR_SPI_SPICFG_REG (HR_SPI_BASE_ADDR + 0x004)
#define HR_SPI_CLKCFG_REG (HR_SPI_BASE_ADDR + 0x008)
#define HR_SPI_MODECFG_REG (HR_SPI_BASE_ADDR + 0x00C)
#define HR_SPI_INT_MASK_REG (HR_SPI_BASE_ADDR + 0x010)
#define HR_SPI_INT_STATUS_REG (HR_SPI_BASE_ADDR + 0x014)
#define HR_SPI_STATUS_REG (HR_SPI_BASE_ADDR + 0x018)
#define HR_SPI_TIMEOUT_REG (HR_SPI_BASE_ADDR + 0x01C)
#define HR_SPI_TXDATA_REG (HR_SPI_BASE_ADDR + 0x020)
#define HR_SPI_TRANSLEN_REG (HR_SPI_BASE_ADDR + 0x024)
#define HR_SPI_SLV_XMIT_LEN_REG (HR_SPI_BASE_ADDR + 0x028)
#define HR_SPI_RXDATA_REG (HR_SPI_BASE_ADDR + 0x030)
#define SPIM_STARTADDRESS (HR_APB_BASE_ADDR + 0x400)
#define SPIM_CHCFG_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x000))
#define SPIM_SPICFG_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x004))
#define SPIM_CLKCFG_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x008))
#define SPIM_MODECFG_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x00C))
#define SPIM_INTEN_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x010))
#define SPIM_INTSRC_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x014))
#define SPIM_SPISTATUS_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x018))
#define SPIM_SPITIMEOUT_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x01C))
#define SPIM_TXDATA_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x020))
#define SPIM_TRANSLEN_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x024))
#define SPIM_RXDATA_REG (*(volatile unsigned int*)(SPIM_STARTADDRESS+0x030))
/*RSA寄存器*/
#define RSA_BASE_ADDRESS 0x40002200
#define RSAXBUF (*((volatile unsigned long *) (RSA_BASE_ADDRESS + 0x0 )))
#define RSAYBUF (*((volatile unsigned long *) (RSA_BASE_ADDRESS + 0x100 )))
#define RSAMBUF (*((volatile unsigned long *) (RSA_BASE_ADDRESS + 0x200 )))
#define RSADBUF (*((volatile unsigned long *) (RSA_BASE_ADDRESS + 0x300 )))
#define RSACON (*((volatile unsigned long *) (RSA_BASE_ADDRESS + 0x400 )))
#define RSAMC (*((volatile unsigned long *) (RSA_BASE_ADDRESS + 0x404 )))
#define RSAN (*((volatile unsigned long *) (RSA_BASE_ADDRESS + 0x408 )))
/* Bits Definitions of "CH_CFG" */
#define SPI_RX_INVALID_BITS(n) ((n) << 23)
#define SPI_CLEAR_FIFOS (1U << 22)
#define SPI_CONTINUE_MODE (1U << 21)
#define SPI_RX_CHANNEL_ON (1U << 20)
#define SPI_RX_CHANNEL_OFF (0U << 20)
#define SPI_TX_CHANNEL_ON (1U << 19)
#define SPI_TX_CHANNEL_OFF (0U << 19)
#define SPI_VALID_CLKS_NUM(n) ((n) << 3)
#define SPI_CS_LOW (0U << 2)
#define SPI_CS_HIGH (1U << 2)
#define SPI_FORCE_SPI_CS_OUT (1U << 1)
#define SPI_START (1U << 0)
/* Bits Definitions of "SPI_CFG" */
#define SPI_FRAME_FORMAT_MOTO (0U << 17)
#define SPI_FRAME_FORMAT_TI (1U << 17)
#define SPI_FRAME_FORMAT_MICROWAIRE (2U << 17)
#define SPI_TX_PIN_ALWS_DRIVER (1U << 16)
#define SPI_CS_HOLD(n) ((n) << 12)
#define CS_HOLD_1_CLKS 0
#define CS_HOLD_2_CLKS 1
#define CS_HOLD_4_CLKS 2
#define CS_HOLD_8_CLKS 3
#define CS_HOLD_16_CLKS 4
#define CS_HOLD_32_CLKS 5
#define CS_HOLD_64_CLKS 6
#define CS_HOLD_127_CLKS 7
#define SPI_CS_SETUP(n) ((n) << 9)
#define CS_SETUP_1_CLKS 0
#define CS_SETUP_2_CLKS 1
#define CS_SETUP_4_CLKS 2
#define CS_SETUP_8_CLKS 3
#define CS_SETUP_16_CLKS 4
#define CS_SETUP_32_CLKS 5
#define CS_SETUP_64_CLKS 6
#define CS_SETUP_127_CLKS 7
#define SPI_DATA_OUT_DELAY(n) ((n) << 7)
#define DATA_OUT_DELAY_1_CLKS 0
#define DATA_OUT_DELAY_2_CLKS 1
#define DATA_OUT_DELAY_3_CLKS 2
#define DATA_OUT_DELAY_0_CLKS 3
#define SPI_FRAME_DELAY(n) ((n) << 4)
#define FRAME_DELAY_1_CLKS 0
#define FRAME_DELAY_2_CLKS 1
#define FRAME_DELAY_4_CLKS 2
#define FRAME_DELAY_8_CLKS 3
#define FRAME_DELAY_16_CLKS 4
#define FRAME_DELAY_32_CLKS 5
#define FRAME_DELAY_64_CLKS 6
#define FRAME_DELAY_127_CLKS 7
#define SPI_LITTLE_ENDIAN (0 << 3)
#define SPI_BIG_ENDIAN (1 << 3)
#define SPI_SET_MASTER_SLAVE(mode) ((mode) << 2)
#define SPI_MASTER 1
#define SPI_SLAVE 0
#define SPI_SET_CPHA(n) ((n) << 1)
#define SPI_SET_CPOL(n) ((n) << 0)
/* Bits Definitions of "CLK_CFG" */
#define SPI_GET_SCLK_DIVIDER(clk) ((APB_CLK)/((clk) * 2) - 1)/*In HZ*/
#define SPI_SCLK_DIVIDER(n) ((n) << 0)
/* Bits Definitions of "MODE_CFG" */
#define SPI_RX_TRIGGER_LEVEL(n) ((n) << 6)
#define SPI_TX_TRIGGER_LEVEL(n) ((n) << 2)
#define SPI_RX_DMA_ON (1 << 1)
#define SPI_RX_DMA_OFF (0 << 1)
#define SPI_TX_DMA_ON (1 << 0)
#define SPI_TX_DMA_OFF (0 << 0)
/* Bits Definitions of SPI interrupt register(SPI_INT_MASK and SPI_INT_SOURCE) */
#define SPI_INT_MASK_ALL 0xffU
#define SPI_INT_CLEAR_ALL 0xffU
#define SPI_INT_TIMEOUT (1U << 7)
#define SPI_INT_TRANSFER_DONE (1U << 6)
#define SPI_INT_RX_OVERRUN (1U << 5)
#define SPI_INT_RX_UNDERRUN (1U << 4)
#define SPI_INT_TX_OVERRUN (1U << 3)
#define SPI_INT_TX_UNDERRUN (1U << 2)
#define SPI_INT_RX_FIFO_RDY (1U << 1)
#define SPI_INT_TX_FIFO_RDY (1U << 0)
/* Bits Definitions of "SPI_STATUS" */
#define SPI_IS_BUSY(value) ((((value) & (1 << 12)) != 0) ? 1 : 0)
#define SPI_GET_RX_FIFO_CNT(value) (((value) & 0xFC0) >> 6)
#define SPI_GET_TX_FIFO_CNT(value) ((value) & 0x3F)
/* Bits Definitions of "SPI_TIMEOUT" */
#define SPI_TIMER_EN (1U << 31)
#define SPI_TIME_OUT(n) (((((n) * (APB_CLK)) / 1000) & ~(0x01U << 31)) << 0)
/***************************************************************
* UART寄存器定义
***************************************************************/
#define HR_UART0_BASE_ADDR (HR_APB_BASE_ADDR + 0x800)
#define HR_UART1_BASE_ADDR (HR_APB_BASE_ADDR + 0xA00)
#define HR_UART2_BASE_ADDR (HR_APB_BASE_ADDR + 0x1C00)
#define HR_UART0_LINE_CTRL (HR_UART0_BASE_ADDR + 0x0)
#define HR_UART0_FLOW_CTRL (HR_UART0_BASE_ADDR + 0x04)
#define HR_UART0_DMA_CTRL (HR_UART0_BASE_ADDR + 0x08)
#define HR_UART0_FIFO_CTRL (HR_UART0_BASE_ADDR + 0x0C)
#define HR_UART0_BAUD_RATE_CTRL (HR_UART0_BASE_ADDR + 0x10)
#define HR_UART0_INT_MASK (HR_UART0_BASE_ADDR + 0x14)
#define HR_UART0_INT_SRC (HR_UART0_BASE_ADDR + 0x18)
#define HR_UART0_FIFO_STATUS (HR_UART0_BASE_ADDR + 0x1C)
#define HR_UART0_TX_WIN (HR_UART0_BASE_ADDR + 0x20)
#define HR_UART0_RX_WIN (HR_UART0_BASE_ADDR + 0x30)
#define HR_UART1_LINE_CTRL (HR_UART1_BASE_ADDR + 0x0)
#define HR_UART1_FLOW_CTRL (HR_UART1_BASE_ADDR + 0x04)
#define HR_UART1_DMA_CTRL (HR_UART1_BASE_ADDR + 0x08)
#define HR_UART1_FIFO_CTRL (HR_UART1_BASE_ADDR + 0x0C)
#define HR_UART1_BAUD_RATE_CTRL (HR_UART1_BASE_ADDR + 0x10)
#define HR_UART1_INT_MASK (HR_UART1_BASE_ADDR + 0x14)
#define HR_UART1_INT_SRC (HR_UART1_BASE_ADDR + 0x18)
#define HR_UART1_FIFO_STATUS (HR_UART1_BASE_ADDR + 0x1C)
#define HR_UART1_TX_WIN (HR_UART1_BASE_ADDR + 0x20)
#define HR_UART1_RX_WIN (HR_UART1_BASE_ADDR + 0x30)
#define HR_UART2_LINE_CTRL (HR_UART2_BASE_ADDR + 0x0)
#define HR_UART2_FLOW_CTRL (HR_UART2_BASE_ADDR + 0x04)
#define HR_UART2_DMA_CTRL (HR_UART2_BASE_ADDR + 0x08)
#define HR_UART2_FIFO_CTRL (HR_UART2_BASE_ADDR + 0x0C)
#define HR_UART2_BAUD_RATE_CTRL (HR_UART2_BASE_ADDR + 0x10)
#define HR_UART2_INT_MASK (HR_UART2_BASE_ADDR + 0x14)
#define HR_UART2_INT_SRC (HR_UART2_BASE_ADDR + 0x18)
#define HR_UART2_FIFO_STATUS (HR_UART2_BASE_ADDR + 0x1C)
#define HR_UART2_TX_WIN (HR_UART2_BASE_ADDR + 0x20)
#define HR_UART2_RX_WIN (HR_UART2_BASE_ADDR + 0x30)
#define HR_UART2_GUARD_TIME (HR_UART2_BASE_ADDR + 0x40)
#define HR_UART2_WAIT_TIME (HR_UART2_BASE_ADDR + 0x44)
/*
* Line Control Register bits definition
* ULCON0 ULCON1 Register
*/
/* bit 0-1 : Word length */
#define ULCON_WL5 0x00
#define ULCON_WL6 0x01
#define ULCON_WL7 0x02
#define ULCON_WL8 0x03
#define ULCON_WL_MASK 0x03
/* bit 2 : Number of stop bits */
#define ULCON_STOP_2 0x04 /* 2 stop bit */
/* bit 3-4 : Parity mode */
#define ULCON_PMD_MASK 0x18
#define ULCON_PMD_EN 0x08 /* no parity */
#define ULCON_PMD_ODD 0x18 /* odd parity */
#define ULCON_PMD_EVEN 0x08 /* even parity */
/* bit 6 uart tx enable */
#define ULCON_TX_EN 0x40
#define ULCON_RX_EN 0x80
/* bit 6 : Infra-red mode */
#define ULCON_INFRA_RED 0x80
/*
* auto flow control register bits definition
*/
#define UFC_ENABLE 0x01
#define UFC_SW_RTS_SET 0x02
#define UFC_RTS_TRIGGER_LVL_4_BYTE (0<<2)
#define UFC_RTS_TRIGGER_LVL_8_BYTE (1<<2)
#define UFC_RTS_TRIGGER_LVL_12_BYTE (2<<2)
#define UFC_RTS_TRIGGER_LVL_16_BYTE (3<<2)
#define UFC_RTS_TRIGGER_LVL_20_BYTE (4<<2)
#define UFC_RTS_TRIGGER_LVL_24_BYTE (5<<2)
#define UFC_RTS_TRIGGER_LVL_28_BYTE (6<<2)
#define UFC_RTS_TRIGGER_LVL_31_BYTE (7<<2)
#define UFC_TX_FIFO_RESET 0x01
#define UFC_RX_FIFO_RESET 0x02
#define UFC_TX_FIFO_LVL_ZERO (0<<2)
#define UFC_TX_FIFO_LVL_4_BYTE (1<<2)
#define UFC_TX_FIFO_LVL_8_BYTE (2<<2)
#define UFC_TX_FIFO_LVL_16_BYTE (3<<2)
#define UFC_RX_FIFO_LVL_ZERO (0<<4)
#define UFC_RX_FIFO_LVL_4_BYTE (1<<4)
#define UFC_RX_FIFO_LVL_8_BYTE (2<<4)
#define UFC_RX_FIFO_LVL_16_BYTE (3<<4)
/* dma control */
#define UDMA_RX_FIFO_TIMEOUT (1<<2)
#define UDMA_RX_FIFO_TIMEOUT_SHIFT (3)
/*
* uart interrupt source register bits definition
*/
#define UIS_TX_FIFO_EMPTY (1UL<<0)
#define UIS_TX_FIFO (1UL<<1)
#define UIS_RX_FIFO (1UL<<2)
#define UIS_RX_FIFO_TIMEOUT (1UL<<3)
#define UIS_CTS_CHNG (1UL<<4)
#define UIS_BREAK (1UL<<5)
#define UIS_FRM_ERR (1UL<<6)
#define UIS_PARITY_ERR (1UL<<7)
#define UIS_OVERRUN (1UL<<8)
/*
* fifo status register bits definition
*/
/* bit 0-5 : tx fifo count */
#define UFS_TX_FIFO_CNT_MASK 0x3F
/* bit 6-11 : rx fifo count */
#define UFS_RX_FIFO_CNT_MASK 0x3C0
#define UFS_CST_STS (1UL<<12)
/***************************************************************
* GPIO寄存器定义
***************************************************************/
#define HR_GPIO_BASE_ADDR (HR_APB_BASE_ADDR + 0x0C00)
#define HR_GPIO_DATA (HR_GPIO_BASE_ADDR + 0x0)
#define HR_GPIO_DATA_EN (HR_GPIO_BASE_ADDR + 0x04)
#define HR_GPIO_DIR (HR_GPIO_BASE_ADDR + 0x08)
#define HR_GPIO_PULL_EN (HR_GPIO_BASE_ADDR + 0x0C)
#define HR_GPIO_AF_SEL (HR_GPIO_BASE_ADDR + 0x10)
#define HR_GPIO_AF_S1 (HR_GPIO_BASE_ADDR + 0x14)
#define HR_GPIO_AF_S0 (HR_GPIO_BASE_ADDR + 0x18)
#define HR_GPIO_IS (HR_GPIO_BASE_ADDR + 0x20)
#define HR_GPIO_IBE (HR_GPIO_BASE_ADDR + 0x24)
#define HR_GPIO_IEV (HR_GPIO_BASE_ADDR + 0x28)
#define HR_GPIO_IE (HR_GPIO_BASE_ADDR + 0x2c)
#define HR_GPIO_RIS (HR_GPIO_BASE_ADDR + 0x30)
#define HR_GPIO_MIS (HR_GPIO_BASE_ADDR + 0x34)
#define HR_GPIO_IC (HR_GPIO_BASE_ADDR + 0x38)
#define HR_GPIOA_BASE_ADDR (HR_APB_BASE_ADDR + 0x0C00)
#define HR_GPIOA_DATA (HR_GPIOA_BASE_ADDR + 0x0)
#define HR_GPIOA_DATA_EN (HR_GPIOA_BASE_ADDR + 0x04)
#define HR_GPIOA_DATA_DIR (HR_GPIOA_BASE_ADDR + 0x08)
#define HR_GPIOA_DATA_PULLEN (HR_GPIOA_BASE_ADDR + 0x0c)
#define HR_GPIOA_AFSEL (HR_GPIOA_BASE_ADDR + 0x10)
#define HR_GPIOA_AFS1 (HR_GPIOA_BASE_ADDR + 0x14)
#define HR_GPIOA_AFS0 (HR_GPIOA_BASE_ADDR + 0x18)
#define HR_GPIOA_IS (HR_GPIOA_BASE_ADDR + 0x20)
#define HR_GPIOA_IBE (HR_GPIOA_BASE_ADDR + 0x24)
#define HR_GPIOA_IEV (HR_GPIOA_BASE_ADDR + 0x28)
#define HR_GPIOA_IE (HR_GPIOA_BASE_ADDR + 0x2C)
#define HR_GPIOA_RIS (HR_GPIOA_BASE_ADDR + 0x30)
#define HR_GPIOA_MIS (HR_GPIOA_BASE_ADDR + 0x34)
#define HR_GPIOA_IC (HR_GPIOA_BASE_ADDR + 0x38)
#define HR_GPIOB_BASE_ADDR (HR_APB_BASE_ADDR + 0x1200)
#define HR_GPIOB_DATA (HR_GPIOB_BASE_ADDR + 0x0)
#define HR_GPIOB_DATA_EN (HR_GPIOB_BASE_ADDR + 0x04)
#define HR_GPIOB_DATA_DIR (HR_GPIOB_BASE_ADDR + 0x08)
#define HR_GPIOB_DATA_PULLEN (HR_GPIOB_BASE_ADDR + 0x0c)
#define HR_GPIOB_AFSEL (HR_GPIOB_BASE_ADDR + 0x10)
#define HR_GPIOB_AFS1 (HR_GPIOB_BASE_ADDR + 0x14)
#define HR_GPIOB_AFS0 (HR_GPIOB_BASE_ADDR + 0x18)
#define HR_GPIOB_IS (HR_GPIOB_BASE_ADDR + 0x20)
#define HR_GPIOB_IBE (HR_GPIOB_BASE_ADDR + 0x24)
#define HR_GPIOB_IEV (HR_GPIOB_BASE_ADDR + 0x28)
#define HR_GPIOB_IE (HR_GPIOB_BASE_ADDR + 0x2C)
#define HR_GPIOB_RIS (HR_GPIOB_BASE_ADDR + 0x30)
#define HR_GPIOB_MIS (HR_GPIOB_BASE_ADDR + 0x34)
#define HR_GPIOB_IC (HR_GPIOB_BASE_ADDR + 0x38)
#define IO_PA_BASE_ADDR (HR_APB_BASE_ADDR + 0x0C00)
#define IO_PA_DATA (*(volatile unsigned int*)(IO_PA_BASE_ADDR + 0x0))
#define IO_PA_EN (*(volatile unsigned int*)(IO_PA_BASE_ADDR + 0x4))
#define IO_PA_DIR (*(volatile unsigned int*)(IO_PA_BASE_ADDR + 0x8))
#define IO_PA_REN (*(volatile unsigned int*)(IO_PA_BASE_ADDR + 0xC))
#define IO_PA_AFSEL (*(volatile unsigned int*)(IO_PA_BASE_ADDR + 0x10))
#define IO_PA_AFS1 (*(volatile unsigned int*)(IO_PA_BASE_ADDR + 0x14))
#define IO_PA_AFS0 (*(volatile unsigned int*)(IO_PA_BASE_ADDR + 0x18))
/***************************************************************
* TIMER寄存器定义
***************************************************************/
#define HR_TIMER_BASE_ADDR (HR_APB_BASE_ADDR + 0x0E00)
#define HR_TIMER_CFG (HR_TIMER_BASE_ADDR + 0x0)
#define HR_TIMER0_5_CSR (HR_TIMER_BASE_ADDR + 0x04)
#define HR_TIMER0_PRD (HR_TIMER_BASE_ADDR + 0x08)
#define HR_TIMER1_PRD (HR_TIMER_BASE_ADDR + 0x0C)
#define HR_TIMER2_PRD (HR_TIMER_BASE_ADDR + 0x10)
#define HR_TIMER3_PRD (HR_TIMER_BASE_ADDR + 0x14)
#define HR_TIMER4_PRD (HR_TIMER_BASE_ADDR + 0x18)
#define HR_TIMER5_PRD (HR_TIMER_BASE_ADDR + 0x1C)
/* timer csr bits defintion */
#define TLS_TIMER_MS_UNIT(n) (1UL<<(0+5*n))
#define TLS_TIMER_ONE_TIME(n) (1UL<<(1+5*n))
#define TLS_TIMER_EN(n) (1UL<<(2+5*n))
#define TLS_TIMER_INT_EN(n) (1UL<<(3+5*n))
#define TLS_TIMER_INT_CLR(n) (1UL<<(4+5*n))
/***************************************************************
* WATCH DOG寄存器定义
***************************************************************/
#define HR_WDG_BASE_ADDR (HR_APB_BASE_ADDR + 0x1000)
#define HR_WDG_LOAD_VALUE (HR_WDG_BASE_ADDR + 0x00)
#define HR_WDG_CUR_VALUE (HR_WDG_BASE_ADDR + 0x04)
#define HR_WDG_CTRL (HR_WDG_BASE_ADDR + 0x08)
#define HR_WDG_INT_CLR (HR_WDG_BASE_ADDR + 0x0C)
#define HR_WDG_INT_SRC (HR_WDG_BASE_ADDR + 0x10)
#define HR_WDG_INT_MIS (HR_WDG_BASE_ADDR + 0x14)
#define HR_WDG_LOCK (HR_WDG_BASE_ADDR + 0x40)
/***************************************************************
* IOCTL寄存器定义
***************************************************************/
#define HR_IOCTL_BASE_ADDR (HR_APB_BASE_ADDR + 0x1200)
#define HR_IOCTL_DL_MODE (HR_IOCTL_BASE_ADDR + 0x0)
#define HR_IOCTL_GP_SDIO_I2C (HR_IOCTL_BASE_ADDR + 0x04)
#define HR_IOCTL_GP_JTAG (HR_IOCTL_BASE_ADDR + 0x08)
#define HR_IOCTL_GP_SPI (HR_IOCTL_BASE_ADDR + 0x0C)
#define HR_IOCTL_PE (HR_IOCTL_BASE_ADDR + 0x10)
#define IOCTRL_STARTADDRESS (HR_APB_BASE_ADDR + 0x1200)
#define IOCTRL_DOWNLOAD_MODE_REG (*(volatile unsigned *)(IOCTRL_STARTADDRESS+0x000))
#define IOCTRL_PIN_CONFIG_REG1 (*(volatile unsigned *)(IOCTRL_STARTADDRESS+0x004))
#define IOCTRL_PIN_CONFIG_REG2 (*(volatile unsigned *)(IOCTRL_STARTADDRESS+0x008))
#define IOCTRL_PIN_CONFIG_REG3 (*(volatile unsigned *)(IOCTRL_STARTADDRESS+0x00C))
/** bit field of the lcd gate control in CLK gating register */
#define HR_CLK_LCD_GATE_Pos (10)
/***********************************************************//**
* LCD寄存器定义
***************************************************************/
#define HR_LCD_REG_BASE (HR_APB_BASE_ADDR + 0x1600) //(0x4001 1600)
#define HR_LCD_CR (HR_LCD_REG_BASE+0x000)
#define HR_LCD_FRAME_CNT (HR_LCD_REG_BASE+0x004)
#define HR_LCD_COM0_1_SEG (HR_LCD_REG_BASE+0x008)
#define HR_LCD_COM2_3_SEG (HR_LCD_REG_BASE+0x00C)
#define HR_LCD_COM4_5_SEG (HR_LCD_REG_BASE+0x010)
#define HR_LCD_COM6_7_SEG (HR_LCD_REG_BASE+0x014)
#define HR_LCD_IO_EN (HR_LCD_REG_BASE+0x018)
#define LCD_CR_EN_Pos (8)
#define LCD_CR_PD_Pos (9)
#define LCD_CR_MODE_Pos (11)
#define LCD_CR_MODE_MASK (1UL<<11)
#define LCD_CR_MODE_4x20 (1UL<<11)
#define LCD_CR_MODE_8X16 (0UL<<11)
#define LCD_EN (1UL<<8)
#define LCD_BIAS_MASK (3UL<<6)
#define LCD_BIAS_MASK_Pos (6)
#define LCD_BIAS_ONEFOURTH (0UL<<6)
#define LCD_BIAS_ONEHALF (1UL<<6)
#define LCD_BIAS_ONETHIRD (2UL<<6)
#define LCD_BIAS_STATIC (3UL<<6)
#define LCD_VLCD_MASK (7UL<<3)
#define LCD_VLCD_MASK_Pos (3)
#define LCD_VLCD_27 (0UL<<3)
#define LCD_VLCD_29 (1UL<<3)
#define LCD_VLCD_31 (2UL<<3)
#define LCD_VLCD_33 (3UL<<3)
#define LCD_DUTY_MASK (7UL<<0)
#define LCD_DUTY_MASK_Pos (0)
#define LCD_DUTY_STATIC (0UL<<0)
#define LCD_DUTY_ONEHALF (1UL<<0)
#define LCD_DUTY_ONETHIRD (2UL<<0)
#define LCD_DUTY_ONEFOURTH (3UL<<0)
#define LCD_DUTY_ONEFIFTH (4UL<<0)
#define LCD_DUTY_ONESIXTH (5UL<<0)
#define LCD_DUTY_ONESEVENTH (6UL<<0)
#define LCD_DUTY_ONEEIGHTH (7UL<<0)
/***********************************************************//**
* I2S寄存器定义
***************************************************************/
#define HR_CLK_I2S_GATE_Pos (11)
#define HR_I2S_REG_BASE (HR_APB_BASE_ADDR+0x1A00)
#define HR_I2S_CTRL (HR_I2S_REG_BASE+0x000)
#define HR_I2S_INT_MASK (HR_I2S_REG_BASE+0x004)
#define HR_I2S_INT_SRC (HR_I2S_REG_BASE+0x008)
#define HR_I2S_STATUS (HR_I2S_REG_BASE+0x00C)
#define HR_I2S_TX (HR_I2S_REG_BASE+0x010)
#define HR_I2S_RX (HR_I2S_REG_BASE+0x014)
/******************************************************************************/
/* */
/* PWM */
/* */
/******************************************************************************/
#define HR_PWM_REG_BASE (HR_APB_BASE_ADDR+0x1800)
#define HR_PWM_CLKDIV01 (HR_PWM_REG_BASE+0x0000)
#define HR_PWM_CLKDIV23 (HR_PWM_REG_BASE+0x0004)
#define HR_PWM_CTL (HR_PWM_REG_BASE+0x0008)
#define HR_PWM_PERIOD (HR_PWM_REG_BASE+0x000C)
#define HR_PWM_PNUM (HR_PWM_REG_BASE+0x0010)
#define HR_PWM_CMPDAT (HR_PWM_REG_BASE+0x0014)
#define HR_PWM_DTCTL (HR_PWM_REG_BASE+0x0018)
#define HR_PWM_INTEN (HR_PWM_REG_BASE+0x001C)
#define HR_PWM_INTSTS (HR_PWM_REG_BASE+0x0020)
#define HR_PWM_CAPDAT (HR_PWM_REG_BASE+0x0024)
#define HR_PWM_BRKCTL (HR_PWM_REG_BASE+0x0028)
#define HR_PWM_CH4_REG1 (HR_PWM_REG_BASE+0x002C)
#define HR_PWM_CH4_REG2 (HR_PWM_REG_BASE+0x0030)
#define HR_PWM_CAP2DAT (HR_PWM_REG_BASE+0x0034)
#define HR_PWM_CAP2CTL (HR_PWM_REG_BASE+0x0038)
/* EFUSE Register */
#define HR_EFUSE_REG_BASE (0x0f001600)
#define HR_EFUSE_WDATA_PORT (HR_EFUSE_REG_BASE+0x000)
#define HR_EFUSE_PGM_CMD (HR_EFUSE_REG_BASE+0x004)
#define HR_EFUSE_PGM_STTS (HR_EFUSE_REG_BASE+0x008)
#define HR_EFUSE_CLEAR (HR_EFUSE_REG_BASE+0x00C)
#define HR_EFUSE_VDDQ_SETUP (HR_EFUSE_REG_BASE+0x010)
/* PGM_CMD define */
#define EFUSE_PGM_START (1UL)
#define EFUSE1_SELECT (1UL << 1)
#define EFUSE2_SELECT (1UL << 2)
/* PGM STTS define */
#define EFUSE_PGM_DONE (1UL)
#define EFUSE_FIFO_FREE (1UL << 1)
/* CLEAR_EFUSE */
#define EFUSE_RESET (1UL)
/**
* @defgroup System_APIs System APIs
* @brief System APIs
*/
/**
* @addtogroup System_APIs
* @{
*/
/**
* @defgroup REG_APIs REG APIs
* @brief Register operate APIs
*/
/**
* @addtogroup REG_APIs
* @{
*/
/**
* @brief This function is used to write value to register or memory
*
* @param[in] reg address to be written
* @param[in] val value to write
*
* @return None
*
* @note None
*/
static __inline void tls_reg_write32(unsigned int reg, unsigned int val)
{
*(TLS_REG *)reg = val;
}
/**
* @brief This function is used to read value from register or memory
*
* @param[in] reg address to read
*
* @retval val read from register or memory
*
* @note None
*/
static __inline unsigned int tls_reg_read32(unsigned int reg)
{
unsigned int val = *(TLS_REG *)reg;
return val;
}
/**
* @brief This function is used to write specified bit through
bit-band alias region
*
* @param[in] addr 32-bit aligned byte address where the bit exists.
* @param[in] bit Bit position.
* @param[in] val The value that the bit is set to, 0 or 1.
*
* @return None
*
* @note Only when bit-band mechnism is supported, you can use it
*/
static __inline void tls_bitband_write(volatile unsigned int addr, unsigned int bit, unsigned int val)
{
unsigned int temp;
temp = (((unsigned int)(addr) & 0xF0000000) + 0x02000000) \
+((((unsigned int)(addr)&0xFFFFF)<<5)\
+( (unsigned int)(bit)<<2));
*((volatile unsigned int * )temp) = val;
}
/**
* @brief This function is used to read a single bit from address
by bit-band alias region
*
* @param[in] addr 32-bit aligned byte address where the bit exists
* @param[in] bit Bit position
*
* @retval The value of the requested bit
*
* @note Only when bit-band mechnism is supported, you can use it
*/
static __inline unsigned int tls_bitband_read(volatile unsigned int addr, unsigned int bit)
{
unsigned int temp;
temp = (((unsigned int)(addr) & 0xF0000000) + 0x02000000) \
+((((unsigned int)(addr)&0xFFFFF)<<5)\
+( (unsigned int)(bit)<<2));
return *((volatile unsigned int *)temp);
}
/**
* @}
*/
/**
* @}
*/
#endif /* WM_REGS_H */
sdk/Include/wm_type_def.h
+155
View File
@@ -0,0 +1,155 @@
/**
* @file wm_type_def.h
*
* @brief WM type redefine
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_TYPE_DEF_H__
#define __WM_TYPE_DEF_H__
#ifdef bool
#undef bool
#endif
#ifdef u8
#undef u8
#endif
#ifdef s8
#undef s8
#endif
#ifdef u16
#undef u16
#endif
#ifdef s16
#undef s16
#endif
#ifdef u32
#undef u32
#endif
#ifdef s32
#undef s32
#endif
#ifdef u64
#undef u64
#endif
#ifdef s64
#undef s64
#endif
#ifdef u_char
#undef u_char
#endif
typedef unsigned char u_char;
#ifdef INT8U
#undef INT8U
#endif
typedef unsigned char INT8U;
#ifdef INT8S
#undef INT8S
#endif
typedef signed char INT8S;
#ifndef __cplusplus
typedef unsigned char bool;
#endif
typedef unsigned char u8;
typedef signed char s8;
typedef unsigned short u16;
typedef signed short s16;
typedef unsigned int u32;
typedef signed int s32;
typedef unsigned long long u64;
typedef long long s64;
#ifdef ULONG
#undef ULONG
#endif
typedef unsigned long ULONG;
#ifdef u8_t
#undef u8_t
#endif
typedef unsigned char u8_t;
#ifdef u16_t
#undef u16_t
#endif
typedef unsigned short u16_t;
#ifdef u32_t
#undef u32_t
#endif
typedef unsigned int u32_t;
#ifdef s8_t
#undef s8_t
#endif
typedef signed char s8_t;
#ifdef s16_t
#undef s16_t
#endif
typedef signed short s16_t;
#ifdef s32_t
#undef s32_t
#endif
typedef signed int s32_t;
typedef long long int64;
typedef int int32;
typedef short int16;
typedef char int8;
typedef unsigned long long uint64;
typedef unsigned int uint32;
typedef unsigned short uint16;
typedef unsigned char uint8;
#if (GCC_COMPILE==0)
#ifdef size_t
#undef size_t
#endif
typedef unsigned int size_t;
#endif
#ifdef err_t
#undef err_t
#endif
typedef signed char err_t;
#ifdef mem_ptr_t
#undef mem_ptr_t
#endif
typedef unsigned int mem_ptr_t;
#ifdef TRUE
#undef TRUE
#endif
#define TRUE 1
#ifdef FALSE
#undef FALSE
#endif
#define FALSE 0
#ifndef __cplusplus
#define true 1
#define false 0
#endif
#define WM_SUCCESS 0
#define WM_FAILED -1
#ifndef IGNORE_PARAMETER
#define IGNORE_PARAMETER(x) ((x) = (x))
#endif
int wm_printf(const char *fmt,...);
#endif
sdk/Include/wm_wifi_config.h
+36
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@@ -0,0 +1,36 @@
/**
* @file wm_wifi_config.h
*
* @brief WM wifi model configure
*
* @author winnermicro
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_WIFI_CONFIG_H__
#define __WM_WIFI_CONFIG_H__
#define CFG_WIFI_ON 1
#define CFG_WIFI_OFF 0
/*******************WIFI INFO**************************
Below Switch Only for Reference!!!
********************************************************/
#define TLS_CONFIG_AP CFG_WIFI_ON
#define TLS_CONFIG_11N CFG_WIFI_ON
#define TLS_CONFIG_SOFTAP_11N CFG_WIFI_ON
#define TLS_CONFIG_AP_BEACON_SOFT (CFG_ON && TLS_CONFIG_AP)
#define TLS_CONFIG_AP_OPT_PS (CFG_OFF && TLS_CONFIG_AP)/* SOFTAP POWER SAVE */
#define TLS_CONFIG_AP_OPT_FWD (CFG_ON && TLS_CONFIG_AP)/* IP PACKET FORWARD */
#define TLS_CONFIG_WPS CFG_WIFI_OFF /* WPS&EAPOL should be enabled together */
#define TLS_IEEE8021X_EAPOL CFG_WIFI_OFF
#define TLS_CONFIG_1SSID_MULTI_PWD CFG_WIFI_ON
#define TLS_CONFIG_FAST_JOIN_NET CFG_WIFI_ON
#endif /*__WM_WIFI_CONFIG_H__*/
sdk/Lib/GNU/libwlan.a
BIN
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sdk/PATCHES.md
+16
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@@ -0,0 +1,16 @@
# Änderungen am WinnerMicro W600 SDK
Quelle: `qcx-w600-firmware/qconnex_sdk/ext/WM_SDK_WM600` (QConnex-Stand 2025). Kopiert wurden nur
Include, Platform (ohne Boot/armcc), Src/OS, Src/Network, Src/App/{OTA,httpclient,dhcpserver,dnsserver},
Lib/GNU, Bin/secboot.img, Tools/GNU/link_w600_2m.ld (→ ld/) und wm_tool.c (→ tools/).
1. `Platform/Common/fwup/wm_fwup.c`: wolfSSL-SHA256 durch `nl_sha256_*` ersetzt, die QConnex-RSA-Prüfung
`Check_OTA_Image()` durch den Hook `nl_fwup_verify_tail()` (src/sys/nl_fwup_hook.h). Das Image-Format
(Header + Payload + 512-Byte-Endblock) bleibt unverändert.
2. `Src/OS/RTOS/include/FreeRTOSConfig.h`: `configGENERATE_RUN_TIME_STATS 0`, QConnex-Debug-Hooks entfernt.
3. `undefined reference` beim Linken auf `EarlyInit` und `pre_gpio_config` (von
`sdk/Platform/Sys/wm_main.c` als `extern`-Hooks erwartet, aber nur von der App bereitgestellt):
minimale Stubs in `src/sys/sdk_stubs.c` angelegt (leere Funktionskörper). In der alten Firmware
(`qconnex_sdk/src/qc_main.c`) war `pre_gpio_config()` bereits ein No-Op; `EarlyInit()` rief dort nur
in die QConnex-Hardwareschicht (`QCXH_EarlyInit()`), die ninlight nicht verwendet. Board-spezifische
Frühinitialisierung (falls nötig) folgt in einem späteren Plan.
sdk/Platform/Boot/gcc/core_cm3.h
+1627
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sdk/Platform/Boot/gcc/misc.c
+225
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/**
******************************************************************************
* @file misc.c
* @author MCD Application Team
* @version V3.6.1
* @date 05-March-2012
* @brief This file provides all the miscellaneous firmware functions (add-on
* to CMSIS functions).
*/
/* Includes ------------------------------------------------------------------*/
#include "misc.h"
/** @addtogroup W600_Driver
* @{
*/
/** @defgroup MISC
* @brief MISC driver modules
* @{
*/
/** @defgroup MISC_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup MISC_Private_Defines
* @{
*/
#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
/**
* @}
*/
/** @defgroup MISC_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup MISC_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup MISC_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @defgroup MISC_Private_Functions
* @{
*/
/**
* @brief Configures the priority grouping: pre-emption priority and subpriority.
* @param NVIC_PriorityGroup: specifies the priority grouping bits length.
* This parameter can be one of the following values:
* @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
* 4 bits for subpriority
* @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
* 3 bits for subpriority
* @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
* 2 bits for subpriority
* @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
* 1 bits for subpriority
* @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
* 0 bits for subpriority
* @retval None
*/
void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
{
/* Check the parameters */
// assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
}
/**
* @brief Initializes the NVIC peripheral according to the specified
* parameters in the NVIC_InitStruct.
* @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
* the configuration information for the specified NVIC peripheral.
* @retval None
*/
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
{
uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
/* Check the parameters */
// assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
// assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
// assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
{
/* Compute the Corresponding IRQ Priority --------------------------------*/
tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
tmppre = (0x4 - tmppriority);
tmpsub = tmpsub >> tmppriority;
tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
tmppriority = tmppriority << 0x04;
NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
/* Enable the Selected IRQ Channels --------------------------------------*/
NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
}
else
{
/* Disable the Selected IRQ Channels -------------------------------------*/
NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
}
}
void NVIC_Configration(int irqno, FunctionalState irqstatus)
{
NVIC_InitTypeDef NVIC_InitStruct;
NVIC_InitStruct.NVIC_IRQChannel = irqno;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelCmd = irqstatus;
NVIC_Init(&NVIC_InitStruct);
}
/**
* @brief Sets the vector table location and Offset.
* @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
* This parameter can be one of the following values:
* @arg NVIC_VectTab_RAM
* @arg NVIC_VectTab_FLASH
* @param Offset: Vector Table base offset field. This value must be a multiple
* of 0x200.
* @retval None
*/
void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
{
/* Check the parameters */
// assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
// assert_param(IS_NVIC_OFFSET(Offset));
SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
}
/**
* @brief Selects the condition for the system to enter low power mode.
* @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
* This parameter can be one of the following values:
* @arg NVIC_LP_SEVONPEND
* @arg NVIC_LP_SLEEPDEEP
* @arg NVIC_LP_SLEEPONEXIT
* @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
{
/* Check the parameters */
// assert_param(IS_NVIC_LP(LowPowerMode));
// assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
SCB->SCR |= LowPowerMode;
}
else
{
SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
}
}
/**
* @brief Configures the SysTick clock source.
* @param SysTick_CLKSource: specifies the SysTick clock source.
* This parameter can be one of the following values:
* @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
* @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
* @retval None
*/
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
{
/* Check the parameters */
// assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
{
SysTick->CTRL |= SysTick_CLKSource_HCLK;
}
else
{
SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
}
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. *****END OF FILE****/
sdk/Platform/Boot/gcc/retarget.c
+93
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#if GCC_COMPILE
#include <reent.h>
extern int sendchar(int ch);
_ssize_t _write_r (struct _reent *r, int file, const void *ptr, size_t len)
{
size_t i;
char *p;
p = (char*) ptr;
for (i = 0; i < len; i++)
{
sendchar(*p++);
}
return len;
}
_ssize_t _read_r(struct _reent *r, int file, void *ptr, size_t len)
{
return 0;
}
int _close_r(struct _reent *r, int file)
{
return 0;
}
_off_t _lseek_r(struct _reent *r, int file, _off_t ptr, int dir)
{
return (_off_t)0; /* Always indicate we are at file beginning. */
}
int _fstat_r(struct _reent *r, int file, struct stat *st)
{
return 0;
}
int _isatty(int file)
{
return 1;
}
void abort(void)
{
while(1);
}
extern char end[];
extern char __HeapLimit[];
static char *heap_ptr = end;
static char *heap_end = __HeapLimit;
/**
* @brief This function is used to extend current heap size, Limit is __HeapLimit
*
* @param[in] None
*
* @return None
*
* @note Normally, it is just used in gcc mode.
*/
void * _sbrk_r(struct _reent *_s_r, ptrdiff_t nbytes)
{
char *base;
base = heap_ptr;
if(base + nbytes > heap_end)
{
return (void *)-1;
}
heap_ptr += nbytes;
return base;
}
void * tls_reserve_mem_lock(int nbytes)
{
if(heap_end - (nbytes + 4) <= heap_ptr)
{
return NULL;
}
heap_end -= (nbytes + 4);
return (void *)((((int)heap_end + 3) >> 2) << 2);
}
void tls_reserve_mem_unlock(void)
{
heap_end = __HeapLimit;
}
#endif
sdk/Platform/Boot/gcc/startup.S
+256
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/* File: startup_ARMCM3.S
* Purpose: startup file for Cortex-M3 devices. Should use with
* GCC for ARM Embedded Processors
* Version: V2.0
* Date: 16 August 2013
*
* Copyright (c) 2011 - 2013 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
.syntax unified
.arch armv7-m
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0xc00
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
//.equ Heap_Size, 0x1A000
.equ Heap_Size, 0x21000
#endif
.globl __heap_base
.globl __HeapLimit
__heap_base:
.if Heap_Size
.space Heap_Size
.endif
.size __heap_base, . - __heap_base
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long MemManage_Handler /* MPU Fault Handler */
.long BusFault_Handler /* Bus Fault Handler */
.long UsageFault_Handler /* Usage Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long DebugMon_Handler /* Debug Monitor Handler */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long OS_CPU_SysTickHandler /* SysTick Handler */
/* External interrupts */
.long SDIO_RX_IRQHandler /*HSPI&SDIO SLAVE Trasmit*/
.long SDIO_TX_IRQHandler /*HSPI & SDIO SLAVE Receive Data*/
.long 0 /*Not Used*/
.long SDIO_TX_CMD_IRQHandler /*HSPI & SDIO SLAVE Receive Command*/
.long tls_wl_mac_isr /*MAC isr*/
.long 0 /*Not Used*/
.long tls_wl_rx_isr /*Wi-Fi Rx isr*/
.long tls_wl_mgmt_tx_isr /*Wi-Fi Managment tx isr*/
.long tls_wl_data_tx_isr /*Wi-Fi Data Tx isr*/
.long PMU_TIMER1_IRQHandler /*PMU Timer1*/
.long PMU_TIMER0_IRQHandler /*PMU Timer0*/
.long PMU_GPIO_WAKE_IRQHandler /*PMU Wakeup pin isr*/
.long PMU_SDIO_WAKE_IRQHandler /*SDIO Wakeup isr*/
.long DMA_Channel0_IRQHandler /*DMA Channel 0*/
.long DMA_Channel1_IRQHandler /*DMA Channel 1*/
.long DMA_Channel2_IRQHandler /*DMA Channel 2*/
.long DMA_Channel3_IRQHandler /*DMA Channel 3*/
.long DMA_Channel4_7_IRQHandler /*DMA Channel 4-7*/
.long DMA_BURST_IRQHandler /*DMA Burst isr*/
.long I2C_IRQHandler /*I2C isr*/
.long ADC_IRQHandler /*ADC isr*/
.long SPI_LS_IRQHandler /*Master SPI isr*/
.long SPI_HS_IRQHandler /*HSPI isr, not used*/
.long UART0_IRQHandler /*UART0 isr*/
.long UART1_IRQHandler /*UART1 isr*/
.long GPIOA_IRQHandler /*GPIOA isr*/
.long TIM0_IRQHandler /*TIM0 isr*/
.long TIM1_IRQHandler /*TIM1 isr*/
.long TIM2_IRQHandler /*TIM2 isr*/
.long TIM3_IRQHandler /*TIM3 isr*/
.long TIM4_IRQHandler /*TIM4 isr*/
.long TIM5_IRQHandler /*TIM5 isr*/
.long WDG_IRQHandler /*Watchdog isr*/
.long 0 /*Not Used*/
.long 0 /*Not Used*/
.long PWM_IRQHandler /*PWM isr*/
.long I2S_IRQHandler /*I2S isr*/
.long PMU_RTC_IRQHandler /*PMU RTC isr*/
.long RSA_IRQHandler /*RSA isr*/
.long CRYPTION_IRQHandler /*CRYPTION isr*/
.long GPIOB_IRQHandler /*GPIOB isr*/
.long UART2_IRQHandler /*UART2&7816 isr*/
.size __isr_vector, . - __isr_vector
.text
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Firstly it copies data from read only memory to RAM.
*
* The ranges of copy from/to are specified by following symbols
* __etext: LMA of start of the section to copy from. Usually end of text
* __data_start__: VMA of start of the section to copy to
* __data_end__: VMA of end of the section to copy to
*
* All addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
.L_loop1:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .L_loop1
/* Single BSS section scheme.
*
* The BSS section is specified by following symbols
* __bss_start__: start of the BSS section.
* __bss_end__: end of the BSS section.
*
* Both addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__bss_start__
ldr r2, =__bss_end__
movs r0, 0
.L_loop3:
cmp r1, r2
itt lt
strlt r0, [r1], #4
blt .L_loop3
/*
#ifndef __NO_SYSTEM_INIT
bl SystemInit
#endif
*/
bl main
.pool
.size Reset_Handler, . - Reset_Handler
.align 1
.thumb_func
.weak Default_Handler
.type Default_Handler, %function
Default_Handler:
b .
.size Default_Handler, . - Default_Handler
/* Macro to define default handlers. Default handler
* will be weak symbol and just dead loops. They can be
* overwritten by other handlers */
.macro def_irq_handler handler_name
.weak \handler_name
.set \handler_name, Default_Handler
.endm
def_irq_handler NMI_Handler
def_irq_handler HardFault_Handler
def_irq_handler MemManage_Handler
def_irq_handler BusFault_Handler
def_irq_handler UsageFault_Handler
def_irq_handler SVC_Handler
def_irq_handler DebugMon_Handler
def_irq_handler PendSV_Handler
def_irq_handler OS_CPU_SysTickHandler
def_irq_handler SDIO_RX_IRQHandler
def_irq_handler SDIO_TX_IRQHandler
def_irq_handler SDIO_TX_CMD_IRQHandler
def_irq_handler tls_wl_mac_isr
def_irq_handler tls_wl_rx_isr
def_irq_handler tls_wl_mgmt_tx_isr
def_irq_handler tls_wl_data_tx_isr
/*def_irq_handler PMU_TIMER1_IRQHandler*/
/*def_irq_handler PMU_TIMER0_IRQHandler*/
/*def_irq_handler PMU_GPIO_WAKE_IRQHandler*/
def_irq_handler PMU_SDIO_WAKE_IRQHandler
def_irq_handler DMA_Channel0_IRQHandler
def_irq_handler DMA_Channel1_IRQHandler
def_irq_handler DMA_Channel2_IRQHandler
def_irq_handler DMA_Channel3_IRQHandler
def_irq_handler DMA_Channel4_7_IRQHandler
def_irq_handler DMA_BURST_IRQHandler
/*def_irq_handler I2C_IRQHandler*/
def_irq_handler ADC_IRQHandler
def_irq_handler SPI_LS_IRQHandler
def_irq_handler SPI_HS_IRQHandler
def_irq_handler UART0_IRQHandler
def_irq_handler UART1_IRQHandler
def_irq_handler GPIOA_IRQHandler
def_irq_handler TIM0_IRQHandler
def_irq_handler TIM1_IRQHandler
def_irq_handler TIM2_IRQHandler
def_irq_handler TIM3_IRQHandler
def_irq_handler TIM4_IRQHandler
def_irq_handler TIM5_IRQHandler
def_irq_handler WDG_IRQHandler
/*def_irq_handler PWM_IRQHandler*/
/*def_irq_handler I2S_IRQHandler*/
/*def_irq_handler PMU_RTC_IRQHandler*/
def_irq_handler RSA_IRQHandler
def_irq_handler CRYPTION_IRQHandler
def_irq_handler GPIOB_IRQHandler
def_irq_handler UART2_IRQHandler
.end
sdk/Platform/Common/CMakeLists.txt
+72
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@@ -0,0 +1,72 @@
# THE VERSION NUMBER
SET(CMAKE_SYSTEM_NAME Generic)
CMAKE_MINIMUM_REQUIRED (VERSION 3.10)
PROJECT(WCOMMON)
SET(CMAKE_C_USE_RESPONSE_FILE_FOR_OBJECTS 1)
SET(CMAKE_NINJA_FORCE_RESPONSE_FILE 1 CACHE INTERNAL "")
set(CMAKE_VERBOSE_MAKEFILE OFF)
# ENABLE ASM
ENABLE_LANGUAGE(ASM)
SET(CMAKE_STATIC_LIBRARY_PREFIX)
SET(CMAKE_STATIC_LIBRARY_SUFFIX)
SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
# C FLAGS
SET(CMAKE_C_FLAGS " -mthumb --function-sections --data-sections -mcpu=cortex-m3 -std=gnu99 -mabi=aapcs -march=armv7-m -fno-builtin -Wall")
STRING(APPEND CMAKE_C_FLAGS " -DGCC_COMPILE=1 -DWOLFSSL_USER_SETTINGS -D_IN_ADDR_T_DECLARED -D__MACHINE_ENDIAN_H__ -D_TIMEVAL_DEFINED -D__INSIDE_CYGWIN_NET__ ")
SET(CMAKE_C_FLAGS_DEBUG "-O0 -g3 -gdwarf-2 -Wall -DDEBUG ")
SET(CMAKE_C_FLAGS_RELEASE "-Os -Wall")
# DEBUG ASM FLAGS
SET(CMAKE_ASM_FLAGS_DEBUG "${CMAKE_ASM_FLAGS_DEBUG} -O0 -g3 -gdwarf-2 -Wall -mthumb-interwork -mthumb -std=gnu99 -mcpu=cortex-m3 -march=armv7-m -mabi=aapcs -fno-builtin -DDEBUG ")
SET(CMAKE_ASM_FLAGS_RELEASE "${CMAKE_ASM_FLAGS_RELEASE} -Os -Wall -mthumb-interwork -mthumb -std=gnu99 -mcpu=cortex-m3 -march=armv7-m -mabi=aapcs -fno-builtin ")
# Library sources
SET(LIBRARY_SOURCES
"${CMAKE_CURRENT_SOURCE_DIR}/fwup/wm_fwup.c"
"${CMAKE_CURRENT_SOURCE_DIR}/mem/wm_mem.c"
"${CMAKE_CURRENT_SOURCE_DIR}/Params/wm_param.c"
"${CMAKE_CURRENT_SOURCE_DIR}/task/wm_wl_mbox.c"
"${CMAKE_CURRENT_SOURCE_DIR}/task/wm_wl_task.c"
"${CMAKE_CURRENT_SOURCE_DIR}/task/wm_wl_timers.c"
"${CMAKE_CURRENT_SOURCE_DIR}/utils/utils.c"
"${CMAKE_CURRENT_SOURCE_DIR}/crypto/wm_crypto_hard.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/digest/hmac.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/digest/md2.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/digest/md4.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/digest/sha224.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/digest/sha384.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/digest/sha512.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/keyformat/asn1.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/keyformat/base64.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/keyformat/x509.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/math/pstm_mul_comba.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/prng/prng.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/prng/yarrow.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/pubkey/dh.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/pubkey/ecc.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/pubkey/pkcs.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/pubkey/pubkey.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/pubkey/rsa.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/symmetric/aesGCM.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/symmetric/des3.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/symmetric/idea.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/symmetric/rc2.c"
# "${CMAKE_CURRENT_SOURCE_DIR}/crypto/symmetric/seed.c"
)
function(ADD_LIB_TARGET LIBTARGET)
add_library(${LIBTARGET} OBJECT ${LIBRARY_SOURCES})
# ADD_CUSTOM_COMMAND(TARGET ${LIBTARGET} POST_BUILD COMMAND ${CMAKE_COMMAND} -E copy_if_different ${EXECUTABLE_OUTPUT_PATH}/${LIBTARGET} ${CMAKE_CURRENT_SOURCE_DIR}/../../Lib/GNU/${LIBTARGET})
endfunction()
ADD_LIB_TARGET(wmcommon.a)
sdk/Platform/Common/Params/wm_param.c
+1351
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sdk/Platform/Common/Params/wm_param.h
+124
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@@ -0,0 +1,124 @@
/*****************************************************************************
*
* File Name : tls_param.h
*
* Description: param manager Module
*
* Copyright (c) 2014 Winner Micro Electronic Design Co., Ltd.
* All rights reserved.
*
* Author : dave
*
* Date : 2014-6-12
*****************************************************************************/
#ifndef TLS_PARAM_H
#define TLS_PARAM_H
#include "wm_type_def.h"
struct tls_param_quick_connect{
bool quick_connect_en;
u8 chanId;
};
struct tls_sys_param {
struct tls_param_hardware_version hardware_version;
struct tls_param_bssid bssid;
struct tls_param_ssid ssid;
u8 channel_enable;
u8 channel;
u8 wireless_region;
u8 encry;
u8 wireless_protocol;
u8 auto_create_adhoc;
u8 auto_retrycnt;
u8 auto_roam;
u8 auto_powersave;
u8 ssid_broadcast_enable;
u16 channellist;
struct tls_param_key key;
struct tls_param_bgr wbgr;
struct tls_param_wps wps;
struct tls_param_ip ipcfg;
u8 local_dnsname[32];
u8 local_device_name[32];
struct tls_param_oray_client oray_client_setting;
u8 upnp_enable;
u8 always_online;
u8 user_port_mode;
u8 res_2;
struct tls_param_uart uart_cfg;
u8 auto_mode;
u8 res_3;
u16 transparent_trigger_length;
u16 transparent_trigger_period;
struct tls_param_socket remote_socket_cfg;
u32 debug_mode;
u32 res_4[2]; /* reserv and mark the end */
/*escape char*/
u8 EscapeChar;
u8 EscReserved;
u16 EscapePeriod; /* unit: ms */
u8 IoMode;
u8 CmdMode;
u8 PassWord[6];
struct tls_webs_cfg WebsCfg;
u8 oneshotflag;
u8 oneshotres[2];
struct tls_param_sha1 psk;
struct tls_param_original_key original_key;
struct tls_param_ssid original_ssid;
u8 auto_reconnect;
u8 res_5[3];
struct tls_param_quick_connect quick_connect;
u8 key_changed;
u8 ssid_changed;
struct tls_param_ssid apsta_ssid;
struct tls_param_sha1 apsta_psk;
u8 res_6[1];
u8 channel4softap;
u8 encry4softap;
struct tls_param_key key4softap;
struct tls_param_ip ipcfg4softap;
struct tls_param_bgr wbgr4softap;
char sntp_service1[32];
char sntp_service2[32];
char sntp_service3[32];
struct tls_param_tem_offset params_tem;
};
struct tls_param_flash {
u32 magic;
u16 partition_num;
u16 modify_count;
u32 resv_1;
u16 resv_2;
u16 length;
struct tls_sys_param parameters;
u32 crc32;
};
#endif /* WM_PARAM_H */
sdk/Platform/Common/crypto/wm_crypto_hard.c
+2696
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sdk/Platform/Common/fwup/wm_fwup.c
+1005
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sdk/Platform/Common/mem/wm_mem.c
+765
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@@ -0,0 +1,765 @@
/*****************************************************************************
*
* File Name : wm_mem.c
*
* Description: memory manager Module
*
* Copyright (c) 2014 Winner Micro Electronic Design Co., Ltd.
* All rights reserved.
*
* Author : dave
*
* Date : 2014-6-12
*****************************************************************************/
#include "wm_osal.h"
#include "wm_mem.h"
#include "list.h"
#include <string.h>
extern u8 tls_get_isr_count(void);
/**
* This variable is set if the memory mananger has been initialized.
* This is available only for debug version of the driver
*/
bool memory_manager_initialized = false;
/**
* This mutex is used to synchronize the list of allocated
* memory blocks. This is a debug version only feature
*/
tls_os_sem_t *mem_sem;
#if WM_MEM_DEBUG
struct dl_list memory_used_list;
struct dl_list memory_free_list;
#define MEM_BLOCK_SIZE 600
MEMORY_BLOCK mem_blocks[MEM_BLOCK_SIZE];
u32 alloc_heap_mem_bytes = 0;
u32 alloc_heap_mem_blk_cnt = 0;
u32 alloc_heap_mem_max_size = 0;
#define PRE_OVERSIZE 0
#define OVERSIZE 0
/**
* This is a debug only function that performs memory management operations for us.
* Memory allocated using this function is tracked, flagged when leaked, and caught for
* overflows and underflows.
*
* \param size The size in bytes of memory to
* allocate
*
* \param file The full path of file where this
* function is invoked from
* \param line The line number in the file where this
* method was called from
* \return Pointer to the allocated memory or NULL in case of a failure
*/
void * mem_alloc_debug(u32 size, char* file, int line)
{
void *buf = NULL;
u32 pad_len;
int i = 0;
u32 cpu_sr;
//
// If the memory manager has not been initialized, do so now
//
cpu_sr = tls_os_set_critical();
if (!memory_manager_initialized) {
tls_os_status_t os_status;
memory_manager_initialized = true;
//
// NOTE: If two thread allocate the very first allocation simultaneously
// it could cause double initialization of the memory manager. This is a
// highly unlikely scenario and will occur in debug versions only.
//
os_status = tls_os_sem_create(&mem_sem, 1);
if(os_status != TLS_OS_SUCCESS)
printf("mem_alloc_debug: tls_os_sem_create mem_sem error\n");
dl_list_init(&memory_used_list);
dl_list_init(&memory_free_list);
for(i = 0; i < MEM_BLOCK_SIZE; i++)
{
dl_list_add_tail(&memory_free_list, &mem_blocks[i].list);
}
}
tls_os_release_critical(cpu_sr);
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
//
// Allocate the required memory chunk plus header and trailer bytes
//
pad_len = sizeof(u32) - (size & 0x3);
buf = malloc(sizeof(MEMORY_PATTERN) + PRE_OVERSIZE + size + pad_len + OVERSIZE + sizeof(MEMORY_PATTERN));
if (buf) {
//
// Memory allocation succeeded. Add information about the allocated
// block in the list that tracks all allocations.
//
PMEMORY_PATTERN mem_ptn_hd;
PMEMORY_PATTERN mem_ptn_tl;
PMEMORY_BLOCK mem_blk_hd1;
if(dl_list_empty(&memory_free_list))
{
printf("Memory blocks empty!\n");
free(buf);
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
tls_mem_alloc_info();
return NULL;
}
mem_blk_hd1 = dl_list_first(&memory_free_list, MEMORY_BLOCK, list);
dl_list_del(&mem_blk_hd1->list);
dl_list_add_tail(&memory_used_list, &mem_blk_hd1->list);
alloc_heap_mem_bytes += size+sizeof(MEMORY_PATTERN)+sizeof(MEMORY_PATTERN)+pad_len + PRE_OVERSIZE + OVERSIZE;
alloc_heap_mem_blk_cnt++;
if (alloc_heap_mem_bytes > alloc_heap_mem_max_size)
{
alloc_heap_mem_max_size = alloc_heap_mem_bytes;
//printf("alloc_heap_mem_max_size=%d\n", alloc_heap_mem_max_size);
}
mem_blk_hd1->pad = pad_len;
mem_blk_hd1->file = file;
mem_blk_hd1->line = line;
mem_blk_hd1->length = size;
mem_blk_hd1->header_pattern = (u32)buf;
// Fill in the memory header and trailer
mem_ptn_hd = (PMEMORY_PATTERN)buf;
mem_ptn_hd->pattern0= MEM_HEADER_PATTERN;
/*mem_ptn_hd->pattern1= MEM_HEADER_PATTERN;
mem_ptn_hd->pattern2= MEM_HEADER_PATTERN;
mem_ptn_hd->pattern3= MEM_HEADER_PATTERN;*/
mem_ptn_tl = (PMEMORY_PATTERN)(((u8 *)(buf))+size + sizeof(MEMORY_PATTERN)+pad_len + PRE_OVERSIZE + OVERSIZE);
mem_ptn_tl->pattern0= MEM_TAILER_PATTERN;
/*mem_ptn_tl->pattern1= MEM_TAILER_PATTERN;
mem_ptn_tl->pattern2= MEM_TAILER_PATTERN;
mem_ptn_tl->pattern3= MEM_TAILER_PATTERN;*/
// Jump ahead by memory header so pointer returned to caller points at the right place
buf = ((u8 *)buf) + sizeof (MEMORY_PATTERN) + PRE_OVERSIZE;
#if 0
printf("==>Memory was allocated from %s at line %d with length %d\n",
mem_blk_hd->file,
mem_blk_hd->line,
mem_blk_hd->length);
printf("==>mem alloc ptr = 0x%x\n", buf);
#endif
}
else
{
printf("==>Memory was allocated from %s at line %d with length %d, allocated size %d, count %d\n",
file,
line,
size, alloc_heap_mem_bytes, alloc_heap_mem_blk_cnt);
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
tls_mem_alloc_info();
return buf;
}
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
return buf;
}
void * mem_calloc_debug(u32 n, u32 size, char* file, int line)
{
void *buf = NULL;
u32 pad_len;
int i = 0;
u32 cpu_sr;
//
// If the memory manager has not been initialized, do so now
//
cpu_sr = tls_os_set_critical();
if (!memory_manager_initialized) {
tls_os_status_t os_status;
memory_manager_initialized = true;
//
// NOTE: If two thread allocate the very first allocation simultaneously
// it could cause double initialization of the memory manager. This is a
// highly unlikely scenario and will occur in debug versions only.
//
os_status = tls_os_sem_create(&mem_sem, 1);
if(os_status != TLS_OS_SUCCESS)
printf("mem_alloc_debug: tls_os_sem_create mem_sem error\n");
dl_list_init(&memory_used_list);
dl_list_init(&memory_free_list);
for(i = 0; i < MEM_BLOCK_SIZE; i++)
{
dl_list_add_tail(&memory_free_list, &mem_blocks[i].list);
}
}
tls_os_release_critical(cpu_sr);
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
//
// Allocate the required memory chunk plus header and trailer bytes
//
pad_len = sizeof(u32) - ((n*size) & 0x3);
buf = malloc(sizeof(MEMORY_PATTERN) + PRE_OVERSIZE + n*size + pad_len + OVERSIZE + sizeof(MEMORY_PATTERN));
if (buf) {
//
// Memory allocation succeeded. Add information about the allocated
// block in the list that tracks all allocations.
//
PMEMORY_PATTERN mem_ptn_hd;
PMEMORY_PATTERN mem_ptn_tl;
PMEMORY_BLOCK mem_blk_hd1;
if(dl_list_empty(&memory_free_list))
{
printf("Memory blocks empty!\n");
free(buf);
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
tls_mem_alloc_info();
return NULL;
}
mem_blk_hd1 = dl_list_first(&memory_free_list, MEMORY_BLOCK, list);
dl_list_del(&mem_blk_hd1->list);
dl_list_add_tail(&memory_used_list, &mem_blk_hd1->list);
alloc_heap_mem_bytes += n*size+sizeof(MEMORY_PATTERN)+sizeof(MEMORY_PATTERN)+pad_len + PRE_OVERSIZE + OVERSIZE;
alloc_heap_mem_blk_cnt++;
if (alloc_heap_mem_bytes > alloc_heap_mem_max_size)
{
alloc_heap_mem_max_size = alloc_heap_mem_bytes;
//printf("alloc_heap_mem_max_size=%d\n", alloc_heap_mem_max_size);
}
mem_blk_hd1->pad = pad_len;
mem_blk_hd1->file = file;
mem_blk_hd1->line = line;
mem_blk_hd1->length = n*size;
mem_blk_hd1->header_pattern = (u32)buf;
// Fill in the memory header and trailer
mem_ptn_hd = (PMEMORY_PATTERN)buf;
mem_ptn_hd->pattern0= MEM_HEADER_PATTERN;
/*mem_ptn_hd->pattern1= MEM_HEADER_PATTERN;
mem_ptn_hd->pattern2= MEM_HEADER_PATTERN;
mem_ptn_hd->pattern3= MEM_HEADER_PATTERN;*/
mem_ptn_tl = (PMEMORY_PATTERN)(((u8 *)(buf))+n*size + sizeof(MEMORY_PATTERN)+pad_len + PRE_OVERSIZE + OVERSIZE);
mem_ptn_tl->pattern0= MEM_TAILER_PATTERN;
/*mem_ptn_tl->pattern1= MEM_TAILER_PATTERN;
mem_ptn_tl->pattern2= MEM_TAILER_PATTERN;
mem_ptn_tl->pattern3= MEM_TAILER_PATTERN;*/
// Jump ahead by memory header so pointer returned to caller points at the right place
buf = ((u8 *)buf) + sizeof (MEMORY_PATTERN) + PRE_OVERSIZE;
#if 0
printf("==>Memory was allocated from %s at line %d with length %d\n",
mem_blk_hd->file,
mem_blk_hd->line,
mem_blk_hd->length);
printf("==>mem alloc ptr = 0x%x\n", buf);
#endif
}
else
{
printf("==>Memory was allocated from %s at line %d with length %d, allocated size %d, count %d\n",
file,
line,
n*size, alloc_heap_mem_bytes, alloc_heap_mem_blk_cnt);
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
tls_mem_alloc_info();
return buf;
}
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
return buf;
}
/**
* This routine is called to free memory which was previously allocated using MpAllocateMemory function.
* Before freeing the memory, this function checks and makes sure that no overflow or underflows have
* happened and will also try to detect multiple frees of the same memory chunk.
*
* \param p Pointer to allocated memory
*/
void mem_free_debug(void *p, char* file, int line)
{
PMEMORY_PATTERN mem_ptn_hd;
PMEMORY_PATTERN mem_ptn_tl;
PMEMORY_BLOCK mem_blk_hd1;
u8 needfree = 0;
u8 haserr = 0;
u32 cpu_sr;
// Jump back by memory header size so we can get to the header
mem_ptn_hd = (PMEMORY_PATTERN) (((u8 *)p) - sizeof(MEMORY_PATTERN) - PRE_OVERSIZE);
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
dl_list_for_each(mem_blk_hd1, &memory_used_list, MEMORY_BLOCK, list){
if(mem_blk_hd1->header_pattern == (u32)mem_ptn_hd)
{
needfree = 1;
break;
}
}
if(needfree)
{
dl_list_del(&mem_blk_hd1->list);
dl_list_add_tail(&memory_free_list, &mem_blk_hd1->list);
alloc_heap_mem_bytes -= mem_blk_hd1->length + sizeof(MEMORY_PATTERN) + sizeof(MEMORY_PATTERN) + PRE_OVERSIZE + OVERSIZE +
mem_blk_hd1->pad;
alloc_heap_mem_blk_cnt--;
}
if(needfree == 0)
{
printf("Memory Block %p was deallocated from %s at line %d \n", mem_ptn_hd, file, line);
printf("Memory %p has been deallocated!\n", p);
dl_list_for_each_reverse(mem_blk_hd1, &memory_free_list, MEMORY_BLOCK, list){
if(mem_blk_hd1->header_pattern == (u32)mem_ptn_hd)
{
printf("Memory Block %p has been put free list!\n", mem_ptn_hd);
break;
}
}
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
tls_mem_alloc_info();
return;
}
#if 0
if(mem_blk_hd1->line == 976 || mem_blk_hd1->line == 983)
{
printf("Memory Block %p can not deallocated from %s at line %d \n", mem_ptn_hd, file, line);
printf("Memory %p has been deallocated!\n", p);
tls_mem_alloc_info();
}
#endif
mem_ptn_tl = (PMEMORY_PATTERN) ((u8 *)p + mem_blk_hd1->length + mem_blk_hd1->pad + OVERSIZE);
//
// Check that header was not corrupted
//
if (mem_ptn_hd->pattern0 != MEM_HEADER_PATTERN /*|| mem_ptn_hd->pattern1 != MEM_HEADER_PATTERN
|| mem_ptn_hd->pattern2 != MEM_HEADER_PATTERN || mem_ptn_hd->pattern3 != MEM_HEADER_PATTERN*/)
{
printf("Memory %p was deallocated from %s at line %d \n", p, file, line);
printf("Memory header corruption due to underflow detected at memory block %p\n",
mem_ptn_hd);
printf("Header pattern 0(0x%x)\n",//, 1(0x%x), 2(0x%x), 3(0x%x)
mem_ptn_hd->pattern0/*,
mem_ptn_hd->pattern1,
mem_ptn_hd->pattern2,
mem_ptn_hd->pattern3*/);
//printf("Dumping information about memory block. "
// "This information may itself have been "
// "corrupted and could cause machine to bugcheck.\n");
printf("Memory was allocated from %s at line %d with length %d\n",
mem_blk_hd1->file,
mem_blk_hd1->line,
mem_blk_hd1->length);
haserr = 1;
}
#if 0
printf("<==free memory allocated from %s at line %d with length %d\n",
mem_blk_hd->file,
mem_blk_hd->line,
mem_blk_hd->length);
printf("<==free memory 0x%x\n", (u8 *)mem_blk_hd+sizeof(*mem_blk_hd));
#endif
//
// Check that trailer was not corrupted
//
if(mem_ptn_tl->pattern0 != MEM_TAILER_PATTERN /*|| mem_ptn_tl->pattern1 != MEM_TAILER_PATTERN
|| mem_ptn_tl->pattern2 != MEM_TAILER_PATTERN || mem_ptn_tl->pattern3 != MEM_TAILER_PATTERN*/) {
printf("Memory %p was deallocated from %s at line %d \n", p, file, line);
printf("Memory tailer corruption due to overflow detected at %p\n", mem_ptn_hd);
printf("Tailer pattern 0(0x%x)\n",//, 1(0x%x), 2(0x%x), 3(0x%x)
mem_ptn_tl->pattern0/*,
mem_ptn_tl->pattern1,
mem_ptn_tl->pattern2,
mem_ptn_tl->pattern3*/);
//printf("Dumping information about memory block. "
// "This information may itself have been "
// "corrupted and could cause machine to bugcheck.\n");
printf("Memory was allocated from %s at line %d with length %d\n",
mem_blk_hd1->file, mem_blk_hd1->line, mem_blk_hd1->length);
haserr = 1;
}
if(needfree){
free(mem_ptn_hd);
}
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
if(haserr)
tls_mem_alloc_info();
}
void * mem_realloc_debug(void *mem_address, u32 size, char* file, int line)
{
void * mem_re_addr;
u32 cpu_sr;
if ((mem_re_addr = mem_alloc_debug(size, file, line)) == NULL){
printf("mem_realloc_debug failed(size=%d).\n", size);
return NULL;
}
if(mem_address != NULL)
{
cpu_sr = tls_os_set_critical();
memcpy(mem_re_addr, mem_address, size);
tls_os_release_critical(cpu_sr);
mem_free_debug(mem_address, file, line);
}
//printf("mem_realloc_debug mem_address=%p, mem_re_addr=%p, size=%d, file=%s, line=%d\n", mem_address, mem_re_addr, size, file, line);
return mem_re_addr;
}
void tls_mem_alloc_info(void)
{
int i;
MEMORY_BLOCK * pos;
u32 cpu_sr;
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
printf("==>Memory was allocated size %d, count %d\n",
alloc_heap_mem_bytes, alloc_heap_mem_blk_cnt);
i = 1;
dl_list_for_each(pos, &memory_used_list, MEMORY_BLOCK, list){
printf("Block(%2d): addr<%p>, file<%s>, line<%d>, length<%d>\n",
i, pos->header_pattern, pos->file, pos->line, pos->length);
i++;
}
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
}
int is_safe_addr_debug(void* p, u32 len, char* file, int line)
{
int i;
MEMORY_BLOCK * pos;
u32 cpu_sr;
if(((u32)p) >= (u32)0x64ae8 || ((u32)p) < (u32)0x54ae8)
{
return 1;
}
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
i = 1;
dl_list_for_each(pos, &memory_used_list, MEMORY_BLOCK, list){
if((pos->header_pattern + sizeof (MEMORY_PATTERN) + PRE_OVERSIZE) <= ((u32)p) && ((u32)p) <= ((u32)(pos->header_pattern + sizeof(MEMORY_PATTERN) + PRE_OVERSIZE + pos->length)))
{
if(((u32)p) + len > ((u32)(pos->header_pattern + sizeof(MEMORY_PATTERN) + PRE_OVERSIZE + pos->length)))
{
printf("==>Memory oversize. Block(%2d): addr<%p>, file<%s>, line<%d>, length<%d>\n",
i, pos->header_pattern, pos->file, pos->line, pos->length);
break;
}
else
{
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
return 1;
}
}
//else if(((u32)p) < pos->header_pattern)
//{
// //tls_os_release_critical(cpu_sr);
// tls_os_sem_release(mem_sem);
// return 1;
// }
i++;
}
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
printf("==>Memory is not safe addr<%p>, file<%s>, line<%d>.\n",p, file, line);
return 0;
}
#else /* WM_MEM_DEBUG */
#if TLS_OS_FREERTOS
u32 alloc_heap_mem_bytes = 0;
u32 alloc_heap_mem_blk_cnt = 0;
u32 alloc_heap_mem_max_size = 0;
#define OS_MEM_FLAG (0x5AA5A55A)
#define MEM_HEAD_FLAG (0xBB55B55B)
#endif
void * mem_alloc_debug(u32 size)
{
u32 cpu_sr = 0;
u32 *buffer = NULL;
#if TLS_OS_FREERTOS
u32 flag = 0;
#endif
if (!memory_manager_initialized) {
tls_os_status_t os_status;
memory_manager_initialized = true;
//
// NOTE: If two thread allocate the very first allocation simultaneously
// it could cause double initialization of the memory manager. This is a
// highly unlikely scenario and will occur in debug versions only.
//
os_status = tls_os_sem_create(&mem_sem, 1);
if(os_status != TLS_OS_SUCCESS)
printf("mem_alloc_debug: tls_os_sem_create mem_sem error\n");
}
#if TLS_OS_FREERTOS
size += 8;
if(tls_get_isr_count() > 0)
{
extern void *pvPortMalloc( size_t xWantedSize );
buffer = pvPortMalloc(size);
flag = OS_MEM_FLAG;
}
else
{
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
buffer = (u32*)malloc(size);
}
if(buffer)
{
*buffer = MEM_HEAD_FLAG;
buffer++;
*buffer = flag;
buffer++;
}
if(tls_get_isr_count() == 0)
{
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
}
#else //UCOSII
cpu_sr = tls_os_set_critical();
buffer = (u32*)malloc(size);
tls_os_release_critical(cpu_sr);
#endif
// if(buffer == NULL)
// {
// printf("malloc error \n");
// }
return buffer;
}
void mem_free_debug(void *p)
{
u32 cpu_sr = 0;
#if TLS_OS_FREERTOS
u32* intMemPtr = (void*)p;
if(tls_get_isr_count() == 0)
{
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
}
if(p)
{
intMemPtr = intMemPtr - 2;
if(*intMemPtr != MEM_HEAD_FLAG)
{
//printf("mem_free_debug ptr error!!!!!\n");
}
else
{
intMemPtr++;
if(*intMemPtr == OS_MEM_FLAG)
{
extern void vPortFree( void *pv );
intMemPtr -= 1;
vPortFree(intMemPtr);
}
else
{
intMemPtr -= 1;
free(intMemPtr);
}
}
}
if(tls_get_isr_count() == 0)
{
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
}
#else //UCOSII
cpu_sr = tls_os_set_critical();
free(p);
tls_os_release_critical(cpu_sr);
#endif
}
void * mem_realloc_debug(void *mem_address, u32 size)
{
u32 * mem_re_addr = NULL;
u32 cpu_sr = 0;
#if TLS_OS_FREERTOS
u32 flag = 0;
u32 length = size + 8;
if(tls_get_isr_count() > 0)
{
extern void *pvPortMalloc( size_t xWantedSize );
mem_re_addr = pvPortMalloc(length);
flag = OS_MEM_FLAG;
if (mem_re_addr)
{
return NULL;
}
if(mem_address != NULL)
{
memcpy((u8 *)(mem_re_addr + 2), (u8 *)mem_address, size);
mem_free_debug(mem_address);
}
}
else
{
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
if (!mem_address)
{
mem_re_addr = (u32*)malloc(length);
}else{
mem_re_addr = (u32 *)realloc(((u32 *)mem_address-2), length);
}
}
if(mem_re_addr)
{
*mem_re_addr = MEM_HEAD_FLAG;
mem_re_addr++;
*mem_re_addr = flag;
mem_re_addr++;
}
if(tls_get_isr_count() == 0)
{
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
}
#else
cpu_sr = tls_os_set_critical();
mem_re_addr = realloc(mem_address, size);
tls_os_release_critical(cpu_sr);
#endif
if(mem_re_addr == NULL)
{
printf("realloc error \n");
}
return mem_re_addr;
}
void *mem_calloc_debug(u32 n, u32 size)
{
u32 cpu_sr = 0;
u32 *buffer = NULL;
u32 length = 0;
#if TLS_OS_FREERTOS
u32 flag = 0;
length = n*size;
length += 8;
if(tls_get_isr_count() > 0)
{
extern void *pvPortMalloc( size_t xWantedSize );
buffer = pvPortMalloc(length);
flag = OS_MEM_FLAG;
}
else
{
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
buffer = (u32*)malloc(length);
}
if(buffer)
{
memset(buffer, 0, length);
*buffer = MEM_HEAD_FLAG;
buffer++;
*buffer = flag;
buffer++;
}
if(tls_get_isr_count() == 0)
{
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
}
#else //UCOSII
cpu_sr = tls_os_set_critical();
buffer = (u32*)calloc(n,size);
tls_os_release_critical(cpu_sr);
#endif
// if(buffer == NULL)
// {
// printf("calloc error \n");
// }
return buffer;
}
/**
* @brief This function is used to get available memory
*
* @param[in] None
*
* @return None
*
* @note None.
*/
#if !defined(__CC_ARM)
extern unsigned int __HeapLimit;
#else
extern unsigned int __heap_limit;
#endif
unsigned int tls_mem_get_avail_heapsize(void)
{
unsigned int heap_size;
int *p = NULL;
unsigned int cpu_sr = 0;
tls_os_sem_acquire(mem_sem, 0);
cpu_sr = tls_os_set_critical();
p = malloc(4);
if (p)
{
#if !defined(__CC_ARM)
heap_size = (unsigned int)&__HeapLimit - (unsigned int)p;
#else
heap_size = (unsigned int)&__heap_limit - (unsigned int)p;
#endif
free(p);
p = NULL;
}else{
heap_size = 0;
}
tls_os_release_critical(cpu_sr);
tls_os_sem_release(mem_sem);
return heap_size;
}
#endif /* WM_MEM_DEBUG */
sdk/Platform/Common/task/wm_wl_mbox.c
+160
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@@ -0,0 +1,160 @@
/**
* @file wm_wl_mbox.c
*
* @brief mailbox (mbox) APIs
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#include "wm_mem.h"
#include "wm_wl_mbox.h"
#include "wm_wl_task.h"
const void * const tls_null_pointer = (void *)0;
/**
* @brief create a malibox
*
* @param[out] *mbox pointer to the mailbox
* @param[in] size size of mailbox
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note None
*/
s8 tls_mbox_new(tls_mbox_t *mbox, int size)
{
s8 err;
tls_os_status_t status;
if (size == 0)
size = 10;
status = tls_os_queue_create(mbox, size);
if (status == TLS_OS_SUCCESS) {
err = TLS_OS_SUCCESS;
}
else
err = TLS_OS_ERROR;
return err;
}
#ifndef tls_mbox_valid
/**
* @brief check if an mbox is valid/allocated
*
* @param[in] mbox pointer to the mailbox
*
* @retval 0 invalid
* @retval 1 valid
*
* @note None
*/
int tls_mbox_valid(tls_mbox_t mbox)
{
if (mbox == NULL)
return 0;
else
return 1;
}
#endif
/**
* @brief sends a message to a mailbox
*
* @param[in] mbox pointer to the mailbox
* @param[in] *msg pointer to the message to be post
*
* @return None
*
* @note None
*/
void tls_mbox_post(tls_mbox_t mbox, void *msg)
{
u8 err;
u8 i=0;
if(msg == NULL )
msg = (void*)tls_null_pointer;
/* try 10 times */
while (i < 10)
{
err = tls_os_queue_send(mbox, msg, 0);
if(err == TLS_OS_SUCCESS)
break;
i++;
tls_os_time_delay(5);
}
}
/**
* @brief posts the "msg" to the mailbox.
*
* @param[in] mbox pointer to the mailbox
* @param[in] *msg pointer to the message to be post
*
* @retval TLS_OS_SUCCESS success
* @retval TLS_OS_ERROR failed
*
* @note this function have to block until the "msg" is really posted.
*/
s8 tls_mbox_trypost(tls_mbox_t mbox, void *msg)
{
u8 err;
if( msg == NULL )
{
msg = (void*)tls_null_pointer;
}
err = tls_os_queue_send(mbox, msg, 0);
if(err == TLS_OS_SUCCESS)
return TLS_OS_SUCCESS;
return TLS_OS_ERROR;
}
/**
* @brief waits for a message within the specified time
*
* @param[in] mbox pointer to the mailbox
* @param[out] **msg pointer to the message to be received
* @param[in] timeout the specified time
*
* @retval SYS_ARCH_TIMEOUT time out
* @retval other time of elapsed
*
* @note None
*/
u32 tls_arch_mbox_fetch(tls_mbox_t mbox, void **msg, u32 timeout)
{
u8 err;
u32 ucos_timeout = 0;
u32 in_timeout = timeout * HZ / 1000;
u32 tick_start, tick_stop, tick_elapsed;
if(timeout && in_timeout == 0)
in_timeout = 1;
tick_start = tls_os_get_time();
// *msg = OSQPend(mbox, in_timeout, &err);
err = tls_os_queue_receive(mbox,msg,0,in_timeout);
// if (err == OS_ERR_TIMEOUT ) {
if (err != TLS_OS_SUCCESS ) {
ucos_timeout = SYS_ARCH_TIMEOUT;
return ucos_timeout;
}
tick_stop = tls_os_get_time();
// Take care of wrap-around.
if( tick_stop >= tick_start )
tick_elapsed = tick_stop - tick_start;
else
tick_elapsed = 0xFFFFFFFF - tick_start + tick_stop ;
return tick_elapsed * 1000/HZ;
}
sdk/Platform/Common/task/wm_wl_task.c
+164
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@@ -0,0 +1,164 @@
#include "wm_mem.h"
#include "wm_wl_timers.h"
#include "wm_wl_task.h"
#include <string.h>
static tls_mbox_t task_mbox[TLS_MBOX_ALL_COUNT];
struct task_msg wl_msg[TLS_MSG_ALL_COUONT];
//#define TLS_MSG_ID_TX_MGMT_CMPLT 0
//#define TLS_MSG_ID_MLME_TASK 1
static void
task_thread(void *arg)
{
struct task_msg *msg;
start_routine fun;
void * argu;
struct task_parameter *task_param = (struct task_parameter *)arg;
while (1) { /* MAIN Loop */
/* wait for a message, timeouts are processed while waiting */
tls_timeouts_mbox_fetch_p(task_param->timeo_id, task_mbox[task_param->mbox_id], (void **)&msg);
switch (msg->type) {
case TASK_MSG_CALLBACK:
msg->msg.cb.function(msg->msg.cb.ctx);
tls_mem_free(msg);
break;
case TASK_MSG_CALLBACK_STATIC:
fun = msg->msg.cbs.function;
argu = msg->msg.cbs.ctx;
msg->msg.cbs.cnt--;
fun(argu);
break;
case TASK_MSG_TIMEOUT:
tls_timeout_p(task_param->timeo_id, msg->msg.tmo.msecs, msg->msg.tmo.h, msg->msg.tmo.arg);
tls_mem_free(msg);
break;
case TASK_MSG_UNTIMEOUT:
tls_untimeout_p(task_param->timeo_id, msg->msg.tmo.h, msg->msg.tmo.arg);
tls_mem_free(msg);
break;
default:
break;
}
}
}
s8 tls_wl_task_run(struct task_parameter *task_param)
{
if(tls_mbox_new(&task_mbox[task_param->mbox_id], task_param->mbox_size) != TLS_OS_SUCCESS) {
return -1;
}
tls_os_task_create(NULL, "WL_TSK",
//tls_os_task_create(NULL, task_param->name,
task_thread,
(void *)task_param,
(void *)(task_param->stk_start),
task_param->stk_size * sizeof(u32),
TLS_TASK_START_PRIO+task_param->task_id,
0);
return 0;
}
s8
tls_wl_task_callback_static(struct task_parameter *task_param, start_routine function, void *ctx, u8 block, u8 msg_id)
{
struct task_msg *msg = &wl_msg[msg_id];
if (msg->msg.cbs.cnt > 0)
return TLS_OS_ERROR;
if (tls_mbox_valid(task_mbox[task_param->mbox_id])) {
msg->type = TASK_MSG_CALLBACK_STATIC;
msg->msg.cbs.function = function;
msg->msg.cbs.ctx = ctx;
if (block) {
tls_mbox_post(task_mbox[task_param->mbox_id], (void *)msg);
}
else {
if (tls_mbox_trypost(task_mbox[task_param->mbox_id], (void *)msg) != TLS_OS_SUCCESS)
return TLS_OS_ERROR;
}
msg->msg.cbs.cnt++;
return TLS_OS_SUCCESS;
}
return TLS_OS_ERROR;
}
s8
tls_wl_task_callback(struct task_parameter *task_param, start_routine function, void *ctx, u8 block)
{
struct task_msg *msg;
if (tls_mbox_valid(task_mbox[task_param->mbox_id])) {
msg = (struct task_msg *)tls_mem_alloc(sizeof(struct task_msg));
if (msg == NULL) {
return TLS_OS_ERROR;
}
msg->type = TASK_MSG_CALLBACK;
msg->msg.cb.function = function;
msg->msg.cb.ctx = ctx;
if (block) {
tls_mbox_post(task_mbox[task_param->mbox_id], msg);
} else {
if (tls_mbox_trypost(task_mbox[task_param->mbox_id], msg) != TLS_OS_SUCCESS) {
//printf("tls_mbox_trypost error.\n");
tls_mem_free(msg);
return TLS_OS_ERROR;
}
}
return TLS_OS_SUCCESS;
}
return TLS_OS_ERROR;
}
s8
tls_wl_task_add_timeout(struct task_parameter *task_param, u32 msecs, tls_timeout_handler h, void *arg)
{
struct task_msg *msg;
if (tls_mbox_valid(task_mbox[task_param->mbox_id])) {
msg = (struct task_msg *)tls_mem_alloc(sizeof(struct task_msg));
if (msg == NULL) {
return TLS_OS_ERROR;
}
msg->type = TASK_MSG_TIMEOUT;
msg->msg.tmo.msecs = msecs;
msg->msg.tmo.h = h;
msg->msg.tmo.arg = arg;
tls_mbox_post(task_mbox[task_param->mbox_id], msg);
return TLS_OS_SUCCESS;
}
return TLS_OS_ERROR;
}
s8
tls_wl_task_untimeout(struct task_parameter *task_param, tls_timeout_handler h, void *arg)
{
struct task_msg *msg;
if (tls_mbox_valid(task_mbox[task_param->mbox_id])) {
msg = (struct task_msg *)tls_mem_alloc(sizeof(struct task_msg));
if (msg == NULL) {
return TLS_OS_ERROR;
}
msg->type = TASK_MSG_UNTIMEOUT;
msg->msg.tmo.h = h;
msg->msg.tmo.arg = arg;
tls_mbox_post(task_mbox[task_param->mbox_id], msg);
return TLS_OS_SUCCESS;
}
return TLS_OS_ERROR;
}
s8
tls_wl_task_init(void)
{
memset(wl_msg, 0, sizeof(struct task_msg));
return 0;
}
sdk/Platform/Common/task/wm_wl_timers.c
+180
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@@ -0,0 +1,180 @@
#include <string.h>
#include "wm_mem.h"
#include "wm_wl_timers.h"
#include "wm_wl_task.h"
struct tls_timeo {
struct tls_timeo *next;
u32 time;
tls_timeout_handler h;
void *arg;
};
/** The one and only timeout list */
struct tls_timeo *next_timeout[TLS_TIMEO_ALL_COUONT];
/**
* @brief Wait (forever) for a message to arrive in an mbox.
* While waiting, timeouts are processed
*
* @param[in] timeo_assigned timer NO. by assigned
* @param[in] mbox the mbox to fetch the message from
* @param[out] **msg the place to store the message
*
* @return None
*
* @note None
*/
void tls_timeouts_mbox_fetch_p(u8 timeo_assigned, tls_mbox_t mbox, void **msg)
{
u32 time_needed;
struct tls_timeo *tmptimeout;
tls_timeout_handler handler;
void *arg;
struct tls_timeo **timeo = &next_timeout[timeo_assigned];
again:
if (!(*timeo)) {
time_needed = tls_arch_mbox_fetch(mbox, msg, 0);
} else {
if ((*timeo)->time > 0) {
time_needed = tls_arch_mbox_fetch(mbox, msg, (*timeo)->time);
} else {
time_needed = SYS_ARCH_TIMEOUT;
}
if (time_needed == SYS_ARCH_TIMEOUT) {
/* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message
could be fetched. We should now call the timeout handler and
deallocate the memory allocated for the timeout. */
tmptimeout = *timeo;
*timeo = tmptimeout->next;
handler = tmptimeout->h;
arg = tmptimeout->arg;
tls_mem_free(tmptimeout);
if (handler != NULL) {
handler(arg);
}
/* We try again to fetch a message from the mbox. */
goto again;
} else {
/* If time != SYS_ARCH_TIMEOUT, a message was received before the timeout
occured. The time variable is set to the number of
milliseconds we waited for the message. */
if (time_needed < (*timeo)->time) {
(*timeo)->time -= time_needed;
} else {
(*timeo)->time = 0;
}
}
}
}
/**
* @brief create a one-shot timer (aka timeout)
*
* @param[in] timeo_assigned timer NO. by assigned
* @param[in] msecs time in milliseconds after that the timer should expire
* @param[in] handler callback function that would be called by the timeout
* @param[in] *arg callback argument that would be passed to handler
*
* @return None
*
* @note while waiting for a message using sys_timeouts_mbox_fetch()
*/
void tls_timeout_p(u8 timeo_assigned, u32 msecs, tls_timeout_handler handler, void *arg)
{
struct tls_timeo *timeout, *t;
struct tls_timeo **timeo = &next_timeout[timeo_assigned];
timeout = (struct tls_timeo *)tls_mem_alloc(sizeof(struct tls_timeo));
if (timeout == NULL) {
return;
}
timeout->next = NULL;
timeout->h = handler;
timeout->arg = arg;
timeout->time = msecs;
if (*timeo == NULL) {
*timeo = timeout;
return;
}
if ((*timeo)->time > msecs) {
(*timeo)->time -= msecs;
timeout->next = *timeo;
*timeo = timeout;
} else {
for(t = *timeo; t != NULL; t = t->next) {
timeout->time -= t->time;
if (t->next == NULL || t->next->time > timeout->time) {
if (t->next != NULL) {
t->next->time -= timeout->time;
}
timeout->next = t->next;
t->next = timeout;
break;
}
}
}
}
/**
* @brief Go through timeout list (for this task only) and remove the first
* matching entry, even though the timeout has not triggered yet
*
* @param[in] timeo_assigned timer NO. by assigned
* @param[in] handler callback function that would be called by the timeout
* @param[in] *arg callback argument that would be passed to handler
*
* @return None
*
* @note None
*/
void tls_untimeout_p(u8 timeo_assigned, tls_timeout_handler handler, void *arg)
{
struct tls_timeo *prev_t, *t;
struct tls_timeo **timeo = &next_timeout[timeo_assigned];
if (*timeo == NULL) {
return;
}
for (t = *timeo, prev_t = NULL; t != NULL; prev_t = t, t = t->next) {
if ((t->h == handler) && (t->arg == arg)) {
/* We have a match */
/* Unlink from previous in list */
if (prev_t == NULL) {
*timeo = t->next;
} else {
prev_t->next = t->next;
}
/* If not the last one, add time of this one back to next */
if (t->next != NULL) {
t->next->time += t->time;
}
tls_mem_free(t);
return;
}
}
return;
}
/**
* @brief timer initialized
*
* @param None
*
* @return None
*
* @note None
*/
s8 tls_wl_timer_init(void)
{
memset(next_timeout, 0, sizeof(struct tls_timeo *) * TLS_TIMEO_ALL_COUONT);
return 0;
}
sdk/Platform/Common/utils/utils.c
+1093
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File diff suppressed because it is too large Load Diff
sdk/Platform/Common/wm_common.c
+11
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@@ -0,0 +1,11 @@
#ifndef WM_COMMON
#define WM_COMMON
#include "../Platform/Common/fwup/wm_fwup.c"
#include "../Platform/Common/task/wm_wl_mbox.c"
#include "../Platform/Common/task/wm_wl_task.c"
#include "../Platform/Common/task/wm_wl_timers.c"
#include "../Platform/Common/utils/utils.c"
#include "../Platform/Common/crypto/wm_crypto_hard.c"
#include "../Platform/Common/mem/wm_mem.c"
#include "../Platform/Common/Params/wm_param.c"
#endif //WM_COMMON
sdk/Platform/Drivers/7816/wm_7816.c
+291
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@@ -0,0 +1,291 @@
/**************************************************************************//**
* @file wm_i2s.c
* @author
* @version
* @date
* @brief
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd. All rights reserved.
*****************************************************************************/
#include <stdbool.h>
#include <string.h>
#include <stdio.h>
#include "wm_regs.h"
#include "wm_7816.h"
#include "wm_gpio.h"
#include "wm_uart.h"
#include "wm_cpu.h"
#include "wm_osal.h"
#define DEBUG_7816 1
#if DEBUG_7816
#define PRINT_DEBUG(fmt, args...) do{(printf("[DEBUG] "), printf(fmt, ##args));}while(0)
#else
#define PRINT_DEBUG(fmt, args...)
#endif
#define SYS_CLK (40000000)
sc_io_map sc_io;
/**
* @brief
* This function is used to config the pin in gpio or 7816 mode for the 7816 power on timing
* @param[in] mode : 1--gpio mode ; 0--7816 mode
* @retval
*/
void wm_sc_io_clk_config(uint8_t mode)
{
if (sc_io.initialed == 0)
{
printf("error : 7816 io map must init....\r\n");
return ;
}
if (mode) //gpio mode
{
tls_io_cfg_set(sc_io.clk_pin_num, WM_IO_OPTION5);
tls_io_cfg_set(sc_io.io_pin_num, WM_IO_OPTION5);
tls_gpio_cfg(sc_io.clk_pin_num, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_PULLHIGH);
tls_gpio_cfg(sc_io.io_pin_num, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_PULLHIGH);
}
else //7816 mode
{
tls_io_cfg_set(sc_io.clk_pin_num, sc_io.clk_opt);
tls_io_cfg_set(sc_io.io_pin_num, sc_io.io_opt);
}
}
/**
* @brief
* This function is used to config the block guard time param in 7816 mode
* @param[in] bgt : the value of blcok guard time will be set
* @retval
*/
void wm_sc_set_bgt(uint8_t bgt)
{
uint32_t reg;
bgt = (bgt > 0x1f) ? 0x1F : bgt;
reg = tls_reg_read32(HR_UART2_LINE_CTRL);
reg &= ~(0x1f << 11);
reg |= (bgt << 11);
tls_reg_write32(HR_UART2_LINE_CTRL, reg);
}
/**
* @brief
* This function is used to config the tx retry count when detect err signal
* @param[in] count : the value of retry time will be set 7 for max
* @retval
*/
void wm_sc_tx_retry_times(uint8_t count)
{
uint32_t reg;
reg = tls_reg_read32(HR_UART2_LINE_CTRL);
reg &= ~(0x7 << 16);
tls_reg_write32(HR_UART2_LINE_CTRL, reg|(count<<16));
tls_bitband_write(HR_UART2_LINE_CTRL, 19, 1);
}
/**
* @brief
* This function is used to config the rx retry count when detect parity error
* @param[in] count : the value of retry time will be set 7 for max
* @retval
*/
void wm_sc_rx_retry_times(uint8_t count)
{
uint32_t reg;
reg = tls_reg_read32(HR_UART2_LINE_CTRL);
reg &= ~(0x7 << 20);
tls_reg_write32(HR_UART2_LINE_CTRL, reg|(count<<20));
tls_bitband_write(HR_UART2_LINE_CTRL, 23, 1);
}
/**
* @brief
* This function is used to config the etu param
* @param[in] etu : the value of etu will be set
* @retval
*/
void wm_sc_set_etu(uint16_t etu)
{
uint32_t reg;
reg = tls_reg_read32(HR_UART2_BAUD_RATE_CTRL);
reg &= ~ 0xFFFF;
reg |= etu;
tls_reg_write32(HR_UART2_BAUD_RATE_CTRL, reg);
}
/**
* @brief
* This function config the module clock freq
* @param[in] freq : the value of clock freq
* @retval
*/
void wm_sc_set_frequency(uint32_t freq)
{
uint32_t reg;
uint8_t div;
tls_sys_clk clk;
tls_sys_clk_get(&clk);
div = (clk.apbclk * 1000000 + freq)/(2 * freq) - 1;
reg = tls_reg_read32(HR_UART2_BAUD_RATE_CTRL);
reg &= ~ 0x3F0000;
reg |= (div<<16);
tls_reg_write32(HR_UART2_BAUD_RATE_CTRL, reg);
}
/**
* @brief
* close af to use PB29 and PB30(uart2_rx as default if af is on) as gpio
* @retval
*/
void wm_sc_powerInit(void)
{
#ifdef WM_SC_PWR_PIN
u32 regValue;
// PB29 AF close, used as GPIO
regValue = tls_reg_read32(HR_GPIOB_AFSEL);
regValue &= ~0x20000000;
tls_reg_write32(HR_GPIOB_AFSEL, regValue);
// PB30 AF close, used as GPIO
regValue = tls_reg_read32(HR_GPIOB_AFSEL);
regValue &= ~0x40000000;
tls_reg_write32(HR_GPIOB_AFSEL, regValue);
#endif
}
/**
* @brief
* power on the 7816 device if power is controled by GPIO
* @retval
*/
void wm_sc_poweron(void)
{
#ifdef WM_SC_PWR_PIN
tls_gpio_cfg(WM_SC_PWR_PIN, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_PULLHIGH);
tls_gpio_write(WM_SC_PWR_PIN, 1);
#endif
}
/**
* @brief
* power off the 7816 device if power is controled by GPIO
* @retval
*/
void wm_sc_poweroff(void)
{
#ifdef WM_SC_PWR_PIN
tls_gpio_cfg(WM_SC_PWR_PIN, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_PULLHIGH);
tls_gpio_write(WM_SC_PWR_PIN, 0);
#endif
}
/**
* @brief
* driver the reset gpio in low level
* @retval
*/
void wm_sc_rst_low(void)
{
#ifdef WM_SC_RST_PIN
tls_gpio_cfg(WM_SC_RST_PIN, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_PULLHIGH);
tls_gpio_write(WM_SC_RST_PIN, 0);
#endif
}
/**
* @brief
* driver the reset gpio in high level
* @retval
*/
void wm_sc_rst_high(void)
{
#ifdef WM_SC_RST_PIN
tls_gpio_cfg(WM_SC_RST_PIN, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_PULLHIGH);
tls_gpio_write(WM_SC_RST_PIN, 1);
#endif
}
/**
* @brief
* hotrest the 7816 device obey the 7816-3 timing
* @retval
*/
void wm_sc_hotreset(void)
{
uint32_t delay = 0xffff;
/* set the rst pin to low */
wm_sc_rst_low();
/* delay */
while(delay--);
/* set f/d to default 372 */
wm_sc_set_etu(WM_SC_DEFAULT_FD);
/* set the rst pin to high */
wm_sc_rst_high();
}
/**
* @brief
* colreset the 7816 device obey the 7816-3 timing
* @retval
*/
void wm_sc_colreset(void)
{
/* power down */
wm_sc_poweroff();
/* select the clk io in gpio mode */
wm_sc_io_clk_config(1);
/* reset the clk pin */
tls_gpio_write(sc_io.clk_pin_num, 0);
/* reset the io pin */
tls_gpio_write(sc_io.io_pin_num, 0);
/* set the ret pin to low */
wm_sc_rst_low();
/* power on the card */
wm_sc_poweron();
/* config the model in 7816 mode */
wm_sc_7816_mode(1);
/* select the clk io pin in 7816 mode */
wm_sc_io_clk_config(0);
/* config the output clock freq*/
wm_sc_set_frequency(5000000);
/* set the F/D to default (372)*/
wm_sc_set_etu(WM_SC_DEFAULT_FD);
/* set the rst pin to high */
wm_sc_rst_high();
}
/**
* @brief
* deactive the 7816 device obey the 7816-3 timing
* @retval
*/
void wm_sc_deactive(void)
{
/* set the rst pin in low level*/
wm_sc_rst_low();
/* select the clk and io pin to 7816 mode */
wm_sc_io_clk_config(0);
/* disable the output clock */
wm_sc_clk_enable(0);
/* select the clk and io pin to gpio mode */
wm_sc_io_clk_config(1);
/* set the clk pin to low */
tls_gpio_write(sc_io.clk_pin_num, 0);
/* set the io pin to low */
tls_gpio_write(sc_io.io_pin_num, 0);
/* set the power pin to low */
wm_sc_poweroff();
}
sdk/Platform/Drivers/CMakeLists.txt
+64
View File
@@ -0,0 +1,64 @@
# THE VERSION NUMBER
SET(CMAKE_SYSTEM_NAME Generic)
CMAKE_MINIMUM_REQUIRED (VERSION 3.10)
PROJECT(WMDRIVER)
SET(CMAKE_C_USE_RESPONSE_FILE_FOR_OBJECTS 1)
SET(CMAKE_NINJA_FORCE_RESPONSE_FILE 1 CACHE INTERNAL "")
set(CMAKE_VERBOSE_MAKEFILE OFF)
# ENABLE ASM
ENABLE_LANGUAGE(ASM)
SET(CMAKE_STATIC_LIBRARY_PREFIX)
SET(CMAKE_STATIC_LIBRARY_SUFFIX)
SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
# C FLAGS
SET(CMAKE_C_FLAGS " -mthumb --function-sections --data-sections -mcpu=cortex-m3 -std=gnu99 -mabi=aapcs -march=armv7-m -fno-builtin ")
STRING(APPEND CMAKE_C_FLAGS " -DGCC_COMPILE=1 -DWOLFSSL_USER_SETTINGS -D_IN_ADDR_T_DECLARED -D__MACHINE_ENDIAN_H__ -D_TIMEVAL_DEFINED -D__INSIDE_CYGWIN_NET__ ")
SET(CMAKE_C_FLAGS_DEBUG "-O0 -g3 -gdwarf-2 -Wall -DDEBUG ")
SET(CMAKE_C_FLAGS_RELEASE "-Os -Wall")
# DEBUG ASM FLAGS
SET(CMAKE_ASM_FLAGS_DEBUG "${CMAKE_ASM_FLAGS_DEBUG} -O0 -g3 -gdwarf-2 -Wall -mthumb-interwork -mthumb -std=gnu99 -mcpu=cortex-m3 -march=armv7-m -mabi=aapcs -fno-builtin -DDEBUG ")
SET(CMAKE_ASM_FLAGS_RELEASE "${CMAKE_ASM_FLAGS_RELEASE} -Os -Wall -mthumb-interwork -mthumb -std=gnu99 -mcpu=cortex-m3 -march=armv7-m -mabi=aapcs -fno-builtin ")
# Library sources
SET(LIBRARY_SOURCES
"${CMAKE_CURRENT_SOURCE_DIR}/adc/wm_adc.c"
"${CMAKE_CURRENT_SOURCE_DIR}/cpu/wm_cpu.c"
"${CMAKE_CURRENT_SOURCE_DIR}/dma/wm_dma.c"
"${CMAKE_CURRENT_SOURCE_DIR}/efuse/wm_efuse.c"
"${CMAKE_CURRENT_SOURCE_DIR}/flash/wm_fls.c"
"${CMAKE_CURRENT_SOURCE_DIR}/flash/wm_fls_gd25qxx.c"
"${CMAKE_CURRENT_SOURCE_DIR}/gpio/wm_gpio.c"
"${CMAKE_CURRENT_SOURCE_DIR}/gpio/wm_gpio_afsel.c"
"${CMAKE_CURRENT_SOURCE_DIR}/hspi/wm_hspi.c"
"${CMAKE_CURRENT_SOURCE_DIR}/i2c/wm_i2c.c"
"${CMAKE_CURRENT_SOURCE_DIR}/irq/wm_irq.c"
"${CMAKE_CURRENT_SOURCE_DIR}/pwm/wm_pwm.c"
"${CMAKE_CURRENT_SOURCE_DIR}/pmu/wm_pmu.c"
"${CMAKE_CURRENT_SOURCE_DIR}/rtc/wm_rtc.c"
"${CMAKE_CURRENT_SOURCE_DIR}/spi/wm_hostspi.c"
"${CMAKE_CURRENT_SOURCE_DIR}/timer/wm_timer.c"
"${CMAKE_CURRENT_SOURCE_DIR}/uart/wm_uart.c"
"${CMAKE_CURRENT_SOURCE_DIR}/watchdog/wm_watchdog.c"
"${CMAKE_CURRENT_SOURCE_DIR}/internalflash/wm_internal_fls.c"
"${CMAKE_CURRENT_SOURCE_DIR}/i2s/wm_i2s.c"
"${CMAKE_CURRENT_SOURCE_DIR}/io/wm_io.c"
"${CMAKE_CURRENT_SOURCE_DIR}/lcd/wm_lcd.c"
"${CMAKE_CURRENT_SOURCE_DIR}/7816/wm_7816.c"
)
function(ADD_LIB_TARGET LIBTARGET)
add_library(${LIBTARGET} OBJECT ${LIBRARY_SOURCES})
# ADD_CUSTOM_COMMAND(TARGET ${LIBTARGET} POST_BUILD COMMAND ${CMAKE_COMMAND} -E copy_if_different ${EXECUTABLE_OUTPUT_PATH}/${LIBTARGET} ${CMAKE_CURRENT_SOURCE_DIR}/../../Lib/GNU/${LIBTARGET})
endfunction()
ADD_LIB_TARGET(wmdriver.a)
sdk/Platform/Drivers/adc/wm_adc.c
+517
View File
@@ -0,0 +1,517 @@
/*****************************************************************************
*
* File Name : wm_adc.c
*
* Description: adc Driver Module
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
* All rights reserved.
*
* Author : dave
*
* Date : 2014-8-15
*****************************************************************************/
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "wm_regs.h"
#include "wm_adc.h"
#include "wm_dma.h"
#include "misc.h"
#include "wm_io.h"
#include "wm_irq.h"
static u16 adc_offset = 0;
volatile ST_ADC gst_adc;
volatile u8 adc_irq_flag = 0;
void ADC_IRQHandler(void)
{
u16 adcvalue;
int reg;
reg = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
if(reg & CONFIG_ADC_INT) //ADC�ж�
{
adc_irq_flag = 1;
tls_adc_clear_irq(ADC_INT_TYPE_ADC);
adcvalue = tls_read_adc_result();
if(gst_adc.adc_cb)
gst_adc.adc_cb(&adcvalue,1);
}
if(reg & CONFIG_ADC_INT_CMP)
{
tls_adc_clear_irq(ADC_INT_TYPE_ADC_COMP);
if(gst_adc.adc_bigger_cb)
gst_adc.adc_bigger_cb(NULL, 0);
}
}
static void adc_dma_isr_callbk(void)
{
if(gst_adc.adc_dma_cb)
gst_adc.adc_dma_cb((u16 *)(ADC_DEST_BUFFER_DMA), gst_adc.valuelen);
}
void tls_adc_init(u8 ifusedma,u8 dmachannel)
{
tls_reg_write32(HR_SD_ADC_CONFIG_REG, 0x0);
tls_irq_enable(ADC_IRQn);
//ע���жϺ�channel�йأ�������Ҫ������
if(ifusedma)
{
gst_adc.dmachannel = tls_dma_request(dmachannel, 0); //����dma����Ҫֱ��ָ������Ϊ�����dma���ܻᱻ�������ʹ��
tls_dma_irq_register(gst_adc.dmachannel, (void(*)(void*))adc_dma_isr_callbk, NULL, TLS_DMA_IRQ_TRANSFER_DONE);
}
//printf("\ndma channel = %d\n",gst_adc.dmachannel);
}
void tls_adc_clear_irq(int inttype)
{
int reg;
reg = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
if(ADC_INT_TYPE_ADC == inttype)
{
reg |= CONFIG_ADC_INT;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, reg);
}
else if(ADC_INT_TYPE_ADC_COMP== inttype)
{
reg |= CONFIG_ADC_INT_CMP;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, reg);
}
else if(ADC_INT_TYPE_DMA == inttype)
{
tls_dma_irq_clr(gst_adc.dmachannel, TLS_DMA_IRQ_TRANSFER_DONE);
}
}
void tls_adc_irq_register(int inttype, void (*callback)(u16 *buf, u16 len))
{
if(ADC_INT_TYPE_ADC == inttype)
{
gst_adc.adc_cb = callback;
}
else if(ADC_INT_TYPE_DMA == inttype)
{
gst_adc.adc_dma_cb = callback;
}
else if(ADC_INT_TYPE_ADC_COMP == inttype)
{
gst_adc.adc_bigger_cb = callback;
}
}
u16 tls_read_adc_result(void)
{
u32 value;
u16 ret;
value = tls_reg_read32(HR_SD_ADC_RESULT_REG);
ret = value&0x3fff;
return ret;
}
void tls_adc_start_with_cpu(int Channel)
{
u32 value;
Channel &= CONFIG_ADC_CHL_MASK;
/* Stop adc first */
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value &= ~CONFIG_ADC_DMA_MASK;
value &= ~CONFIG_ADC_START;
value |= Channel;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value |= CONFIG_ADC_START;
value |= CONFIG_ADC_INT_MASK;
if(Channel < 8)
{
value |= CONFIG_ADC_G_CTRL12;
value &= ~ CONFIG_ADC_VCM(0x3F);
value |= CONFIG_ADC_VCM(0x1F);
}
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
}
void tls_adc_enable_calibration_buffer_offset(void)
{
u32 value;
/* Stop adc first */
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value &= ~CONFIG_ADC_DMA_MASK;
value &= ~CONFIG_ADC_START;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value |= CONFIG_ADC_CHL_OFFSET;
value |= CONFIG_ADC_START;
value |= CONFIG_ADC_INT_MASK;
value |= CONFIG_ADC_EN_CAL;
value |= CONFIG_ADC_G_CTRL12;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
}
void tls_adc_temp_offset_with_cpu(u8 calTemp12)
{
u32 value;
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value &= ~CONFIG_ADC_DMA_MASK;
value &= ~CONFIG_ADC_START;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value |= CONFIG_ADC_CHL_TEMP;
value |= CONFIG_ADC_START;
value |= CONFIG_ADC_INT_MASK;
if(calTemp12)
{
value |= CONFIG_ADC_CAL_OFFSET_TEMP12;
}
else
{
value &= ~CONFIG_ADC_CAL_OFFSET_TEMP12;
}
value &= ~CONFIG_ADC_G_CTRL12;
value |= CONFIG_ADC_TEMP_ON;
value |= CONFIG_ADC_G_TEMP12(3);
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value); /*start adc*/
}
void tls_adc_voltage_start_with_cpu(void)
{
u32 value;
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value &= ~CONFIG_ADC_DMA_MASK;
value &= ~CONFIG_ADC_START;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value |= CONFIG_ADC_CHL_VOLT;
value |= CONFIG_ADC_START;
value |= CONFIG_ADC_INT_MASK;
value |= CONFIG_ADC_G_CTRL12;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value); /*start adc*/
}
void tls_adc_start_with_dma(int Channel, int Length)
{
u32 value;
int len;
if(Channel < 0 || Channel > 11)
return;
if(Length > ADC_DEST_BUFFER_SIZE)
len = ADC_DEST_BUFFER_SIZE;
else
len = Length;
gst_adc.valuelen = len;
Channel &= CONFIG_ADC_CHL_MASK;
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value &= ~CONFIG_ADC_START; //stop
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
/* Stop dma if necessary */
while(DMA_CHNLCTRL_REG(gst_adc.dmachannel) & 1)
{
DMA_CHNLCTRL_REG(gst_adc.dmachannel) = 2;
}
DMA_SRCADDR_REG(gst_adc.dmachannel) = HR_SD_ADC_RESULT_REG;
DMA_DESTADDR_REG(gst_adc.dmachannel) = ADC_DEST_BUFFER_DMA;
/* Hard, Normal, adc_req */
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
if (Channel == 8){
DMA_MODE_REG(gst_adc.dmachannel) = (0x01 | (0+6)<<2);
value |= (0x1 << 11);
}
else if (Channel == 9){
DMA_MODE_REG(gst_adc.dmachannel) = (0x01 | (2+6)<<2);
value |= (0x1 << 13);
}
else if (Channel == 10){
DMA_MODE_REG(gst_adc.dmachannel) = (0x01 | (4+6)<<2);
value |= (0x1 << 15);
}
else if (Channel == 11){
DMA_MODE_REG(gst_adc.dmachannel) = (0x01 | (6+6)<<2);
value |= (0x1 << 17);
}
else{
DMA_MODE_REG(gst_adc.dmachannel) = (0x01 | (Channel+6)<<2);
value |= (0x1 << (11 + Channel));
}
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
/* Dest_add_inc, halfword, */
DMA_CTRL_REG(gst_adc.dmachannel) = (1<<3)|(1<<5)|((len*2)<<8);
DMA_INTMASK_REG &= ~(0x01 << (gst_adc.dmachannel *2 + 1));
DMA_CHNLCTRL_REG(gst_adc.dmachannel) = 1; /* Enable dma */
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value |= CONFIG_ADC_START;
value |= Channel;
if(Channel < 8)
{
value |= CONFIG_ADC_G_CTRL12;
value &= ~ CONFIG_ADC_VCM(0x3F);
value |= CONFIG_ADC_VCM(0x1F);
}
// printf("config value==%x\n", value);
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value); /*start adc*/
}
void tls_adc_stop(int ifusedma)
{
u32 value;
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value &= ~CONFIG_ADC_START;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
if(ifusedma)
tls_dma_free(gst_adc.dmachannel);
}
void tls_adc_config_cmp_reg(int cmp_data, int cmp_pol)
{
u32 value;
cmp_data &= 0x3FFF;
value = tls_reg_read32(HR_SD_ADC_RESULT_REG);
value &= ~(0x3FFF<<14);
value |= (cmp_data<<14);
tls_reg_write32(HR_SD_ADC_RESULT_REG, value);
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value |= CONFIG_ADC_CMP_INT_MASK;
if(cmp_pol)
{
value |= CONFIG_ADC_CMP_POL;
}
else
{
value &= ~CONFIG_ADC_CMP_POL;
}
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
}
void tls_adc_cmp_start(int Channel, int cmp_data, int cmp_pol)
{
u32 value;
Channel &= CONFIG_ADC_CHL_MASK;
/* Stop adc first */
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value &= ~CONFIG_ADC_DMA_MASK;
value &= ~CONFIG_ADC_START;
value |= Channel;
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
tls_adc_config_cmp_reg(cmp_data, cmp_pol);
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
value |= CONFIG_ADC_START;
if(Channel < 8)
{
value |= CONFIG_ADC_G_CTRL12;
value &= ~ CONFIG_ADC_VCM(0x3F);
value |= CONFIG_ADC_VCM(0x1F);
}
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value); /*start adc*/
}
void tls_adc_reference_sel(int ref)
{
u32 value;
value = tls_reg_read32(HR_SD_ADC_CONFIG_REG);
if(ADC_REFERENCE_EXTERNAL == ref)
{
value &= ~CONFIG_ADC_REF_SEL;
value |= CONFIG_ADC_BUF_BYPASS;
}
else if(ADC_REFERENCE_INTERNAL == ref)
{
value |= CONFIG_ADC_REF_SEL;
value &= ~CONFIG_ADC_BUF_BYPASS;
}
tls_reg_write32(HR_SD_ADC_CONFIG_REG, value);
}
void tls_adc_set_clk(int div)
{
u32 value;
value = tls_reg_read32(HR_CLK_DIV_CTL);
value &= ~(0xffff<<12);
value |= (div << 12);
value |= ((u32)0x1<<31);
tls_reg_write32(HR_CLK_DIV_CTL, value);
}
void signedToUnsignedData(u16 *adcValue, u16 *offset)
{
// s16 temp = 0;
if(*adcValue >= 8192)
{
*adcValue -= 8192;
}
else
{
*adcValue += 8192;
}
/* if (*offset >=8192)
{
temp =((*offset-1)&0x1FFF) - 8192;
}else{
temp = *offset;
}
*adcValue -= temp;
*/
}
static void waitForAdcDone(void)
{
while(1)
{
if(adc_irq_flag) //ADC�ж�
{
adc_irq_flag = 0;
break;
}
}
}
static void waitForStable(void)
{
volatile u32 count;
count = 2000;
while( count-- );
}
u16 adc_get_offset(void)
{
tls_adc_init(0, 0);
tls_adc_reference_sel(ADC_REFERENCE_INTERNAL);
adc_irq_flag = 0;
waitForStable();
tls_adc_enable_calibration_buffer_offset(); //ʹ��У׼����
waitForAdcDone();
adc_offset = tls_read_adc_result(); //��ȡadcת�����
tls_adc_stop(0);
//printf("\r\noffset:%d", adc_offset);
return adc_offset;
}
u32 adc_get_interTemp(void)
{
u16 code2, code1, realCode;
u32 tem;
tls_adc_init(0, 0);
tls_adc_reference_sel(ADC_REFERENCE_INTERNAL);
adc_irq_flag = 0;
waitForStable();
tls_adc_temp_offset_with_cpu(1); //code2
waitForAdcDone();
code2 = tls_read_adc_result();
tls_adc_stop(0);
signedToUnsignedData(&code2, &adc_offset);
adc_irq_flag = 0;
waitForStable();
tls_adc_temp_offset_with_cpu(0); //code1
waitForAdcDone();
code1 = tls_read_adc_result();
tls_adc_stop(0);
signedToUnsignedData(&code1, &adc_offset);
realCode = ( (code1-code2)/2+8192 );
//printf("code1:%d, code2:%d, realCode:%d\r\n", code1, code2, realCode);
//printf("\r\nTEMP:%.1f", realCode*0.12376-1294.58);
//return (realCode*0.12376-1294.58);
tem = realCode*124-1294580;
//printf("tem:%d\r\n", tem);
return tem;
}
u16 adc_get_inputVolt(u8 channel)
{
u16 average = 0;
/*calibration*/
adc_get_offset();
/*get value*/
tls_adc_init(0, 0);
tls_adc_reference_sel(ADC_REFERENCE_INTERNAL);
adc_irq_flag = 0;
waitForStable();
tls_adc_start_with_cpu(channel);
waitForAdcDone();
average = tls_read_adc_result();
tls_adc_stop(0);
signedToUnsignedData(&average, &adc_offset);
//printf("ch[%d]inputVolt:%.3f\r\n", channel+1, ((average-8192.0)/8192*2.25/1.2 + 1.584));
return average;
}
u16 adc_get_interVolt(void)
{
u16 voltValue;
/*calibration*/
adc_get_offset();
/*get value*/
tls_adc_init(0, 0);
tls_adc_reference_sel(ADC_REFERENCE_INTERNAL);
adc_irq_flag = 0;
waitForStable();
tls_adc_voltage_start_with_cpu();
waitForAdcDone();
voltValue = tls_read_adc_result();
tls_adc_stop(0);
signedToUnsignedData(&voltValue, &adc_offset);
float voltage = ( 1.214 - ((float)voltValue-8192)/8192*2.25/1.2 )*2;
printf("interVolt:%.2f\r\n", voltage);
return voltValue;
}
u32 adc_temp(void)
{
u32 tem;
adc_get_offset();
tem = adc_get_interTemp();
return tem;
}
sdk/Platform/Drivers/cpu/wm_cpu.c
+86
View File
@@ -0,0 +1,86 @@
/**
* @file wm_cpu.c
*
* @brief cpu driver module
*
* @author kevin
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#include "wm_debug.h"
#include "wm_regs.h"
#include "wm_irq.h"
#include "wm_cpu.h"
#include "wm_pwm.h"
#include "wm_uart.h"
#include "wm_wifi.h"
extern void Debug_UartInit(void);
void tls_sys_clock_switch_hook(void)
{
tls_sys_clk sysclk;
tls_sys_clk_get(&sysclk);
tls_reg_write32(HR_TIMER_CFG, sysclk.apbclk-1);
/*to do, like uart baudrate switch, other device clock switch*/
tls_uart_set_baud_rate(0, 115200);
}
/**
* @brief This function is used to set cpu clock
*
* @param[in] clk select cpu clock
* clk == CPU_CLK_80M 80M
* clk == CPU_CLK_40M 40M
*
* @return None
*
* @note None
*/
void tls_sys_clk_set(u32 clk)
{
u32 RegValue;
u8 wlanDiv, cpuDiv;
RegValue = tls_reg_read32(HR_CLK_DIV_CTL);
wlanDiv = (RegValue>>4)&0x0F;
RegValue &= 0xFFFFF000;
RegValue |= 0x80000000;
switch(clk)
{
case CPU_CLK_40M:
cpuDiv = 4;
break;
default:
cpuDiv = 2;
break;
}
RegValue |= ((wlanDiv*4/cpuDiv)<<8) | (wlanDiv<<4) | cpuDiv;
tls_reg_write32(HR_CLK_DIV_CTL, RegValue);
return;
}
/**
* @brief This function is used to get cpu clock
*
* @param[out] *sysclk point to the addr for system clk output
*
* @return None
*
* @note None
*/
void tls_sys_clk_get(tls_sys_clk *sysclk)
{
u32 value;
value = tls_reg_read32(HR_CLK_DIV_CTL);
sysclk->apbclk = W600_PLL_CLK_MHZ/4/((value>>4)&0x0F);
sysclk->cpuclk = W600_PLL_CLK_MHZ/(value&0x0F);
sysclk->wlanclk = W600_PLL_CLK_MHZ/((value>>4)&0x0F);
}
sdk/Platform/Drivers/dma/wm_dma.c
+405
View File
@@ -0,0 +1,405 @@
/**
* @file wm_dma.c
*
* @brief DMA Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "misc.h"
#include "wm_dma.h"
#include "wm_regs.h"
#include "wm_irq.h"
#include "wm_osal.h"
#include "wm_pmu.h"
static u16 dma_used_bit = 0;
struct tls_dma_channels {
unsigned char channels[8]; /* list of channels */
};
typedef void (*dma_irq_callback)(void *p);
struct dma_irq_context {
u8 flags;
dma_irq_callback burst_done_pf;
void *burst_done_priv;
dma_irq_callback transfer_done_pf;
void *transfer_done_priv;
};
static struct dma_irq_context dma_context[8];
static struct tls_dma_channels channels;
extern void wm_delay_ticks(uint32_t ticks);
static void dma_irq_proc(void *p)
{
unsigned char ch;
unsigned int int_src;
ch = (unsigned char)(unsigned long)p;
int_src = tls_reg_read32(HR_DMA_INT_SRC);
if (ch > 3)
{
for (ch = 4; ch < 8; ch++)
{
if (int_src & (TLS_DMA_IRQ_BOTH_DONE << ch * 2))
break;
}
if (8 == ch)
return;
}
if ((int_src & (TLS_DMA_IRQ_BOTH_DONE << ch * 2)) &&
(TLS_DMA_IRQ_BOTH_DONE == dma_context[ch].flags))
{
tls_dma_irq_clr(ch, TLS_DMA_IRQ_BOTH_DONE);
if (dma_context[ch].burst_done_pf)
dma_context[ch].burst_done_pf(dma_context[ch].burst_done_priv);
}
else if ((int_src & (TLS_DMA_IRQ_BURST_DONE << ch * 2)) &&
(TLS_DMA_IRQ_BURST_DONE == dma_context[ch].flags))
{
tls_dma_irq_clr(ch, TLS_DMA_IRQ_BOTH_DONE);
if (dma_context[ch].burst_done_pf)
dma_context[ch].burst_done_pf(dma_context[ch].burst_done_priv);
}
else if ((int_src & (TLS_DMA_IRQ_TRANSFER_DONE << ch * 2)) &&
(TLS_DMA_IRQ_TRANSFER_DONE == dma_context[ch].flags))
{
tls_dma_irq_clr(ch, TLS_DMA_IRQ_BOTH_DONE);
if (dma_context[ch].transfer_done_pf)
dma_context[ch].transfer_done_pf(dma_context[ch].transfer_done_priv);
}
return;
}
void DMA_Channel0_IRQHandler(void)
{
dma_irq_proc((void *)0);
}
void DMA_Channel1_IRQHandler(void)
{
dma_irq_proc((void *)1);
}
void DMA_Channel2_IRQHandler(void)
{
dma_irq_proc((void *)2);
}
void DMA_Channel3_IRQHandler(void)
{
dma_irq_proc((void *)3);
}
void DMA_Channel4_7_IRQHandler(void)
{
dma_irq_proc((void *)4);
}
/**
* @brief This function is used to clear dma interrupt flag.
*
* @param[in] ch Channel no.[0~7]
* @param[in] flags Flags setted to TLS_DMA_IRQ_BURST_DONE, TLS_DMA_IRQ_TRANSFER_DONE, TLS_DMA_IRQ_BOTH_DONE.
*
* @return None
*
* @note None
*/
void tls_dma_irq_clr(unsigned char ch, unsigned char flags)
{
unsigned int int_src = 0;
int_src |= flags << 2 * ch;
tls_reg_write32(HR_DMA_INT_SRC, int_src);
return;
}
/**
* @brief This function is used to register dma interrupt callback function.
*
* @param[in] ch Channel no.[0~7]
* @param[in] callback is the dma interrupt call back function.
* @param[in] arg the param of the callback function.
* @param[in] flags Flags setted to TLS_DMA_IRQ_BURST_DONE, TLS_DMA_IRQ_TRANSFER_DONE, TLS_DMA_IRQ_BOTH_DONE.
*
* @return None
*
* @note None
*/void tls_dma_irq_register(unsigned char ch, void (*callback)(void *p), void *arg, unsigned char flags)
{
unsigned int mask;
mask = tls_reg_read32(HR_DMA_INT_MASK);
mask |= TLS_DMA_IRQ_BOTH_DONE << 2 * ch;
mask &= ~(flags << 2 * ch);
tls_reg_write32(HR_DMA_INT_MASK, mask);
dma_context[ch].flags = flags;
if (flags & TLS_DMA_IRQ_BURST_DONE)
{
dma_context[ch].burst_done_pf = callback;
dma_context[ch].burst_done_priv = arg;
}
if (flags & TLS_DMA_IRQ_TRANSFER_DONE)
{
dma_context[ch].transfer_done_pf = callback;
dma_context[ch].transfer_done_priv = arg;
}
if (ch > 3)
ch = 4;
tls_irq_enable(DMA0_INT + ch);
return;
}
/**
* @brief This function is used to Wait until DMA operation completes
*
* @param[in] ch channel no
*
* @retval 0 completed
* @retval -1 failed
*
* @note None
*/
int tls_dma_wait_complt(unsigned char ch)
{
unsigned long timeout = 0;
while(DMA_CHNLCTRL_REG(ch) & DMA_CHNL_CTRL_CHNL_ON)
{
tls_os_time_delay(1);
timeout ++;
if(timeout > 500)
return -1;
}
return 0;
}
/**
* @brief This function is used to Start the DMA controller by Wrap
*
* @param[in] ch channel no
* @param[in] dma_desc pointer to DMA channel descriptor structure
* @param[in] auto_reload does restart when current transfer complete
* @param[in] src_zize dource address size
* @param[in] dest_zize destination address size
*
* @retval 1 success
* @retval 0 failed
*
* @note
* DMA Descriptor:
* +--------------------------------------------------------------+
* |Vld[31] | RSV |
* +--------------------------------------------------------------+
* | RSV | Dma_Ctrl[16:0] |
* +--------------------------------------------------------------+
* | Src_Addr[31:0] |
* +--------------------------------------------------------------+
* | Dest_Addr[31:0] |
* +--------------------------------------------------------------+
* | Next_Desc_Add[31:0] |
* +--------------------------------------------------------------+
*/
unsigned char tls_dma_start_by_wrap(unsigned char ch, struct tls_dma_descriptor *dma_desc,
unsigned char auto_reload,
unsigned short src_zize,
unsigned short dest_zize)
{
if((ch > 7) && !dma_desc) return 1;
DMA_SRCWRAPADDR_REG(ch) = dma_desc->src_addr;
DMA_DESTWRAPADDR_REG(ch) = dma_desc->dest_addr;
DMA_WRAPSIZE_REG(ch) = (dest_zize << 16) | src_zize;
DMA_CTRL_REG(ch) = ((dma_desc->dma_ctrl & 0x1ffff) << 1) | (auto_reload ? 0x1: 0x0);
DMA_CHNLCTRL_REG(ch) |= DMA_CHNL_CTRL_CHNL_ON;
return 0;
}
/**
* @brief This function is used to Start the DMA controller
*
* @param[in] ch channel no
* @param[in] dma_desc pointer to DMA channel descriptor structure
* @param[in] auto_reload does restart when current transfer complete
*
* @retval 0 success
* @retval 1 failed
*
* @note
* DMA Descriptor:
* +--------------------------------------------------------------+
* |Vld[31] | RSV |
* +--------------------------------------------------------------+
* | RSV | Dma_Ctrl[16:0] |
* +--------------------------------------------------------------+
* | Src_Addr[31:0] |
* +--------------------------------------------------------------+
* | Dest_Addr[31:0] |
* +--------------------------------------------------------------+
* | Next_Desc_Add[31:0] |
* +--------------------------------------------------------------+
*/
unsigned char tls_dma_start(unsigned char ch, struct tls_dma_descriptor *dma_desc, unsigned char auto_reload)
{
if((ch > 7) && !dma_desc) return 1;
if ((dma_used_bit &(1<<ch)) == 0)
{
dma_used_bit |= (1<<ch);
}
DMA_SRCADDR_REG(ch) = dma_desc->src_addr;
DMA_DESTADDR_REG(ch) = dma_desc->dest_addr;
DMA_CTRL_REG(ch) = ((dma_desc->dma_ctrl & 0x7fffff) << 1) | (auto_reload ? 0x1: 0x0);
DMA_CHNLCTRL_REG(ch) |= DMA_CHNL_CTRL_CHNL_ON;
return 0;
}
/**
* @brief This function is used to To stop current DMA channel transfer
*
* @param[in] ch channel no. to be stopped
*
* @retval 0 success
* @retval 1 failed
*
* @note
* If channel stop, DMA_CHNL_CTRL_CHNL_ON bit in DMA_CHNLCTRL_REG is cleared.
*/
unsigned char tls_dma_stop(unsigned char ch)
{
if(ch > 7) return 1;
if(DMA_CHNLCTRL_REG(ch) & DMA_CHNL_CTRL_CHNL_ON)
{
DMA_CHNLCTRL_REG(ch) |= DMA_CHNL_CTRL_CHNL_OFF;
while(DMA_CHNLCTRL_REG(ch) & DMA_CHNL_CTRL_CHNL_ON);
}
return 0;
}
/**
* @brief This function is used to Request a free dma channel
*
* @param[in] ch channel no.
* @param[in] flags flags setted to selected channel
*
* @return Channel no. that is free now
*
* @note
* If ch is 0, the function will select a random free channel,
* else return the selected channel no.
*/
unsigned char tls_dma_request(unsigned char ch, unsigned char flags)
{
unsigned char freeCh = 0;
int i = 0;
if (ch == 0)
{
for (i = 0; i < 8; i++)
{
if (!(channels.channels[i] & TLS_DMA_FLAGS_CHANNEL_VALID))
{
freeCh = i;
break;
}
}
if (8 == i)
{
printf("!!!there is no free DMA channel.!!!\n");
freeCh = 0;
}
}
else if ((ch >0) && (ch < 8))
{
if (!(channels.channels[ch] & TLS_DMA_FLAGS_CHANNEL_VALID))
{
freeCh = ch;
}
else
{
printf("!!!there is no free DMA channel.!!!\n");
freeCh = 0;
}
}
//if(freeCh != 0)
{
channels.channels[freeCh] = flags | TLS_DMA_FLAGS_CHANNEL_VALID;
DMA_MODE_REG(freeCh) = flags;
}
if (dma_used_bit == 0)
{
tls_open_peripheral_clock(TLS_PERIPHERAL_TYPE_DMA);
}
dma_used_bit |= (1<<freeCh);
return freeCh;
}
/**
* @brief This function is used to Free the DMA channel when not use
*
* @param[in] ch channel no. that is ready to free
*
* @return None
*
* @note None
*/
void tls_dma_free(unsigned char ch)
{
if(ch < 8)
{
tls_dma_stop(ch);
DMA_SRCADDR_REG(ch) = 0;
DMA_DESTADDR_REG(ch) = 0;
DMA_MODE_REG(ch) = 0;
DMA_CTRL_REG(ch) = 0;
// DMA_INTSRC_REG = 0xffff;
DMA_INTSRC_REG |= 0x03<<(ch*2);
channels.channels[ch] = 0x00;
dma_used_bit &= ~(1<<ch);
if (dma_used_bit == 0)
{
tls_close_peripheral_clock(TLS_PERIPHERAL_TYPE_DMA);
}
}
}
/**
* @brief This function is used to Initialize DMA Control
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_dma_init(void)
{
DMA_INTMASK_REG = 0xffff;
DMA_INTSRC_REG = 0xffff;
}
sdk/Platform/Drivers/efuse/wm_efuse.c
+644
View File
@@ -0,0 +1,644 @@
/**************************************************************************
* File Name : tls_efuse.c
* Author :
* Version :
* Date :
* Description : Use Flash Addr as virtual efuse
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
* All rights reserved.
*
***************************************************************************/
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "wm_debug.h"
#include "wm_regs.h"
#include "wm_efuse.h"
#include "wm_config.h"
#include "list.h"
#include "wm_internal_flash.h"
#include "wm_crypto_hard.h"
#include "wm_timer.h"
#include "wm_cpu.h"
#include "wm_irq.h"
#include "wm_flash_map.h"
#include "wm_mem.h"
extern void flashSRRW(unsigned long offset,unsigned char *buf,unsigned long sz, unsigned char *backbuf, unsigned int backlen, unsigned int rd);
#define FT_MAGICNUM_ADDR (FLASH_BASE_ADDR)
#define MAGICNUM_LEN (4)
#define FT_CHECKSUM_ADDR (FT_MAGICNUM_ADDR + MAGICNUM_LEN)
#define CHECKSUM_LEN (4)
#define FT_DATALEN_ADDR (FT_CHECKSUM_ADDR + CHECKSUM_LEN)
#define FT_DATALEN_LEN (4)
#define FT_MAC_ADDR (FT_DATALEN_ADDR + FT_DATALEN_LEN)
#define MAC_ADDR_LEN (8)
#define FT_TX_DC_OFFSET_ADDR (FT_MAC_ADDR + MAC_ADDR_LEN)
#define TX_DC_OFFSET_LEN (4)
#define FT_RX_DC_OFFSET_ADDR (FT_TX_DC_OFFSET_ADDR + TX_DC_OFFSET_LEN)
#define RX_DC_OFFSET_LEN (4)
#define FT_TX_IQ_GAIN_ADDR (FT_RX_DC_OFFSET_ADDR + RX_DC_OFFSET_LEN)
#define TX_IQ_GAIN_LEN (4)
#define FT_RX_IQ_GAIN_ADDR (FT_TX_IQ_GAIN_ADDR + TX_IQ_GAIN_LEN)
#define RX_IQ_GAIN_LEN (4)
#define FT_TX_IQ_PHASE_ADDR (FT_RX_IQ_GAIN_ADDR + RX_IQ_GAIN_LEN)
#define TX_IQ_PHASE_LEN (4)
#define FT_RX_IQ_PHASE_ADDR (FT_TX_IQ_PHASE_ADDR + TX_IQ_PHASE_LEN)
#define RX_IQ_PHASE_LEN (4)
#define FT_GAIN_ADDR (FT_RX_IQ_PHASE_ADDR + RX_IQ_PHASE_LEN)
#define FT_GAIN_LEN (84)
#define FT_FIX_DATA_LEN (MAC_ADDR_LEN + TX_DC_OFFSET_LEN + RX_DC_OFFSET_LEN + TX_IQ_GAIN_LEN + RX_IQ_GAIN_LEN \
+ TX_IQ_PHASE_LEN \
+ RX_IQ_PHASE_LEN)
/* key paramater area -- begin -- */
/** PHY parameter area **/
#define PHY_BASE_ADDR (FLASH_BASE_ADDR)
#define PHY_AREA_LEN (0x1000)
/** QFlash parameter area **/
#define QFLASH_BASE_ADDR (PHY_BASE_ADDR + PHY_AREA_LEN)
#define QFLASH_AREA_LEN (0x1000)
#define QFLASH_HDR_BASE_ADDR (QFLASH_BASE_ADDR)
#define QFLASH_HDR_LEN (12)
#define QFLASH_Sec_Level_BASE_ADDR (QFLASH_HDR_BASE_ADDR + QFLASH_HDR_LEN)
#define QFLASH_Sec_Level_LEN (4)
#define QFLASH_CHIP_ID_BASE_ADDR (QFLASH_Sec_Level_BASE_ADDR + QFLASH_Sec_Level_LEN)
#define QFLASH_CHIP_ID_LEN (16)
/* key parameter area -- end -- */
typedef struct FT_PARAM
{
unsigned int magic_no;
unsigned int checksum;
unsigned int data_len;
unsigned char mac_addr[MAC_ADDR_LEN];
unsigned int tx_dcoffset;
unsigned int rx_dcoffset;
unsigned int tx_iq_gain;
unsigned int rx_iq_gain;
unsigned int tx_iq_phase;
unsigned int rx_iq_phase;
unsigned char tx_gain[FT_GAIN_LEN];
}FT_PARAM_ST;
static u8 default_mac[6] = {0x00,0x25,0x08,0x09,0x01,0x0F};
FT_PARAM_ST gftParam;
int tls_ft_param_init(void)
{
int i = 0;
int usedcnt[2] = {0, 0};
u32 crcvalue = 0;
psCrcContext_t ctx;
u8 *pmem = NULL;
FT_PARAM_ST *pft = NULL;
if (gftParam.magic_no == SIGNATURE_WORD)
{
return TRUE;
}
pmem = tls_mem_alloc(512);
if (pmem == NULL)
{
return FALSE;
}
pft = tls_mem_alloc(sizeof(FT_PARAM_ST));
if (pft == NULL)
{
return FALSE;
}
for (i = 0; i < 2; i++)
{
if (i == 0)
{
tls_fls_read(FT_MAGICNUM_ADDR, (unsigned char *)pft, sizeof(FT_PARAM_ST));
}else{
flashSRRW(0, (unsigned char *)pft, sizeof(FT_PARAM_ST), pmem, 256, 1);
}
if (pft->magic_no == SIGNATURE_WORD)
{
tls_crypto_init();
tls_crypto_crc_init(&ctx, 0xFFFFFFFF, CRYPTO_CRC_TYPE_32, INPUT_REFLECT | OUTPUT_REFLECT);
tls_crypto_crc_update(&ctx, (unsigned char *)pft + 12, sizeof(FT_PARAM_ST) - 12);
tls_crypto_crc_final(&ctx, &crcvalue);
if ((pft->checksum != crcvalue))
{
usedcnt[i] = -1;
continue;
}
if (gftParam.magic_no != SIGNATURE_WORD)
{
memcpy(&gftParam, pft, sizeof(FT_PARAM_ST));
}
}else{
usedcnt[i] = -1;
}
}
if ((usedcnt[0] + usedcnt[1]) == -2)
{
/*Use default ft param*/
}
else if (usedcnt[0] < 0) /*flash param destroyed*/
{
tls_flash_unlock();
tls_fls_write(FT_MAGICNUM_ADDR, (unsigned char *)&gftParam, sizeof(gftParam));
tls_flash_lock();
}
else if (usedcnt[1] < 0) /*SR param destroyed*/
{
flashSRRW(0, (unsigned char *)&gftParam, sizeof(FT_PARAM_ST), pmem, 256, 0);
}
else
{
if (gftParam.checksum != pft->checksum)
{
flashSRRW(0, (unsigned char *)&gftParam, sizeof(FT_PARAM_ST), pmem, 256, 0);
}
}
tls_mem_free(pmem);
tls_mem_free(pft);
return TRUE;
}
int tls_ft_param_get(unsigned int opnum, void *data, unsigned int rdlen)
{
//FT_PARAM_ST ft;
//tls_fls_read(FT_MAGICNUM_ADDR, (unsigned char *)&ft, sizeof(ft));
switch (opnum)
{
case CMD_MAC: /*MAC*/
if ((gftParam.mac_addr[0]&0x1)
||(0 == (gftParam.mac_addr[0]|gftParam.mac_addr[1]|gftParam.mac_addr[2]|gftParam.mac_addr[3]|gftParam.mac_addr[4]|gftParam.mac_addr[5])))
{
memcpy(data, default_mac, rdlen);
}
else
{
memcpy(data, gftParam.mac_addr, rdlen);
}
break;
case CMD_TX_DC: /*tx_dcoffset*/
*(unsigned int *)data = gftParam.tx_dcoffset;
break;
case CMD_RX_DC: /*rx_dcoffset*/
*(unsigned int *)data = gftParam.rx_dcoffset;
break;
case CMD_TX_IQ_GAIN:
*(unsigned int *)data = gftParam.tx_iq_gain;
break;
case CMD_RX_IQ_GAIN:
*(unsigned int *)data = gftParam.rx_iq_gain;
break;
case CMD_TX_IQ_PHASE:
*(unsigned int *)data = gftParam.tx_iq_phase;
break;
case CMD_RX_IQ_PHASE:
*(unsigned int *)data = gftParam.rx_iq_phase;
break;
case CMD_TX_GAIN: /*gain*/
if (rdlen < FT_GAIN_LEN)
{
memcpy(data, gftParam.tx_gain, rdlen);
}
else
{
memcpy(data, gftParam.tx_gain, FT_GAIN_LEN);
}
break;
default:
return -1;
}
return 0;
}
int tls_ft_param_set(unsigned int opnum, void *data, unsigned int len)
{
psCrcContext_t ctx;
unsigned int writelen = 0;
u8 *pmem = NULL;
if (!data || !len)
{
return -1;
}
//tls_fls_read(FT_MAGICNUM_ADDR, (unsigned char *)&gftParam, sizeof(gftParam));
switch (opnum)
{
case CMD_MAC: /*MAC*/
memcpy(gftParam.mac_addr, (unsigned char *)data, len);
break;
case CMD_TX_DC: /*tx_dcoffset*/
gftParam.tx_dcoffset = *(unsigned int *)data;
break;
case CMD_RX_DC: /*rx_dcoffset*/
gftParam.rx_dcoffset = *(unsigned int *)data;
break;
case CMD_TX_IQ_GAIN:
gftParam.tx_iq_gain = *(unsigned int *)data;
break;
case CMD_RX_IQ_GAIN:
gftParam.rx_iq_gain = *(unsigned int *) data;
break;
case CMD_TX_IQ_PHASE:
gftParam.tx_iq_phase = *(unsigned int *)data;
break;
case CMD_RX_IQ_PHASE:
gftParam.rx_iq_phase = *(unsigned int *) data;
break;
case CMD_TX_GAIN: /*gain*/
if (len >= FT_GAIN_LEN)
{
writelen = FT_GAIN_LEN;
}
else
{
writelen = len;
}
memcpy(gftParam.tx_gain, data, writelen);
break;
default:
return -1;
}
tls_crypto_init();
tls_crypto_crc_init(&ctx, 0xFFFFFFFF, CRYPTO_CRC_TYPE_32, INPUT_REFLECT | OUTPUT_REFLECT);
gftParam.magic_no = SIGNATURE_WORD;
tls_crypto_crc_update(&ctx, (unsigned char *)&gftParam + 12, sizeof(gftParam) -12);
tls_crypto_crc_final(&ctx, &gftParam.checksum);
tls_flash_unlock();
tls_fls_write(FT_MAGICNUM_ADDR, (unsigned char *)&gftParam, sizeof(gftParam));
tls_flash_lock();
pmem = tls_mem_alloc(512);
if (pmem)
{
flashSRRW(0, (unsigned char *)&gftParam, sizeof(gftParam), pmem, 512, 0);
tls_mem_free(pmem);
}
return 0;
}
/**********************************************************************************************************
* Description: This function is used to get mac addr.
*
* Arguments : mac mac addr,6 byte
*
* Returns : TLS_EFUSE_STATUS_OK get success
* TLS_EFUSE_STATUS_EIO get failed
**********************************************************************************************************/
int tls_get_mac_addr(u8 *mac)
{
return tls_ft_param_get(CMD_MAC, mac, 6);
}
/**********************************************************************************************************
* Description: This function is used to set mac addr.
*
* Arguments : mac mac addr,6 byte
*
* Returns : TLS_EFUSE_STATUS_OK get success
* TLS_EFUSE_STATUS_EIO get failed
**********************************************************************************************************/
int tls_set_mac_addr(u8 *mac)
{
return tls_ft_param_set(CMD_MAC, mac, 6);
}
/**********************************************************************************************************
* Description: This function is used to get tx lod.
*
* Arguments : *txlo
*
* Returns : 0 get success
* -1 get failed
**********************************************************************************************************/
int tls_get_tx_lo(u8 *txlo)
{
return tls_ft_param_get(CMD_TX_DC, txlo, 4);
}
/**********************************************************************************************************
* Description: This function is used to set tx lo.
*
* Arguments : txlo
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_set_tx_lo(u8 *txlo)
{
return tls_ft_param_set(CMD_TX_DC, txlo, 4);
}
/**********************************************************************************************************
* Description: This function is used to get tx iq gain.
*
* Arguments : txGain
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_get_tx_iq_gain(u8 *txGain)
{
return tls_ft_param_get(CMD_TX_IQ_GAIN, txGain, 4);
}
/**********************************************************************************************************
* Description: This function is used to set tx iq gain.
*
* Arguments : txGain
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_set_tx_iq_gain(u8 *txGain)
{
return tls_ft_param_set(CMD_TX_IQ_GAIN, txGain, 4);
}
/**********************************************************************************************************
* Description: This function is used to get rx iq gain.
*
* Arguments : rxGain
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_get_rx_iq_gain(u8 *rxGain)
{
return tls_ft_param_get(CMD_RX_IQ_GAIN, rxGain, 4);
}
/**********************************************************************************************************
* Description: This function is used to set rx iq gain.
*
* Arguments : rxGain
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_set_rx_iq_gain(u8 *rxGain)
{
return tls_ft_param_set(CMD_RX_IQ_GAIN, rxGain, 4);
}
/**********************************************************************************************************
* Description: This function is used to get tx iq phase.
*
* Arguments : txPhase
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_get_tx_iq_phase(u8 *txPhase)
{
return tls_ft_param_get(CMD_TX_IQ_PHASE, txPhase, 4);
}
/**********************************************************************************************************
* Description: This function is used to set tx iq phase.
*
* Arguments : txPhase
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_set_tx_iq_phase(u8 *txPhase)
{
return tls_ft_param_set(CMD_TX_IQ_PHASE, txPhase, 4);
}
/**********************************************************************************************************
* Description: This function is used to get rx iq phase.
*
* Arguments : rxPhase
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_get_rx_iq_phase(u8 *rxPhase)
{
return tls_ft_param_get(CMD_RX_IQ_PHASE, rxPhase, 4);
}
/**********************************************************************************************************
* Description: This function is used to set tx iq phase.
*
* Arguments : rxPhase
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_set_rx_iq_phase(u8 *rxPhase)
{
return tls_ft_param_set(CMD_RX_IQ_PHASE, rxPhase, 4);
}
int tls_freq_err_op(u8 *freqerr, u8 flag)
{
tls_flash_unlock();
if (flag){
tls_fls_write(FT_MAGICNUM_ADDR + sizeof(FT_PARAM_ST), freqerr, 4);
}
else
{
tls_fls_read(FT_MAGICNUM_ADDR + sizeof(FT_PARAM_ST), freqerr, 4);
}
tls_flash_lock();
return TLS_EFUSE_STATUS_OK;
}
int tls_rf_vcg_ctrl_op(u8 *vcg, u8 flag)
{
tls_flash_unlock();
if (flag){
tls_fls_write(VCG_ADDR, vcg, VCG_LEN);
}
else
{
tls_fls_read(VCG_ADDR, vcg, VCG_LEN);
}
tls_flash_lock();
return TLS_EFUSE_STATUS_OK;
}
/**********************************************************************************************************
* Description: This function is used to get tx gain.
*
* Arguments : txgain tx gain
*
* Returns : 0 get success
* -1 get failed
**********************************************************************************************************/
int tls_get_tx_gain(u8 *txgain)
{
return tls_ft_param_get(CMD_TX_GAIN, txgain, TX_GAIN_LEN);
}
/**********************************************************************************************************
* Description: This function is used to set tx gain.
*
* Arguments : txgain tx gain
*
* Returns : 0 set success
* -1 set failed
**********************************************************************************************************/
int tls_set_tx_gain(u8 *txgain)
{
return tls_ft_param_set(CMD_TX_GAIN, txgain, TX_GAIN_LEN);
}
/**********************************************************************************************************
* Description: This function is used to get uuid
*
* Arguments : *uuid
*
* Returns : 0 get success
* -1 get failed
**********************************************************************************************************/
int tls_get_uuid(u8 *uuid, u8 len)
{
u8 *pmem = NULL;
if (uuid)
{
pmem = tls_mem_alloc(512);
if (pmem == NULL)
{
return TLS_EFUSE_STATUS_ERR;
}
flashSRRW(256, (unsigned char *)pmem, len, pmem, 512, 1);
memcpy(uuid, &pmem[0], len);
tls_mem_free(pmem);
pmem = NULL;
return TLS_EFUSE_STATUS_OK;
}
return TLS_EFUSE_STATUS_ERR;
}
/**********************************************************************************************************
* Description: This function is used to get uuid
*
* Arguments : *uuid :data to be written to otp area
* len : data len to be written
* iflock : if lock the otp area,1-lock, once lock,can not unlock!!!
*
* Returns : 0 get success
* -1 get failed
**********************************************************************************************************/
int tls_set_uuid(u8 *uuid, u8 len, u8 iflock)
{
u8 *pmem = NULL;
if (uuid)
{
pmem = tls_mem_alloc(512);
if (pmem == NULL)
{
return TLS_EFUSE_STATUS_ERR;
}
flashSRRW(256, (unsigned char *)uuid, len, pmem, 512, 0);
if (iflock)
{
writeSRLockBit(2);
}
tls_mem_free(pmem);
pmem = NULL;
return TLS_EFUSE_STATUS_OK;
}
return TLS_EFUSE_STATUS_ERR;
}
#define FF_n16 0xff, 0xff, 0xff, 0xff, \
0xff, 0xff, 0xff, 0xff, \
0xff, 0xff, 0xff, 0xff, \
0xff, 0xff, 0xff, 0xff
int tls_get_chipid(u8 chip_id[QFLASH_CHIP_ID_LEN])
{
int ret = 0;
static u8 _chip_id[QFLASH_CHIP_ID_LEN] = { FF_n16 };
u8 zero[QFLASH_CHIP_ID_LEN] = { FF_n16 };
if (!memcmp(_chip_id, zero, QFLASH_CHIP_ID_LEN))
{
ret = tls_fls_read(QFLASH_CHIP_ID_BASE_ADDR, _chip_id, QFLASH_CHIP_ID_LEN);
}
if (0 == ret)
{
memcpy(chip_id, _chip_id, QFLASH_CHIP_ID_LEN);
}
return ret;
}
#undef FF_n16
unsigned int tls_sleep(unsigned int seconds)
{
int ret = 0;
ret = tls_msleep(seconds * 1000);
return ret;
}
int tls_msleep(unsigned int msec)
{
int ret = 0;
ret = tls_delay_via_timer(msec, TIMER_MS_UNIT_FLAG);
return ret;
}
int tls_usleep(unsigned int /*useconds_t*/ usec)
{
int ret = 0;
ret = tls_delay_via_timer(usec, TIMER_US_UNIT_FLAG);
return ret;
}
sdk/Platform/Drivers/flash/wm_fls.c
+577
View File
@@ -0,0 +1,577 @@
/**
* @file wm_fls.c
*
* @brief flash Driver Module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "list.h"
#include "wm_hostspi.h"
#include "wm_flash.h"
#include "wm_dbg.h"
#include "wm_mem.h"
#include "wm_fls_gd25qxx.h"
static struct tls_fls *spi_fls = NULL;
int tls_spifls_read_id(u32 * id)
{
u32 cmd;
int err;
cmd = FLS_CMD_READ_DEV_ID;
*id = 0;
err = tls_spi_read_with_cmd((const u8 *) &cmd, 4, (u8 *) id, 3);
if (err != TLS_SPI_STATUS_OK)
{
TLS_DBGPRT_ERR("flash read ID fail(%d)!\n", err);
return TLS_FLS_STATUS_EIO;
}
TLS_DBGPRT_FLASH_INFO("flash ID - 0x%x.\n", *id);
return TLS_FLS_STATUS_OK;
}
/**
* @brief This function is used to read data from the flash.
*
* @param[in] addr is byte offset addr for read from the flash.
* @param[in] buf is user for data buffer of flash read
* @param[in] len is byte length for read.
*
* @retval TLS_FLS_STATUS_OK if read sucsess
* @retval TLS_FLS_STATUS_EIO if read fail
* @retval TLS_FLS_STATUS_EPERM if flash driver module not beed installed
* @retval TLS_FLS_STATUS_ENODRV if the current spi flash driver not installed
* @retval TLS_FLS_STATUS_EINVAL if parameter error
*
* @note None
*/
int tls_spifls_read(u32 addr, u8 * buf, u32 len)
{
int err;
u32 read_bytes;
struct tls_fls_drv *drv;
if (spi_fls == NULL)
{
TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
return TLS_FLS_STATUS_EPERM;
}
if (spi_fls->current_drv == NULL)
{
TLS_DBGPRT_ERR("the current spi flash driver not installed!\n");
return TLS_FLS_STATUS_ENODRV;
}
if ((addr >= spi_fls->current_drv->total_size) || (len == 0)
|| (buf == NULL))
{
return TLS_FLS_STATUS_EINVAL;
}
tls_os_sem_acquire(spi_fls->fls_lock, 0);
drv = spi_fls->current_drv;
read_bytes =
((addr + len) > drv->total_size) ? (drv->total_size - addr) : len;
err = TLS_FLS_STATUS_OK;
err = drv->read(addr, buf, read_bytes);
tls_os_sem_release(spi_fls->fls_lock);
return err;
}
int tls_spifls_fast_read(u32 addr, u8 * buf, u32 len)
{
int err;
u32 read_bytes;
struct tls_fls_drv *drv;
if (spi_fls == NULL)
{
TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
return TLS_FLS_STATUS_EPERM;
}
if (spi_fls->current_drv == NULL)
{
TLS_DBGPRT_ERR("the current spi flash driver not installed!\n");
return TLS_FLS_STATUS_ENODRV;
}
if ((addr >= spi_fls->current_drv->total_size) || (len == 0)
|| (buf == NULL))
{
return TLS_FLS_STATUS_EINVAL;
}
if ((spi_fls->current_drv->flags & TLS_FLS_FLAG_FAST_READ) !=
TLS_FLS_FLAG_FAST_READ)
{
return TLS_FLS_STATUS_ENOSUPPORT;
}
drv = spi_fls->current_drv;
read_bytes =
((addr + len) > drv->total_size) ? (drv->total_size - addr) : len;
err = TLS_FLS_STATUS_OK;
err = drv->fast_read(addr, buf, read_bytes);
return err;
}
int tls_spifls_page_write(u32 page, u8 * buf, u32 page_cnt)
{
int err;
u32 write_pages;
u32 i;
struct tls_fls_drv *drv;
if (spi_fls == NULL)
{
TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
return TLS_FLS_STATUS_EPERM;
}
if (spi_fls->current_drv == NULL)
{
TLS_DBGPRT_ERR("the current spi flash driver not installed!\n");
return TLS_FLS_STATUS_ENODRV;
}
if ((page >= (spi_fls->current_drv->total_size / spi_fls->current_drv->page_size))
|| (page_cnt == 0) || (buf == NULL))
{
return TLS_FLS_STATUS_EINVAL;
}
drv = spi_fls->current_drv;
write_pages = ((page + page_cnt) > (drv->total_size / drv->page_size)) ?
((drv->total_size / drv->page_size) -page) : page_cnt;
err = TLS_FLS_STATUS_OK;
for (i = 0; i < write_pages; i++)
{
err = drv->page_write(page + i, buf + i * drv->page_size);
if (err != TLS_FLS_STATUS_OK)
{
TLS_DBGPRT_ERR("flash page write fail(page %d)!\n", (page + i));
break;
}
}
return err;
}
/**
* @brief This function is used to write data to the flash.
*
* @param[in] addr is byte offset addr for write to the flash
* @param[in] buf is the data buffer want to write to flash
* @param[in] len is the byte length want to write
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
* @retval TLS_FLS_STATUS_ENOMEM if memory allocation fail
*
* @note None
*/
int tls_spifls_write(u32 addr, u8 * buf, u32 len)
{
u8 *cache;
int err;
u32 sector_addr;
u32 sector_off;
u32 sector_remain;
u32 cntforFF;
u32 write_bytes;
u32 write_page = 0;
u32 i;
struct tls_fls_drv *drv;
if (spi_fls == NULL)
{
TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
return TLS_FLS_STATUS_EPERM;
}
if (spi_fls->current_drv == NULL)
{
TLS_DBGPRT_ERR("the current spi flash driver not installed!\n");
return TLS_FLS_STATUS_ENODRV;
}
if ((addr >= spi_fls->current_drv->total_size) || (len == 0)
|| (buf == NULL))
{
return TLS_FLS_STATUS_EINVAL;
}
tls_os_sem_acquire(spi_fls->fls_lock, 0);
drv = spi_fls->current_drv;
err = TLS_FLS_STATUS_OK;
cache = tls_mem_alloc(drv->sector_size);
if (cache == NULL)
{
tls_os_sem_release(spi_fls->fls_lock);
TLS_DBGPRT_ERR("allocate sector cache memory(%dB) fail!\n",
drv->sector_size);
return TLS_FLS_STATUS_ENOMEM;
}
sector_addr = addr / drv->sector_size; //Section addr
sector_off = (addr % drv->sector_size); //Offset in section
sector_remain = drv->sector_size - sector_off;
write_bytes = len;
TLS_DBGPRT_FLASH_INFO("write to flash: sector address - %d, sector off - %x.\n", sector_addr,
sector_off);
if(write_bytes <= sector_remain)
{
sector_remain = write_bytes; //Not bigger with remain size in section
}
while (1)
{
TLS_DBGPRT_FLASH_INFO("firstly, read the sector - %d to cache.\n", sector_addr);
err = drv->read(sector_addr * drv->sector_size, cache, drv->sector_size);
if (err != TLS_FLS_STATUS_OK)
{
TLS_DBGPRT_ERR("flash read fail(sector %d)!\n", sector_addr);
break;
}
cntforFF = 0;
for(i = 0; i < sector_remain; i++)
{
if(cache[i + sector_off] == 0xFF)
{
cntforFF++;
}
cache[i + sector_off] = buf[i];
}
//If the flash address to be written is all 0xFF, then erase sector is not necessary;
if( cntforFF != sector_remain)
{
TLS_DBGPRT_FLASH_INFO("second, erase the sector - %d.\n", sector_addr);
err = drv->erase(sector_addr);
if (err != TLS_FLS_STATUS_OK)
{
TLS_DBGPRT_ERR("flash erase fail(sector %d)!\n", sector_addr);
break;
}
}
if( (cntforFF != sector_remain ) || ((sector_off == 0) && (sector_remain == drv->sector_size)))
{
for(i = 0; i < (drv->sector_size / drv->page_size); i++)
{
err = drv->page_write(sector_addr * drv->sector_size / drv->page_size + i, &cache[i * drv->page_size]);
if (err != TLS_FLS_STATUS_OK)
{
TLS_DBGPRT_ERR("flash page write fail(page %d)!\n", i);
tls_mem_free(cache);
tls_os_sem_release(spi_fls->fls_lock);
return err;
}
}
}
else
{
write_page = (sector_off / drv->page_size) == 15 ? 16 : (sector_off + sector_remain) / drv->page_size + 1;
//As long as this sector is not erased in this round, we only program the changed pages instead of all of them.
for(i = (sector_off / drv->page_size); i < write_page; i++)
{
err = drv->page_write(sector_addr * drv->sector_size / drv->page_size + i, &cache[i * drv->page_size]);
if (err != TLS_FLS_STATUS_OK)
{
TLS_DBGPRT_ERR("flash page write fail(page %d)!\n", i);
tls_mem_free(cache);
tls_os_sem_release(spi_fls->fls_lock);
return err;
}
}
}
if(write_bytes == sector_remain)
{
break;
}
else
{
sector_addr++;
sector_off = 0;
buf += sector_remain;
write_bytes -= sector_remain;
if(write_bytes > (drv->sector_size))
sector_remain = drv->sector_size;
else
sector_remain = write_bytes; //Next section will finish
}
}
tls_mem_free(cache);
tls_os_sem_release(spi_fls->fls_lock);
return err;
}
int tls_spifls_erase(u32 sector)
{
int err;
struct tls_fls_drv *drv;
if (spi_fls == NULL)
{
TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
return TLS_FLS_STATUS_EPERM;
}
if (spi_fls->current_drv == NULL)
{
TLS_DBGPRT_ERR("the current spi flash driver not installed!\n");
return TLS_FLS_STATUS_ENODRV;
}
if (sector >= (spi_fls->current_drv->total_size / spi_fls->current_drv->sector_size))
{
TLS_DBGPRT_ERR("the sector to be erase overflow!\n");
return TLS_FLS_STATUS_EINVAL;
}
tls_os_sem_acquire(spi_fls->fls_lock, 0);
drv = spi_fls->current_drv;
err = TLS_FLS_STATUS_OK;
err = drv->erase(sector);
tls_os_sem_release(spi_fls->fls_lock);
return err;
}
int tls_spifls_chip_erase(void)
{
int err;
struct tls_fls_drv *drv;
if (spi_fls == NULL)
{
TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
return TLS_FLS_STATUS_EPERM;
}
if (spi_fls->current_drv == NULL)
{
TLS_DBGPRT_ERR("the current spi flash driver not installed!\n");
return TLS_FLS_STATUS_ENODRV;
}
drv = spi_fls->current_drv;
err = TLS_FLS_STATUS_OK;
err = drv->chip_erase();
return err;
}
int tls_spifls_get_param(u8 type, void *param)
{
int err;
struct tls_fls_drv *drv;
if (spi_fls == NULL)
{
TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
return TLS_FLS_STATUS_EPERM;
}
if (spi_fls->current_drv == NULL)
{
TLS_DBGPRT_ERR("the current spi flash driver not installed!\n");
return TLS_FLS_STATUS_ENODRV;
}
if (param == NULL)
{
return TLS_FLS_STATUS_EINVAL;
}
tls_os_sem_acquire(spi_fls->fls_lock, 0);
drv = spi_fls->current_drv;
err = TLS_FLS_STATUS_OK;
switch (type)
{
case TLS_FLS_PARAM_TYPE_ID:
*((u32 *) param) = drv->id;
break;
case TLS_FLS_PARAM_TYPE_SIZE:
*((u32 *) param) = drv->total_size;
break;
case TLS_FLS_PARAM_TYPE_PAGE_SIZE:
*((u32 *) param) = drv->page_size;
break;
case TLS_FLS_PARAM_TYPE_PROG_SIZE:
*((u32 *) param) = drv->program_size;
break;
case TLS_FLS_PARAM_TYPE_SECTOR_SIZE:
*((u32 *) param) = drv->sector_size;
break;
default:
TLS_DBGPRT_WARNING("invalid parameter ID!\n");
err = TLS_FLS_STATUS_EINVAL;
break;
}
tls_os_sem_release(spi_fls->fls_lock);
return err;
}
int tls_spifls_drv_register(struct tls_fls_drv *fls_drv)
{
u32 cpu_sr;
struct tls_fls_drv *drv;
if (fls_drv == NULL)
{
TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
return TLS_FLS_STATUS_EINVAL;
}
dl_list_for_each(drv, &spi_fls->fls_drvs, struct tls_fls_drv, drv_list)
{
if (drv->id == fls_drv->id)
{
TLS_DBGPRT_WARNING
("corresponding spi flash driver has registered!\n");
return TLS_FLS_STATUS_EEXIST;
}
}
cpu_sr = tls_os_set_critical();
dl_list_add_tail((struct dl_list *) &spi_fls->fls_drvs,
(struct dl_list *) &fls_drv->drv_list);
tls_os_release_critical(cpu_sr);
TLS_DBGPRT_FLASH_INFO("the spi flash driver is registered successfully!\n");
return TLS_FLS_STATUS_OK;
}
int tls_spifls_drv_unregister(struct tls_fls_drv *fls_drv)
{
TLS_DBGPRT_WARNING
("unregister spi flash driver operation is not supported!\n");
return TLS_FLS_STATUS_EPERM;
}
int tls_spifls_probe(void)
{
int err;
u32 id;
struct tls_fls_drv *drv;
if (spi_fls == NULL)
{
TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
return TLS_FLS_STATUS_EPERM;
}
if (spi_fls->current_drv != NULL)
{
TLS_DBGPRT_ERR("the current spi flash has fount the matched driver!\n");
return TLS_FLS_STATUS_EBUSY;
}
TLS_DBGPRT_FLASH_INFO("try to read the current spi flash ID.\n");
err = tls_spifls_read_id(&id);
if (err != TLS_FLS_STATUS_OK)
{
return err;
}
TLS_DBGPRT_FLASH_INFO("current spi flash ID - 0x%x.\n", id);
dl_list_for_each(drv, &spi_fls->fls_drvs, struct tls_fls_drv, drv_list)
{
err = drv->probe(id);
if (err != TLS_FLS_STATUS_OK)
{
return err;
}
tls_spi_setup(drv->mode, drv->cs_active, drv->clock);
TLS_DBGPRT_FLASH_INFO("matched the spi flash driver.\n");
spi_fls->current_drv = drv;
break;
}
if (spi_fls->current_drv == NULL)
{
TLS_DBGPRT_WARNING("not found the matched spi flash driver!\n");
return TLS_FLS_STATUS_ENODRV;
}
return TLS_FLS_STATUS_OK;
}
int tls_spifls_init(void)
{
struct tls_fls *fls;
int err;
if (spi_fls != NULL)
{
TLS_DBGPRT_ERR("flash driver module has been installed!\n");
return TLS_FLS_STATUS_EBUSY;
}
fls = (struct tls_fls *) tls_mem_alloc(sizeof(struct tls_fls));
if (fls == NULL)
{
TLS_DBGPRT_ERR("allocate @spi_fls fail!\n");
return TLS_FLS_STATUS_ENOMEM;
}
memset(fls, 0, sizeof(*fls));
dl_list_init((struct dl_list *) &fls->fls_drvs);
err = tls_os_sem_create(&fls->fls_lock, 1);
if (err != TLS_OS_SUCCESS)
{
tls_mem_free(fls);
TLS_DBGPRT_ERR("create semaphore @fls_lock fail!\n");
return TLS_FLS_STATUS_ENOMEM;
}
spi_fls = fls;
tls_spifls_drv_install();
return TLS_FLS_STATUS_OK;
}
int tls_spifls_exit(void)
{
TLS_DBGPRT_FLASH_INFO("Not support flash driver module uninstalled!\n");
return TLS_FLS_STATUS_EPERM;
}
sdk/Platform/Drivers/flash/wm_fls_gd25qxx.c
+307
View File
@@ -0,0 +1,307 @@
/**
* @file wm_fls_gd25qxx.c
*
* @brief gd25qxx flash Driver Module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#include <stdio.h>
#include <stdlib.h>
#include "wm_type_def.h"
#include "wm_flash.h"
#include "wm_hostspi.h"
#include "wm_fls_gd25qxx.h"
#include "wm_debug.h"
#include "wm_gpio.h"
static int tls_spifls_drv_read(u32 addr, u8 * buf, u32 len);
static int tls_spifls_drv_fast_read(u32 addr, u8 * buf, u32 len);
static int tls_spifls_drv_page_write(u32 page, u8 * buf);
static int tls_spifls_drv_erase(u32 sector);
static int tls_spifls_drv_chip_erase(void);
static int tls_spifls_drv_probe(u32 id);
static void tls_spifls_drv_remove(void);
static struct tls_fls_drv exspi_fls = {
.drv_list = {NULL, NULL},
.clock = SPI_SCLK,
.mode = TLS_SPI_MODE_0,
.cs_active = TLS_SPI_CS_LOW,
.flags = 0,
.read = tls_spifls_drv_read,
.fast_read = tls_spifls_drv_fast_read,
.page_write = tls_spifls_drv_page_write,
.erase = tls_spifls_drv_erase,
.chip_erase = tls_spifls_drv_chip_erase,
.probe = tls_spifls_drv_probe,
.remove = tls_spifls_drv_remove
};
static struct tls_fls_drv *exspifls_drv = NULL;
static unsigned int swap32(unsigned int v)
{
return ((v & 0xff) << 24) | ((v & 0xff00) << 8) |
((v & 0xff0000) >> 8) | (v >> 24);
}
static int tls_spifls_drv_write_enable(void)
{
u8 cmd;
int err;
cmd = EXSPIFLASH_WRITE_ENABLE;
err = tls_spi_write((const u8 *) &cmd, 1);
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
return TLS_FLS_STATUS_OK;
}
static int tls_spifls_drv_wait_write_enable(void)
{
u8 cmd;
u8 sr;
int err;
cmd = EXSPIFLASH_READ_SR1;
sr = 0;
do
{
err = tls_spi_read_with_cmd((const u8 *) &cmd, 1, &sr, 1);
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
if (sr & FLASH_STATUS_WEL)
{
break;
}
}
while (1);
return TLS_FLS_STATUS_OK;
}
static int tls_spifls_drv_wait_flash_ready(void)
{
u8 cmd;
u8 sr;
int err;
cmd = EXSPIFLASH_READ_SR1;
sr = 0;
do
{
err = tls_spi_read_with_cmd((const u8 *) &cmd, 1, &sr, 1);
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
if ((sr & FLASH_STATUS_BUSY) == 0x00)
{
break;
}
}
while (1);
return TLS_FLS_STATUS_OK;
}
static int tls_spifls_drv_read(u32 addr, u8 * buf, u32 len)
{
u32 cmd;
int err;
cmd = 0;
cmd |= EXSPIFLASH_DATA_READ;
cmd |= swap32(addr) & 0xffffff00;
err = tls_spi_read_with_cmd((const u8 *) &cmd, 4, buf, len);
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
return TLS_FLS_STATUS_OK;
}
static int tls_spifls_drv_fast_read(u32 addr, u8 * buf, u32 len)
{
return TLS_FLS_STATUS_ENOSUPPORT;
}
static int tls_spifls_drv_page_write(u32 page, u8 * buf)
{
u32 cmd;
int err;
err = tls_spifls_drv_write_enable();
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
err = tls_spifls_drv_wait_write_enable();
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
cmd = 0;
cmd |= EXSPIFLASH_PAGE_PROGRAM;
cmd |= swap32(page * exspifls_drv->page_size) & 0xffffff00;
err = tls_spi_write_with_cmd((const u8 *) &cmd, 4, (const u8 *) buf,
exspifls_drv->page_size);
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
err = tls_spifls_drv_wait_flash_ready();
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
return TLS_FLS_STATUS_OK;
}
static int tls_spifls_drv_erase(u32 sector)
{
u32 cmd;
int err;
err = tls_spifls_drv_write_enable();
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
err = tls_spifls_drv_wait_write_enable();
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
cmd = 0;
cmd |= EXSPIFLASH_SECTOR_ERASE;
cmd |= swap32(sector * exspifls_drv->sector_size) & 0xffffff00;
err = tls_spi_write((const u8 *) &cmd, 4);
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
tls_os_time_delay(6);
err = tls_spifls_drv_wait_flash_ready();
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
return TLS_FLS_STATUS_OK;
}
static int tls_spifls_drv_chip_erase(void)
{
u8 cmd;
int err;
err = tls_spifls_drv_write_enable();
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
err = tls_spifls_drv_wait_write_enable();
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
cmd = EXSPIFLASH_CHIP_ERASE;
err = tls_spi_write((const u8 *) &cmd, 1);
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
err = tls_spifls_drv_wait_flash_ready();
if (err != TLS_SPI_STATUS_OK)
{
return TLS_FLS_STATUS_EIO;
}
return TLS_FLS_STATUS_OK;
}
static int tls_spifls_drv_probe(u32 id)
{
// int i = 0;
if (!id)
{
return TLS_FLS_STATUS_EINVAL;
}
exspi_fls.id = id;
if ((id>>16)&0xFF)
{
exspi_fls.total_size = 1 << (id>>16);
}else{
exspi_fls.total_size = FLASH_TOTAL_SIZE; /*1MByte*/
}
exspi_fls.page_size = PAGE_SIZE;
exspi_fls.program_size = PROGRAM_SIZE;
exspi_fls.sector_size = SECTOR_SIZE;
exspifls_drv = &exspi_fls;
return TLS_FLS_STATUS_OK;
}
static void tls_spifls_drv_remove(void)
{
exspifls_drv = NULL;
}
/**
* @brief This function is used to install gd25qxx driver.
*
* @param[in] None
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
* @retval TLS_FLS_STATUS_EEXIST if driver is already existed
*
* @note None
*/
int tls_spifls_drv_install(void)
{
int err;
extern int tls_spifls_probe(void);
extern int tls_spifls_drv_register(struct tls_fls_drv *fls_drv);␍
err = tls_spifls_drv_register((struct tls_fls_drv *) &exspi_fls);
if (err == TLS_FLS_STATUS_EEXIST)
{
return err;
}
TLS_DBGPRT_INFO("register the spi flash driver - %d.\n", err);
err = tls_spifls_probe();
TLS_DBGPRT_INFO("probe spi flash - %d.\n", err);
return err;
}
sdk/Platform/Drivers/gpio/wm_gpio.c
+411
View File
@@ -0,0 +1,411 @@
/**
* @file wm_gpio.c
*
* @brief GPIO Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#include "wm_gpio.h"
#include "wm_regs.h"
#include "wm_irq.h"
#include "wm_osal.h"
#include "tls_common.h"
struct gpio_irq_context{
tls_gpio_irq_callback callback;
void *arg;
};
static struct gpio_irq_context gpio_context[WM_IO_PB_30 - WM_IO_PA_00 + 1] = {{0,0}};
void GPIOA_IRQHandler(void)
{
u8 i = 0;
u8 found = 0;
u32 reg = 0;
reg = tls_reg_read32(HR_GPIO_MIS);
for (i = 0; i <= WM_IO_PA_15; i++)
{
if (reg & BIT(i))
{
found = 1;
break;
}
}
if (found)
{
if (NULL != gpio_context[i].callback)
gpio_context[i].callback(gpio_context[i].arg);
}
return;
}
void GPIOB_IRQHandler(void)
{
u8 i = 0;
u8 found = 0;
u32 reg = 0;
reg = tls_reg_read32(HR_GPIO_MIS + TLS_IO_AB_OFFSET);
for (i = WM_IO_PB_00; i <= WM_IO_PB_31; i++)
{
if (reg & BIT(i - WM_IO_PB_00))
{
found = 1;
break;
}
}
if (found)
{
if (NULL != gpio_context[i].callback)
gpio_context[i].callback(gpio_context[i].arg);
}
return;
}
/**
* @brief This function is used to config gpio function
*
* @param[in] gpio_pin gpio pin num
* @param[in] dir gpio direction
* @param[in] attr gpio attribute
*
* @return None
*
* @note
* All gpio's attribute can only be set as WM_GPIO_ATTR_FLOATING or WM_GPIO_ATTR_PULLHIGH on W600/W60X.
*/
void tls_gpio_cfg(enum tls_io_name gpio_pin, enum tls_gpio_dir dir, enum tls_gpio_attr attr)
{
u8 pin;
u16 offset;
if (gpio_pin >= WM_IO_PB_00)
{
pin = gpio_pin - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = gpio_pin;
offset = 0;
}
/* enable gpio function */
tls_io_cfg_set(gpio_pin, WM_IO_OPT5_GPIO);
/* gpio direction */
if (WM_GPIO_DIR_OUTPUT == dir)
{
tls_reg_write32(HR_GPIO_DIR + offset, tls_reg_read32(HR_GPIO_DIR + offset) | BIT(pin)); /* 1 set output */
}
else if (WM_GPIO_DIR_INPUT == dir)
{
tls_reg_write32(HR_GPIO_DIR + offset, tls_reg_read32(HR_GPIO_DIR + offset) & (~BIT(pin))); /* 0 set input */
}
/* gpio pull attribute */
if (WM_GPIO_ATTR_FLOATING == attr)
{
tls_reg_write32(HR_GPIO_PULL_EN + offset, tls_reg_read32(HR_GPIO_PULL_EN + offset) | BIT(pin)); /* 1 disable pull */
}
else if (WM_GPIO_ATTR_PULLHIGH == attr)
{
tls_reg_write32(HR_GPIO_PULL_EN + offset, tls_reg_read32(HR_GPIO_PULL_EN + offset) & (~BIT(pin))); /* 0 enable pull */
}
}
/**
* @brief This function is used to read gpio status
*
* @param[in] gpio_pin gpio pin num
*
* @retval 0 low level
* @retval 1 high level
*
* @note None
*/
u8 tls_gpio_read(enum tls_io_name gpio_pin)
{
u32 reg_en;
u32 reg;
u8 pin;
u16 offset;
if (gpio_pin >= WM_IO_PB_00)
{
pin = gpio_pin - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = gpio_pin;
offset = 0;
}
reg_en = tls_reg_read32(HR_GPIO_DATA_EN + offset);
tls_reg_write32(HR_GPIO_DATA_EN + offset, reg_en | (1 << pin));
reg = tls_reg_read32(HR_GPIO_DATA + offset);
tls_reg_write32(HR_GPIO_DATA_EN + offset, reg_en);
if(reg & (0x1 << pin))
return 1;
else
return 0;
}
/**
* @brief This function is used to modify gpio status
*
* @param[in] gpio_pin gpio pin num
* @param[in] value power level
* 0: low level
* 1: high level
*
* @return None
*
* @note None
*/
void tls_gpio_write(enum tls_io_name gpio_pin, u8 value)
{
u32 cpu_sr = 0;
u32 reg;
u32 reg_en;
u8 pin;
u16 offset;
if (gpio_pin >= WM_IO_PB_00)
{
pin = gpio_pin - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = gpio_pin;
offset = 0;
}
cpu_sr = tls_os_set_critical();
reg_en = tls_reg_read32(HR_GPIO_DATA_EN + offset);
tls_reg_write32(HR_GPIO_DATA_EN + offset, reg_en | (1 << pin));
reg = tls_reg_read32(HR_GPIO_DATA + offset);
if(value)
tls_reg_write32(HR_GPIO_DATA + offset, reg | (1 << pin)); /* write high */
else
tls_reg_write32(HR_GPIO_DATA + offset, reg & (~(1 << pin)));/* write low */
tls_reg_write32(HR_GPIO_DATA_EN + offset, reg_en);
tls_os_release_critical(cpu_sr);
}
/**
* @brief This function is used to config gpio interrupt
*
* @param[in] gpio_pin gpio pin num
* @param[in] mode interrupt trigger type
*
* @return None
*
* @note None
*/
void tls_gpio_irq_enable(enum tls_io_name gpio_pin, enum tls_gpio_irq_trig mode)
{
u32 reg;
u8 pin;
u16 offset;
u8 vec_no;
if (gpio_pin >= WM_IO_PB_00)
{
pin = gpio_pin - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
vec_no = GPIOB_INT;
}
else
{
pin = gpio_pin;
offset = 0;
vec_no = GPIO_INT;
}
switch(mode)
{
case WM_GPIO_IRQ_TRIG_RISING_EDGE:
reg = tls_reg_read32(HR_GPIO_IS + offset);
reg &= (~(0x1 << pin));
tls_reg_write32(HR_GPIO_IS + offset, reg); /* 0 edge trigger */
reg = tls_reg_read32(HR_GPIO_IBE + offset);
reg &= (~(0x1 << pin));
tls_reg_write32(HR_GPIO_IBE + offset, reg); /* 0 edge trigger */
reg = tls_reg_read32(HR_GPIO_IEV + offset);
reg |= (0x1 << pin);
tls_reg_write32(HR_GPIO_IEV + offset, reg); /* 1 rising edge trigger */
break;
case WM_GPIO_IRQ_TRIG_FALLING_EDGE:
reg = tls_reg_read32(HR_GPIO_IS + offset);
reg &= (~(0x1 << pin));
tls_reg_write32(HR_GPIO_IS + offset, reg); /* 0 edge trigger */
reg = tls_reg_read32(HR_GPIO_IBE + offset);
reg &= (~(0x1 << pin));
tls_reg_write32(HR_GPIO_IBE + offset, reg); /* 0 edge trigger */
reg = tls_reg_read32(HR_GPIO_IEV + offset);
reg &= (~(0x1 << pin));
tls_reg_write32(HR_GPIO_IEV + offset, reg); /* 0 falling edge trigger */
break;
case WM_GPIO_IRQ_TRIG_DOUBLE_EDGE:
reg = tls_reg_read32(HR_GPIO_IS + offset);
tls_reg_write32(HR_GPIO_IS + offset, reg & (~(0x1 << pin))); /* 0 edge trigger */
reg = tls_reg_read32(HR_GPIO_IBE + offset);
tls_reg_write32(HR_GPIO_IBE + offset, reg | (0x1 << pin)); /* 1 double edge trigger */
break;
case WM_GPIO_IRQ_TRIG_HIGH_LEVEL:
reg = tls_reg_read32(HR_GPIO_IS + offset);
tls_reg_write32(HR_GPIO_IS + offset, reg | (0x1 << pin)); /* 1 level trigger */
reg = tls_reg_read32(HR_GPIO_IEV + offset);
tls_reg_write32(HR_GPIO_IEV + offset, reg | (0x1 << pin)); /* 1 high level trigger */
break;
case WM_GPIO_IRQ_TRIG_LOW_LEVEL:
reg = tls_reg_read32(HR_GPIO_IS + offset);
tls_reg_write32(HR_GPIO_IS + offset, reg | (0x1 << pin)); /* 1 level trigger */
reg = tls_reg_read32(HR_GPIO_IEV + offset);
tls_reg_write32(HR_GPIO_IEV + offset, reg & (~(0x1 << pin))); /* 0 low level trigger */
break;
}
reg = tls_reg_read32(HR_GPIO_IE + offset);
reg |= (0x1 << pin);
tls_reg_write32(HR_GPIO_IE + offset, reg); /* enable interrupt */
tls_irq_enable(vec_no);
}
/**
* @brief This function is used to disable gpio interrupt
*
* @param[in] gpio_pin gpio pin num
*
* @return None
*
* @note None
*/
void tls_gpio_irq_disable(enum tls_io_name gpio_pin)
{
u32 reg;
u8 pin;
u16 offset;
if (gpio_pin >= WM_IO_PB_00)
{
pin = gpio_pin - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = gpio_pin;
offset = 0;
}
reg = tls_reg_read32(HR_GPIO_IE + offset);
tls_reg_write32(HR_GPIO_IE + offset, reg & (~(0x1 << pin))); /* disable interrupt */
tls_irq_disable(GPIO_INT);
}
/**
* @brief This function is used to get gpio interrupt status
*
* @param[in] gpio_pin gpio pin num
*
* @retval 0 no interrupt happened
* @retval 1 interrupt happened
*
* @note None
*/
u8 tls_get_gpio_irq_status(enum tls_io_name gpio_pin)
{
u32 reg;
u8 pin;
u16 offset;
if (gpio_pin >= WM_IO_PB_00)
{
pin = gpio_pin - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = gpio_pin;
offset = 0;
}
reg = tls_reg_read32(HR_GPIO_RIS + offset);
if(reg & (0x1 << pin))
return 1;
else
return 0;
}
/**
* @brief This function is used to clear gpio interrupt flag
*
* @param[in] gpio_pin gpio pin num
*
* @return None
*
* @note None
*/
void tls_clr_gpio_irq_status(enum tls_io_name gpio_pin)
{
u32 reg;
u8 pin;
u16 offset;
if (gpio_pin >= WM_IO_PB_00)
{
pin = gpio_pin - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = gpio_pin;
offset = 0;
}
reg = tls_reg_read32(HR_GPIO_IC + offset);
tls_reg_write32(HR_GPIO_IC + offset, reg | (0x1 << pin)); /* 1 clear interrupt status */
}
/**
* @brief This function is used to register gpio interrupt
*
* @param[in] gpio_pin gpio pin num
* @param[in] callback the gpio interrupt call back function
* @param[in] arg parammeter for the callback
*
* @return None
*
* @note
* gpio callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_gpio_isr_register(enum tls_io_name gpio_pin,
tls_gpio_irq_callback callback,
void *arg)
{
gpio_context[gpio_pin].callback = callback;
gpio_context[gpio_pin].arg = arg;
}
sdk/Platform/Drivers/gpio/wm_gpio_afsel.c
+1012
View File
File diff suppressed because it is too large Load Diff
sdk/Platform/Drivers/hspi/wm_hspi.c
+493
View File
@@ -0,0 +1,493 @@
/**
* @file wm_hspi.c
*
* @brief High speed spi slave Module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "wm_hspi.h"
#include "wm_regs.h"
#include "wm_config.h"
#include "wm_mem.h"
#include "wm_osal.h"
#include "wm_irq.h"
#include "lwip/mem.h"
#include "wm_io.h"
#if TLS_CONFIG_HS_SPI
struct tls_slave_hspi g_slave_hspi;
#define SET_BIT(x) (1UL << (x))
void hspi_free_rxdesc(struct tls_hspi_rx_desc *rx_desc);
void hspi_rx_init(struct tls_slave_hspi *hspi)
{
struct tls_hspi_rx_desc *hspi_rx_desc;
int i;
/* set current availble rx desc pointer */
hspi_rx_desc = (struct tls_hspi_rx_desc *) HSPI_RX_DESC_BASE_ADDR;
hspi->curr_rx_desc = hspi_rx_desc;
/* initialize rx descriptor content */
for (i = 0; i < HSPI_RX_DESC_NUM; i++)
{
/* initialize tx descriptors */
if (i < HSPI_RXBUF_NUM)
{
hspi_rx_desc->valid_ctrl = SET_BIT(31);
hspi_rx_desc->buf_addr = HSPI_RXBUF_BASE_ADDR + i * HSPI_RXBUF_SIZE;
}
else
{
/* indicate this descriptor is can't use by hspi */
hspi_rx_desc->valid_ctrl = 0;
/* point to null */
hspi_rx_desc->buf_addr = 0x0;
}
if (i == (HSPI_RX_DESC_NUM - 1))
{
hspi_rx_desc->next_desc_addr = (u32) HSPI_RX_DESC_BASE_ADDR;
}
else
{
hspi_rx_desc->next_desc_addr = (u32) (hspi_rx_desc + 1);
}
hspi_rx_desc++;
}
}
void hspi_tx_init(struct tls_slave_hspi *hspi)
{
struct tls_hspi_tx_desc *hspi_tx_desc;
int i;
hspi_tx_desc = (struct tls_hspi_tx_desc *) HSPI_TX_DESC_BASE_ADDR;
hspi->curr_tx_desc = hspi_tx_desc;
for (i = 0; i < HSPI_TX_DESC_NUM; i++)
{
hspi_tx_desc->valid_ctrl = 0;
hspi_tx_desc->buf_info = 0;
#if HSPI_TX_MEM_MALLOC
hspi_tx_desc->txbuf_addr = NULL;
hspi_tx_desc->buf_addr[0] = 0;
#else
hspi_tx_desc->buf_addr[0] = HSPI_TXBUF_BASE_ADDR + i * HSPI_TXBUF_SIZE;
#endif
hspi_tx_desc->buf_addr[1] = 0;
hspi_tx_desc->buf_addr[2] = 0;
if (i == (HSPI_TX_DESC_NUM - 1))
{
hspi_tx_desc->next_desc_addr = (u32) HSPI_TX_DESC_BASE_ADDR;
}
else
{
hspi_tx_desc->next_desc_addr = (u32) (hspi_tx_desc + 1);
}
hspi_tx_desc++;
}
}
static int slave_spi_rx_data(struct tls_slave_hspi *hspi)
{
struct tls_hspi_rx_desc *rx_desc;
/* get rx descriptor */
rx_desc = hspi->curr_rx_desc;
while (!(rx_desc->valid_ctrl & SET_BIT(31)))
{
if (hspi->rx_data_callback)
hspi->rx_data_callback((char *) rx_desc->buf_addr);
hspi_free_rxdesc(rx_desc);
rx_desc = (struct tls_hspi_rx_desc *) rx_desc->next_desc_addr;
hspi->curr_rx_desc = rx_desc;
}
return 0;
}
void SDIO_RX_IRQHandler(void)
{
struct tls_slave_hspi *hspi = (struct tls_slave_hspi *) &g_slave_hspi;
#if HSPI_TX_MEM_MALLOC
hspi->txdoneflag = 1;
#endif
if (hspi->tx_data_callback)
hspi->tx_data_callback((char *) hspi->curr_tx_desc->buf_addr);
/* clear interrupt */
tls_reg_write32(HR_SDIO_INT_SRC, SDIO_WP_INT_SRC_DATA_UP);
}
void SDIO_TX_IRQHandler(void)
{
struct tls_slave_hspi *hspi = (struct tls_slave_hspi *) &g_slave_hspi;
//用户模式下，直接给出数据，链表的操作不对外开放，避免造成链表操作错误
if (hspi->ifusermode)
{
slave_spi_rx_data(hspi);
}
else
{
if (hspi->rx_data_callback)
hspi->rx_data_callback((char *) hspi->curr_rx_desc->buf_addr);
}
/* clear interrupt */
tls_reg_write32(HR_SDIO_INT_SRC, SDIO_WP_INT_SRC_DATA_DOWN);
}
void SDIO_TX_CMD_IRQHandler(void)
{
struct tls_slave_hspi *hspi = (struct tls_slave_hspi *) &g_slave_hspi;
if (hspi->rx_cmd_callback)
hspi->rx_cmd_callback((char *) SDIO_CMD_RXBUF_ADDR);
if (hspi->ifusermode) // 用户模式下，数据给出去之后，寄存器由驱动自己操作
{
tls_reg_write32(HR_SDIO_DOWNCMDVALID, 0x1);
}
/* clear interrupt */
tls_reg_write32(HR_SDIO_INT_SRC, SDIO_WP_INT_SRC_CMD_DOWN);
}
void SPI_HS_IRQHandler(void)
{
printf("spi HS irqhandle\n");
}
void hspi_free_rxdesc(struct tls_hspi_rx_desc *rx_desc)
{
rx_desc->valid_ctrl = SET_BIT(31);
/* 设置hspi/sdio tx enable寄存器，让sdio硬件知道有可用的tx descriptor */
tls_reg_write32(HR_SDIO_TXEN, SET_BIT(0));
}
void hspi_regs_cfg(void)
{
tls_reg_write32(HR_HSPI_CLEAR_FIFO, 0x1); /* Clear data up&down interrput
*/
tls_reg_write32(HR_HSPI_SPI_CFG, 0); /* CPOL=0, CPHA=0, Small-Endian */
tls_reg_write32(HR_HSPI_MODE_CFG, 0x0);
tls_reg_write32(HR_HSPI_INT_MASK, 0x03);
tls_reg_write32(HR_HSPI_INT_STTS, 0x03);
}
void sdio_init_cis(void)
{
tls_reg_write32(FN0_TPL_FUNCID, 0x000C0221);
tls_reg_write32(FN0_TPL_FUNCE, 0x00000422);
tls_reg_write32(FN0_TPL_FUNCE_MAXBLK, 0x04203208);
tls_reg_write32(FN0_TPL_MANFID_MID, 0x53470296);
tls_reg_write32(FN0_TPL_END, 0x000000ff);
tls_reg_write32(FN1_TPL_FUNCID, 0x000C0221);
tls_reg_write32(FN1_TPL_FUNCE, 0x01012a22);
tls_reg_write32(FN1_TPL_FUNCE_VER, 0x00000011);
tls_reg_write32(FN1_TPL_FUNCE_NSN, 0x02000000);
tls_reg_write32(FN1_TPL_FUNCE_CSASIZE, 0x08000300);
tls_reg_write32(FN1_TPL_FUNCE_OCR, 0x00FF8000);
tls_reg_write32(FN1_TPL_FUNCE_MINPWR, 0x010f0a08);
tls_reg_write32(FN1_TPL_FUNCE_STANDBY, 0x00000101);
tls_reg_write32(FN1_TPL_FUNCE_OPTBW, 0x00000000);
tls_reg_write32(FN1_TPL_FUNCE_NTIMEOUT, 0x00000000);
tls_reg_write32(FN1_TPL_FUNCE_AVGPWR, 0x00000000);
tls_reg_write32(FN1_TPL_FUNCE_AVGPWR + 4, 0x00000000);
tls_reg_write32(FN1_TPL_END, 0x000000ff);
}
void hsdio_regs_cfg(void)
{
u32 v;
sdio_init_cis();
tls_reg_write32(HR_SDIO_CIS0, SDIO_CIS0_ADDR - 0x1000);
tls_reg_write32(HR_SDIO_CIS1, SDIO_CIS1_ADDR - 0x2000);
v = tls_reg_read32(HR_SDIO_CIA);
tls_reg_write32(HR_SDIO_CIA, (v & 0xFFFFF000) | 0x232);
/* set sdio ready */
tls_reg_write32(HR_SDIO_PROG, 0x02FD);
}
/**
* @brief This function is used to initial HSPI register.
*
* @param[in] None
*
* @retval 0 success
* @retval other failed
*
* @note When the system is initialized, the function has been called, so users can not call the function.
*/
int tls_slave_spi_init(void)
{
struct tls_slave_hspi *hspi;
hspi = &g_slave_hspi;
memset(hspi, 0, sizeof(struct tls_slave_hspi));
hspi_rx_init(hspi);
hspi_tx_init(hspi);
// tls_set_high_speed_interface_type(HSPI_INTERFACE_SPI);
/* regiseter hspi tx rx cmd interrupt handler */
/* setting hw interrupt module isr enable regiset */
tls_irq_enable(SDIO_TX_DATA_INT);
tls_irq_enable(SDIO_RX_DATA_INT);
tls_irq_enable(SDIO_TX_CMD_INT);
tls_irq_enable(SPI1_INT);
/********************************************
* setting hspi wrapper registers
*********************************************/
/* hspi data down(rx) */
tls_reg_write32(HR_SDIO_TXBD_ADDR, HSPI_RX_DESC_BASE_ADDR);
tls_reg_write32(HR_SDIO_TXBD_LINKEN, 1);
tls_reg_write32(HR_SDIO_TXEN, 1);
/* hspi data up (tx) */
tls_reg_write32(HR_SDIO_RXBD_ADDR, HSPI_TX_DESC_BASE_ADDR);
tls_reg_write32(HR_SDIO_RXBD_LINKEN, 1);
/* hspi cmd down */
tls_reg_write32(HR_SDIO_CMD_ADDR, SDIO_CMD_RXBUF_ADDR);
tls_reg_write32(HR_SDIO_CMD_SIZE, SDIO_CMD_RXBUF_SIZE);
tls_reg_write32(HR_SDIO_DOWNCMDVALID, 0x1);
/* enable sdio module register */
tls_reg_write32(HR_SDIO_INT_MASK, 0x00);
return 0;
}
/**
* @brief This function is used to set high speed interface type.
*
* @param[in] type is the interface type. HSPI_INTERFACE_SPI or HSPI_INTERFACE_SDIO
*
* @return None
*
* @note None
*/
void tls_set_high_speed_interface_type(int type)
{
if (HSPI_INTERFACE_SPI == type)
{
#if 0
#if (HSPI_IO_REUSE_NUM == 0)
tls_io_cfg_set(WM_IO_PB_14, WM_IO_OPTION1);
tls_io_cfg_set(WM_IO_PB_15, WM_IO_OPTION1);
tls_io_cfg_set(WM_IO_PB_16, WM_IO_OPTION1);
tls_io_cfg_set(WM_IO_PB_17, WM_IO_OPTION1);
tls_io_cfg_set(WM_IO_PB_18, WM_IO_OPTION1);
#else
if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_14))
tls_io_cfg_set(WM_IO_PB_14, WM_IO_OPTION5);
if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_15))
tls_io_cfg_set(WM_IO_PB_15, WM_IO_OPTION5);
if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_16))
tls_io_cfg_set(WM_IO_PB_16, WM_IO_OPTION5);
if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_17))
tls_io_cfg_set(WM_IO_PB_17, WM_IO_OPTION5);
if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_18))
tls_io_cfg_set(WM_IO_PB_18, WM_IO_OPTION5);
tls_io_cfg_set(WM_IO_PB_08, WM_IO_OPTION2);
tls_io_cfg_set(WM_IO_PB_09, WM_IO_OPTION2);
tls_io_cfg_set(WM_IO_PB_10, WM_IO_OPTION2);
tls_io_cfg_set(WM_IO_PB_11, WM_IO_OPTION2);
tls_io_cfg_set(WM_IO_PB_12, WM_IO_OPTION2);
#endif
#endif
hspi_regs_cfg();
}
else if (HSPI_INTERFACE_SDIO == type)
{
#if 0
if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_16)) //HSPI_CK,as sdio need close
tls_io_cfg_set(WM_IO_PB_16, WM_IO_OPTION5);
if(WM_IO_OPTION2 == tls_io_cfg_get(WM_IO_PB_08)) //HSPI_CK,as sdio need close
tls_io_cfg_set(WM_IO_PB_08, WM_IO_OPTION5);
tls_io_cfg_set(WM_IO_PB_08, WM_IO_OPTION3);
tls_io_cfg_set(WM_IO_PB_09, WM_IO_OPTION3);
tls_io_cfg_set(WM_IO_PB_10, WM_IO_OPTION3);
tls_io_cfg_set(WM_IO_PB_11, WM_IO_OPTION3);
tls_io_cfg_set(WM_IO_PB_12, WM_IO_OPTION3);
#if (SDIO_IO_REUSE_NUM == 0)
tls_io_cfg_set(WM_IO_PA_06, WM_IO_OPTION3);
#elif (SDIO_IO_REUSE_NUM == 1)
tls_io_cfg_set(WM_IO_PB_07, WM_IO_OPTION3);
#else
tls_io_cfg_set(WM_IO_PB_13, WM_IO_OPTION4);
#endif
#endif
hsdio_regs_cfg();
}
}
/**
* @brief This function is used to enable or disable user mode.
*
* @param[in] ifenable TRUE or FALSE
*
* @return None
*
* @note If the user enables the user mode, RICM instruction in the system will not be used by SPI.
* If the user wants to use the SPI interface as other use, need to enable the user mode.
* This function must be called before the register function.
*/
void tls_set_hspi_user_mode(u8 ifenable)
{
struct tls_slave_hspi *hspi = &g_slave_hspi;
hspi->ifusermode = ifenable;
if (ifenable)
{
hspi->rx_cmd_callback = NULL;
hspi->rx_data_callback = NULL;
hspi->tx_data_callback = NULL;
}
}
/**
* @brief This function is used to register hspi rx command interrupt.
*
* @param[in] rx_cmd_callback is the hspi rx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_hspi_rx_cmd_callback_register(s16(*rx_cmd_callback) (char *buf))
{
g_slave_hspi.rx_cmd_callback = rx_cmd_callback;
}
/**
* @brief This function is used to register hspi rx data interrupt.
*
* @param[in] rx_data_callback is the hspi rx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_hspi_rx_data_callback_register(s16(*rx_data_callback) (char *buf))
{
g_slave_hspi.rx_data_callback = rx_data_callback;
}
/**
* @brief This function is used to register hspi tx data interrupt.
*
* @param[in] tx_data_callback is the hspi tx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_hspi_tx_data_callback_register(s16(*tx_data_callback) (char *buf))
{
g_slave_hspi.tx_data_callback = tx_data_callback;
}
/**
* @brief This function is used to transfer data.
*
* @param[in] txbuf is a buf for saving user data.
* @param[in] len is the data length.
*
* @retval transfer data len success
* @retval 0 failed
*
* @note None
*/
int tls_hspi_tx_data(char *txbuf, int len)
{
struct tls_hspi_tx_desc *tx_desc;
int totallen = len;
int txlen;
if (NULL == txbuf || len <= 0 || len > (HSPI_TXBUF_SIZE * HSPI_TX_DESC_NUM))
{
printf("\nhspi tx param error\n");
return 0;
}
tx_desc = g_slave_hspi.curr_tx_desc;
while (1)
{
// printf("---\n");
if ((tx_desc->valid_ctrl & SET_BIT(31)) == 0)
break;
tls_os_time_delay(1);
}
while (!(tx_desc->valid_ctrl & SET_BIT(31)))
{
txlen = (totallen > HSPI_TXBUF_SIZE) ? HSPI_TXBUF_SIZE : totallen;
#if HSPI_TX_MEM_MALLOC
if (tx_desc->txbuf_addr != NULL)
{
printf("\nhspi txbuf not null,error %x\n", tx_desc->txbuf_addr);
if (tx_desc->txbuf_addr == tx_desc->buf_addr[0])
{
mem_free((void *) tx_desc->txbuf_addr);
tx_desc->txbuf_addr = NULL;
}
else // 不应该出现
{
printf("\nhspi tx mem error\n");
break;
}
}
tx_desc->txbuf_addr = (u32) mem_malloc(txlen + 1);
if (NULL == tx_desc->txbuf_addr)
{
printf("\nhspi tx data malloc error\n");
break;
}
tx_desc->buf_addr[0] = tx_desc->txbuf_addr;
#endif
MEMCPY((char *) tx_desc->buf_addr[0], txbuf, txlen);
tx_desc->buf_info = txlen << 12;
tx_desc->valid_ctrl = SET_BIT(31);
tls_reg_write32(HR_SDIO_RXEN, 0x01);
tx_desc = (struct tls_hspi_tx_desc *) tx_desc->next_desc_addr;
g_slave_hspi.curr_tx_desc = tx_desc;
totallen -= txlen;
if (totallen <= 0)
break;
}
return (len - totallen);
}
#endif
sdk/Platform/Drivers/i2c/wm_i2c.c
+319
View File
@@ -0,0 +1,319 @@
/**************************************************************************//**
* @file wm_i2c.c
* @author
* @version
* @date
* @brief
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd. All rights reserved.
*****************************************************************************/
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "wm_regs.h"
#include "wm_i2c.h"
#include "wm_cpu.h"
#include "wm_irq.h"
#define I2C_FREQ_MAX (400000)
#define I2C_FREQ_MIN (100000)
#define I2C_WRITE (0x80)
#define I2C_READ (0x00)
typedef struct {
uint8_t addr;
uint8_t dev_addr;
uint8_t state;
uint8_t *buf;
uint16_t len;
uint16_t cnt;
uint8_t cmd;
void (*transfer_done)(void);
} i2c_desc;
enum {
START,
RESTART,
TRANSMIT,
PRERECEIVE,
RECEIVE,
STOP,
DONE,
IDLE,
};
static i2c_desc i2c_transfer;
void tls_i2c_init(u32 freq)
{
u32 div = 0;
tls_sys_clk clk;
if (freq < I2C_FREQ_MIN)
{
freq = I2C_FREQ_MIN;
}
else if (freq > I2C_FREQ_MAX)
{
freq = I2C_FREQ_MAX;
}
tls_sys_clk_get(&clk);
div = (clk.apbclk * 1000000)/(5 * freq) - 1;
tls_reg_write32(HR_I2C_PRER_LO, div & 0xff);
tls_reg_write32(HR_I2C_PRER_HI, (div>>8) & 0xff);
/** enable I2C | Disable Int*/
tls_reg_write32(HR_I2C_CTRL, I2C_CTRL_INT_DISABLE | I2C_CTRL_ENABLE);
tls_irq_enable(I2C_IRQn);
}
/**
* @brief send stop signal
*
*/
void tls_i2c_stop(void)
{
tls_reg_write32(HR_I2C_CR_SR, I2C_CR_STO);
while(tls_reg_read32(HR_I2C_CR_SR) & I2C_SR_TIP);
}
/**
* @brief waiting for ack signal
* @retval
* - \ref WM_FAILED
* - \ref WM_SUCCESS
*/
int tls_i2c_wait_ack(void)
{
u16 errtime=0;
u32 value;
while(tls_reg_read32(HR_I2C_CR_SR) & I2C_SR_TIP);
value = tls_reg_read32(HR_I2C_CR_SR);
while(value & I2C_SR_NAK)
{
errtime ++;
if(errtime > 512)
{
printf("wait ack err\n");
tls_i2c_stop();
return WM_FAILED;
}
value = tls_reg_read32(HR_I2C_CR_SR);
}
return WM_SUCCESS;
}
/**
* @brief writes the data to data register of I2C module
* when \ifstart one the start signal will be sent followed by the \data
* when \ifstart zero only the \data will be send
* @param[in] data the data will be write to the data register of I2C module
* @param[in] ifstart when one send start signal, when zero don't
* @retval
*
*/
void tls_i2c_write_byte(u8 data,u8 ifstart)
{
tls_reg_write32(HR_I2C_TX_RX, data);
if(ifstart)
tls_reg_write32(HR_I2C_CR_SR, I2C_CR_STA | I2C_CR_WR);
else
tls_reg_write32(HR_I2C_CR_SR, I2C_CR_WR);
while(tls_reg_read32(HR_I2C_CR_SR) & I2C_SR_TIP);
}
/**
* @brief get the data stored in data register of I2C module
* @param[in] ifack when one send ack after reading the data register,when zero don't
* @param[in] ifstop when one send stop signal after read, when zero do not send stop
* @retval the received data
*/
u8 tls_i2c_read_byte(u8 ifack,u8 ifstop)
{
u8 data;
u32 value = I2C_CR_RD;
if(!ifack)
value |= I2C_CR_NAK;
if(ifstop)
value |= I2C_CR_STO;
tls_reg_write32(HR_I2C_CR_SR, value);
/** Waiting finish */
while(tls_reg_read32(HR_I2C_CR_SR) & I2C_SR_TIP);
data = tls_reg_read32(HR_I2C_TX_RX);
return data;
}
/**
* @brief start write through int mode
* @param[in] devaddr the device address
* @param[in] wordaddr when one send stop signal after read, when zero do not send stop
* @param[in] buf the address point where data shoule be stored
* @param[in] len the length of data will be received
* @retval
* - \ref WM_FAILED
* - \ref WM_SUCCESS
*/
int wm_i2c_start_write_it(uint8_t devaddr, uint8_t wordaddr, uint8_t * buf, uint16_t len)
{
if (buf == NULL)
{
return WM_FAILED;
}
I2C->TX_RX = devaddr;
i2c_transfer.dev_addr = devaddr;
i2c_transfer.state = START;
i2c_transfer.cmd = I2C_WRITE;
i2c_transfer.buf = buf;
i2c_transfer.len = len;
i2c_transfer.cnt = 0;
i2c_transfer.addr = wordaddr;
I2C->CR_SR = I2C_CR_STA | I2C_CR_WR;
return WM_SUCCESS;
}
/**
* @brief start read through int mode
* @param[in] devaddr the device address
* @param[in] wordaddr when one send stop signal after read, when zero do not send stop
* @param[in] buf the address point where data shoule be stored
* @param[in] len the length of data will be received
* @retval
* - \ref WM_FAILED
* - \ref WM_SUCCESS
*/
int wm_i2c_start_read_it(uint8_t devaddr, uint8_t wordaddr, uint8_t * buf, uint16_t len)
{
if (buf == NULL)
{
return WM_FAILED;
}
I2C->TX_RX = devaddr;
i2c_transfer.dev_addr = devaddr;
i2c_transfer.state = START;
i2c_transfer.cmd = I2C_READ;
i2c_transfer.buf = buf;
i2c_transfer.len = len;
i2c_transfer.cnt = 0;
i2c_transfer.addr = wordaddr;
I2C->CR_SR = I2C_CR_STA | I2C_CR_WR;
return WM_SUCCESS;
}
/**
* @brief This function is used to register i2c transfer done callback function.
* @param[in] done is the i2c transfer done callback function.
* @retval None
* @note None
*/
void wm_i2c_transfer_done_register(void (*done)(void))
{
i2c_transfer.transfer_done = done;
}
void I2C_IRQHandler(void)
{
int i2c_sr;
i2c_sr = I2C->CR_SR;
I2C->CR_SR = 1;
if (i2c_sr & 0x20)
{
printf("I2C AL lost\r\n");
}
if (i2c_sr & 0x01)
{
if ((i2c_sr & 0x80) == 0)
{
switch(i2c_transfer.state)
{
case START:
I2C->TX_RX = i2c_transfer.addr;
I2C->CR_SR = I2C_CR_WR;
if ((i2c_transfer.cmd & I2C_WRITE) == I2C_WRITE)
{
i2c_transfer.state = TRANSMIT;
}
else
{
i2c_transfer.state = RESTART;
}
break;
case RESTART:
I2C->TX_RX = (i2c_transfer.dev_addr | 0x01);
I2C->CR_SR = (I2C_CR_STA | I2C_CR_WR);
i2c_transfer.state = PRERECEIVE;
break;
case TRANSMIT:
I2C->TX_RX = i2c_transfer.buf[i2c_transfer.cnt++];
I2C->CR_SR = I2C_CR_WR;
if (i2c_transfer.cnt == i2c_transfer.len)
{
i2c_transfer.state = STOP;
}
break;
case PRERECEIVE:
i2c_transfer.state = RECEIVE;
I2C->CR_SR = I2C_CR_RD;
break;
case RECEIVE:
i2c_transfer.buf[i2c_transfer.cnt++] = I2C->TX_RX;
if (i2c_transfer.cnt == (i2c_transfer.len - 1))
{
I2C->CR_SR = (I2C_CR_STO | I2C_CR_NAK | I2C_CR_RD);
i2c_transfer.state = STOP;
}
else if (i2c_transfer.len == 1)
{
I2C->CR_SR = (I2C_CR_STO | I2C_CR_NAK | I2C_CR_RD);
i2c_transfer.state = DONE;
if (i2c_transfer.transfer_done)
{
i2c_transfer.transfer_done();
}
}
else
{
I2C->CR_SR = I2C_CR_RD;
}
break;
case STOP:
I2C->CR_SR = I2C_CR_STO;
i2c_transfer.state = DONE;
if (i2c_transfer.transfer_done)
{
i2c_transfer.transfer_done();
}
break;
}
}
else
{
if ((i2c_transfer.state == STOP) && i2c_transfer.cmd != I2C_WRITE)
{
i2c_transfer.buf[i2c_transfer.cnt] = I2C->TX_RX;
i2c_transfer.state = DONE;
if (i2c_transfer.transfer_done)
{
i2c_transfer.transfer_done();
}
}
}
}
// if ((i2c_sr & 0x40) == 0)
// {
// i2c_transfer.state = IDLE;
// }
}
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Platform/Drivers/i2s/wm_i2s.c
+584
View File
@@ -0,0 +1,584 @@
/**************************************************************************//**
* @file wm_i2s.c
* @author
* @version
* @date
* @brief
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd. All rights reserved.
*****************************************************************************/
#define TLS_CONFIG_I2S 1
#if TLS_CONFIG_I2S
#include "wm_i2s.h"
#include "string.h"
#include "wm_debug.h"
#include "wm_irq.h"
#include "wm_config.h"
#include "wm_mem.h"
#define I2S_CLK (160000000)
#define WM_I2S_FIFO_LEN (8)
static tls_i2s_port_t tls_i2s_port;
static void tls_i2s_fill_txfifo(void);
/**
* @brief This function is used to initial i2s port.
* @param[in] opts the i2s setting options,if this param is NULL,this function will use the default options.
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
*
*/
int tls_i2s_port_init(tls_i2s_options_t *opts)
{
tls_i2s_options_t opt;
tls_i2s_port.regs = I2S;
if(NULL == opts)
{
memset(&opt, 0, sizeof(tls_i2s_options_t));
opt.data_width = I2S_CTRL_DATABIT_16;
opt.format = I2S_CTRL_FORMAT_I2S;
opt.stereo_mono = I2S_CTRL_STERO;
opt.sample_rate = 8000;
opt.tx_en = 1;
tls_i2s_config(&opt);
}
else
{
tls_i2s_config(opts);
}
/* enable i2s interrupt */
NVIC_ClearPendingIRQ(I2S_IRQn);
tls_irq_enable(I2S_INT);
return WM_SUCCESS;
}
/**
* @brief This function is used to initial i2s port.
* @param[in] opts the i2s setting options,if this param is NULL,this function will use the default options.
*
* @retval
*
* @note
*/
void tls_i2s_config(tls_i2s_options_t *opts)
{
tls_i2s_port.regs->CTRL &= ~(I2S_CTRL_FORMAT_MASK | \
I2S_CTRL_DATABIT_MASK | \
I2S_CTRL_STEREO_MONO_MASK);
tls_i2s_port.regs->CTRL = opts->data_width | opts->format | opts->stereo_mono;
if (opts->rx_en)
{
TLS_I2S_RX_ENABLE();
TLS_I2S_RX_FIFO_CLEAR();
}
if (opts->tx_en)
{
TLS_I2S_TX_ENABLE();
TLS_I2S_TX_FIFO_CLEAR();
}
tls_i2s_set_freq(opts->sample_rate);
}
/**
* @brief
* set the frequency of the i2s port.
*
* @param[in] freq
* the required frequency of the i2s module
*
* @retval
*
*/
void tls_i2s_set_freq(uint32_t freq)
{
uint32_t div;
uint32_t reg;
uint8_t width, stereo;
reg = I2S->CTRL;
width = (((reg>>4)&0x03)+1)<<3;
stereo = tls_bitband_read(HR_I2S_CTRL, I2S_CTRL_STEREO_MONO_Pos) ? 1:2;
div = (I2S_CLK + freq * width * stereo)/(freq * width * stereo) - 1;
*(volatile uint32_t *)HR_CLK_I2S_CTL &= ~0xFF00;
*(volatile uint32_t *)HR_CLK_I2S_CTL |= (uint32_t)div<<8;
}
/**
* @brief
* set the frequency of the i2s port.
*
* @param[in] freq
* the required frequency of the i2s module
* @param[in] exclk
* the frequency of the ext clock
*
* @retval
*
* @note
* this function will be called after tls_i2s_port_init function
*/
void wm_i2s_set_freq_exclk(uint32_t freq, uint32_t exclk)
{
uint32_t div;
uint32_t temp;
uint8_t wdwidth, stereo;
temp = I2S->CTRL;
wdwidth = (((temp>>4)&0x03)+1)<<3;
stereo = tls_bitband_read(HR_I2S_CTRL, 22) ? 1:2;
div = (exclk * 2 + freq * wdwidth * stereo)/(2* freq * wdwidth * stereo) - 1;
*(volatile uint32_t *)0x40000718 &= ~0x3FF00;
*(volatile uint32_t *)0x40000718 |= (uint32_t)div<<8;
*(volatile uint32_t *)0x40000718 |= 0x01;
}
void I2S_IRQHandler(void)
{
uint8_t rx_fifocnt;
/** LZC */
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_LZC_Pos) && !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_LZC_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_LZC);
}
/** RZC */
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_RZC_Pos) && !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_RZC_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_RZC);
}
/** Tx Done*/
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_TXDONE_Pos) && !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_TXDONE_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_TXDONE);
}
/** TxTH*/
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_TXTH_Pos)&& !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_TXTH_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_TXTH);
tls_i2s_fill_txfifo();
}
/** TXOV*/
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_TXOV_Pos) && !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_TXOV_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_TXOV);
}
/** TXUD*/
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_TXUD_Pos) && !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_TXUD_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_TXUD);
}
/** Rx Done*/
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_RXDONE_Pos) && !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_RXDONE_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_RXDONE);
}
/** RxTH */
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_RXTH_Pos)&& !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_RXTH_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_RXTH);
rx_fifocnt = tls_i2s_port.regs->INT_STATUS & I2S_RX_FIFO_CNT_MASK;
if (tls_i2s_port.rx_buf.buf != NULL)
{
while(rx_fifocnt-- > 0)
{
tls_i2s_port.rx_buf.buf[tls_i2s_port.rx_buf.index] = tls_i2s_port.regs->RX;
tls_i2s_port.rx_buf.index++;
}
if (tls_i2s_port.rx_buf.index >= (tls_i2s_port.rx_buf.len))
{
tls_i2s_port.rx_buf.buf = NULL;
tls_i2s_int_config(I2S_INT_MASK_RXTH, 0);
if (tls_i2s_port.rx_callback != NULL)
{
tls_i2s_port.rx_callback(tls_i2s_port.rx_buf.len);
}
tls_i2s_port.rx_buf.index = 0;
}
}
}
/** RXOV*/
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_RXOV_Pos) && !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_RXOV_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_RXOV);
}
/** RXUD*/
if (tls_bitband_read(HR_I2S_INT_SRC, I2S_FLAG_RXUD_Pos) && !tls_bitband_read(HR_I2S_INT_MASK, I2S_FLAG_RXUD_Pos))
{
tls_reg_write32(HR_I2S_INT_SRC, I2S_FLAG_RXUD);
}
}
/**
* @brief
* This function is used to register i2s rx interrupt.
*
* @param[in] rx_callback
* is the i2s interrupt call back function.
*
* @retval
*
*/
void tls_i2s_rx_register( void (*rx_callback)(u16 len))
{
tls_i2s_port.rx_callback = rx_callback;
}
/**
* @brief
* This function is used to register i2s tx interrupt.
*
* @param[in] tx_callback
* is the i2s interrupt call back function.
*
* @retval
*
*/
void tls_i2s_tx_register(void (* tx_callback)(u16 len))
{
tls_i2s_port.tx_callback = tx_callback;
}
static void tls_i2s_fill_txfifo()
{
s8 fifo_left = 0;
if (tls_i2s_port.tx_buf.index < tls_i2s_port.tx_buf.len)
{
fifo_left = I2S_MAX_RXTXFIFO_LEVEL - ((tls_i2s_port.regs->INT_STATUS & I2S_TX_FIFO_CNT_MASK)>>4);
while (fifo_left--)
{
tls_i2s_port.regs->TX = *(uint32_t *)(tls_i2s_port.tx_buf.buf + tls_i2s_port.tx_buf.index);
tls_i2s_port.tx_buf.index ++;
}
if(tls_i2s_port.tx_buf.index >= tls_i2s_port.tx_buf.len)
{
while((tls_i2s_port.regs->INT_STATUS & I2S_TX_FIFO_CNT_MASK)>>4);
if(tls_i2s_port.tx_sem)
{
memset(&tls_i2s_port.tx_buf, 0, sizeof(tls_i2s_buf));
tls_os_sem_release(tls_i2s_port.tx_sem);
return;
}
if (tls_i2s_port.tx_callback)
{
tls_i2s_port.tx_callback(tls_i2s_port.tx_buf.len);
}
}
}
}
/**
* @brief
* This function is used to transfer data in blocking mode.
*
* @param[in] buf
* pointer to the transfering data.
*
* @param[in] len
* is the data length.
*
* @retval
*
*/
int tls_i2s_tx_block(uint32_t *buf, uint16_t len)
{
uint8_t err;
err = tls_os_sem_create(&tls_i2s_port.tx_sem, 0);
if (err != TLS_OS_SUCCESS)
{
TLS_DBGPRT_ERR("\ni2s tx sem create fail\n");
return WM_FAILED;
}
TLS_I2S_TX_FIFO_CLEAR();
tls_reg_write32(HR_I2S_INT_SRC, 0x1FF);
NVIC_ClearPendingIRQ(I2S_IRQn);
tls_i2s_port.tx_buf.buf = buf;
tls_i2s_port.tx_buf.len = len;
tls_i2s_port.tx_buf.index = 0;
tls_i2s_set_txth(5);
tls_i2s_int_config(I2S_INT_MASK_TXTH, 1);
TLS_I2S_TX_ENABLE();
TLS_I2S_ENABLE();
tls_os_sem_acquire(tls_i2s_port.tx_sem, 0);
tls_os_sem_delete(tls_i2s_port.tx_sem);
tls_i2s_port.tx_sem = NULL;
TLS_I2S_TX_DISABLE();
return WM_SUCCESS;
}
/**
* @brief
* This function is used to transfer data in non blocking mode.
*
* @param[in] buf
* is a buf for user data.
*
* @param[in] len
* is the data length.
*
* @param[in] tx_callback
* a function pointer,which will be called when the designated data sent
*
* @retval
*
* @note the \ref len in words
*/
int tls_i2s_tx_nonblock(uint32_t *buf, uint16_t len, void (*tx_callback)(u16 len))
{
tls_i2s_port.tx_buf.buf = (uint32_t *)buf;
tls_i2s_port.tx_buf.len = len;
tls_i2s_port.tx_buf.index = 0;
tls_i2s_set_txth(5);
tls_i2s_int_config(I2S_INT_MASK_TXTH, 1);
tls_i2s_tx_register( tx_callback);
TLS_I2S_TX_FIFO_CLEAR();
TLS_I2S_TX_ENABLE();
TLS_I2S_ENABLE();
return WM_SUCCESS;
}
/**
* @brief
* This function is used to receiver data in non blocking mode.
*
* @param[in] buf
* the buffer for storing the received data.
*
* @param[in] len
* the length of the data will be receiving
*
* @param[in] rx_callback
* a function pointer,which will be called when the demanded data have been received
*
* @retval
*
*/
int tls_i2s_rx_nonblock(uint32_t *buf, uint16_t len, void (*rx_callback)(u16 len))
{
tls_i2s_port.rx_buf.buf = buf;
tls_i2s_port.rx_buf.len = len;
tls_i2s_port.rx_buf.index = 0;
tls_i2s_set_rxth(5);
tls_i2s_int_config(I2S_INT_MASK_RXTH, 1);
tls_i2s_rx_register( rx_callback);
TLS_I2S_RX_FIFO_CLEAR();
NVIC_ClearPendingIRQ(I2S_IRQn);
TLS_I2S_RX_ENABLE();
TLS_I2S_ENABLE();
return WM_SUCCESS;
}
/**
* @brief
* This function is used to the tx DMA configuration of the I2S module.
*
* @param[in] dma_channel
* the free dma channel number which returned by calling function tls_dma_request()
*
* @param[in] addr
* point to the data buffer will be sent
*
* @param[in] len
* length of the data to be transfered in bytes
*
* @retval
*/
void tls_i2s_tx_dma_config(uint8_t dma_channel, uint32_t * addr, uint16_t len)
{
struct tls_dma_descriptor DmaDesc;
TLS_I2S_TX_DISABLE();
TLS_I2S_TX_FIFO_CLEAR();
/** Mask i2s txth interrupt*/
tls_i2s_set_txth(4);
tls_i2s_int_config(I2S_INT_MASK_TXTH, 0);
DmaDesc.src_addr = (unsigned int) addr;
DmaDesc.dest_addr = (unsigned int)HR_I2S_TX;
DmaDesc.dma_ctrl = TLS_DMA_DESC_CTRL_SRC_ADD_INC | TLS_DMA_DESC_CTRL_DATA_SIZE_WORD |
(len << 7);
DmaDesc.valid = TLS_DMA_DESC_VALID;
DmaDesc.next = NULL;
tls_dma_start(dma_channel, &DmaDesc, 0);
}
/**
* @brief
* datas transmit throuth DMA
*
* @param[in] addr
* point to the data buffer will be sent
* @param[in] len
* length of the data to be transfered in bytes
* @param[in] callback
* the callback function when datas transfer finished
*
* @retval
*
* @note the \ref len in bytes
*/
int tls_i2s_tx_dma(uint32_t * addr, uint16_t len, tls_i2s_callback callback)
{
uint8_t tx_channel;
TLS_I2S_TX_FIFO_CLEAR();
tls_reg_write32(HR_I2S_INT_SRC, 0x1FF);
NVIC_ClearPendingIRQ(I2S_IRQn);
TLS_I2S_TX_FIFO_CLEAR();
tx_channel = tls_dma_request(WM_I2S_TX_DMA_CHANNEL, TLS_DMA_FLAGS_CHANNEL_SEL(TLS_DMA_SEL_I2S_TX) | TLS_DMA_FLAGS_HARD_MODE);
if (tx_channel == 0)
{
return WM_FAILED;
}
if (tls_dma_stop(tx_channel))
{
return WM_FAILED;
}
tls_i2s_tx_dma_config(tx_channel, addr, len);
tls_dma_irq_register(tx_channel, callback, NULL, TLS_DMA_IRQ_TRANSFER_DONE);
TLS_I2S_TXDMA_ENABLE();
TLS_I2S_TX_ENABLE();
TLS_I2S_ENABLE();
return WM_SUCCESS;
}
/**
* @brief
* This function is used to the rx DMA configuration of the I2S module.
*
* @param[in] addr
* point to the storge buffer of the received data
*
* @param[in] len
* the storge buffer length in bytes
*
* @retval
*/
void tls_i2s_rx_dma_config(uint8_t dma_channel, uint32_t * addr, uint16_t len)
{
struct tls_dma_descriptor DmaDesc;
tls_i2s_int_config(I2S_INT_MASK_RXTH, 0);
TLS_I2S_RX_DISABLE();
TLS_I2S_RXDMA_DISABLE();
TLS_I2S_RX_FIFO_CLEAR();
/** Mask i2s rxth interrupt*/
tls_i2s_set_rxth(4);
tls_i2s_int_config(I2S_INT_MASK_RXTH, 0);
DmaDesc.src_addr = (int)HR_I2S_RX;
DmaDesc.dest_addr = (int)addr;
DmaDesc.dma_ctrl = TLS_DMA_DESC_CTRL_DEST_ADD_INC | TLS_DMA_DESC_CTRL_DATA_SIZE_WORD |
(len << 7);
DmaDesc.valid = TLS_DMA_DESC_VALID;
DmaDesc.next = NULL;
tls_dma_start(dma_channel, &DmaDesc, 0);
}
int tls_i2s_rx_dma(uint32_t * addr, uint16_t len, tls_i2s_callback callback)
{
uint8_t rx_channel;
rx_channel = tls_dma_request(WM_I2S_RX_DMA_CHANNEL, TLS_DMA_FLAGS_CHANNEL_SEL(TLS_DMA_SEL_I2S_RX) | TLS_DMA_FLAGS_HARD_MODE);
if (rx_channel == 0)
{
return WM_FAILED;
}
if (tls_dma_stop(rx_channel))
{
return WM_FAILED;
}
tls_i2s_rx_dma_config(rx_channel, addr, len);
tls_dma_irq_register(rx_channel, callback, NULL, TLS_DMA_IRQ_TRANSFER_DONE);
TLS_I2S_RXDMA_ENABLE();
NVIC_ClearPendingIRQ(I2S_IRQn);
TLS_I2S_RX_ENABLE();
TLS_I2S_ENABLE();
return WM_SUCCESS;
}
#if 1
uint8_t tst_flag = 0;
void tls_i2s_tx_dma_callback()
{
I2S->TX = 0x00;
while(!tls_bitband_read(HR_I2S_INT_SRC, 7));
TLS_I2S_TX_DISABLE();
DMA_CHNLCTRL_REG(WM_I2S_TX_DMA_CHANNEL) |= DMA_CHNL_CTRL_CHNL_OFF;
tls_dma_free(WM_I2S_TX_DMA_CHANNEL);
tst_flag = 1;
}
void tls_i2s_rx_dma_callback()
{
TLS_I2S_RX_DISABLE();
DMA_CHNLCTRL_REG(WM_I2S_RX_DMA_CHANNEL) |= DMA_CHNL_CTRL_CHNL_OFF;
tls_dma_free(WM_I2S_RX_DMA_CHANNEL);
tst_flag = 1;
}
void tls_i2s_rx_callback()
{
TLS_I2S_RX_DISABLE();
tst_flag = 1;
}
void tls_i2s_test()
{
uint32_t *ptr = NULL;
uint32_t len;
uint32_t * i2s_tx_test = tls_mem_alloc(1024);
tls_i2s_port.opts.data_width = I2S_CTRL_DATABIT_16;
tls_i2s_port.opts.format = I2S_CTRL_FORMAT_I2S;
tls_i2s_port.opts.tx_en = 1;
tls_i2s_port.opts.sample_rate = 8000;
tls_i2s_port.opts.stereo_mono = I2S_CTRL_STERO;
tls_i2s_port_init(&tls_i2s_port.opts);
if (i2s_tx_test == NULL)
{
return;
}
ptr = i2s_tx_test;
for (len = 0; len < 256; len++)
{
*ptr++ = 0xABCD0200 + len;
}
i2s_tx_test[255] = 0xABCD02FA;
tls_i2s_tx_dma(i2s_tx_test, 1024,tls_i2s_tx_dma_callback);
while(!tst_flag);
tst_flag = 0;
tls_i2s_tx_dma(i2s_tx_test, 1024,tls_i2s_tx_dma_callback);
while(!tst_flag);
tst_flag = 0;
}
#endif
#endif /** TLS_CONFIG_I2S */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Platform/Drivers/internalflash/wm_internal_fls.c
+1408
View File
File diff suppressed because it is too large Load Diff
sdk/Platform/Drivers/io/wm_io.c
+277
View File
@@ -0,0 +1,277 @@
/**
* @file wm_io.c
*
* @brief IO Driver Module
*
* @author lilm
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#include "wm_regs.h"
#include "wm_osal.h"
#include "wm_io.h"
#include "wm_dbg.h"
#include "tls_common.h"
static void io_cfg_option1(enum tls_io_name name)
{
u8 pin;
u16 offset;
if ( (WM_IO_PB_25 == name) || (WM_IO_PB_26 == name) || (WM_IO_PB_29 == name) )
{
TLS_DBGPRT_IO_ERR("io %u have no option1.\r\n", name);
return;
}
if (name >= WM_IO_PB_00)
{
pin = name - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = name;
offset = 0;
}
tls_reg_write32(HR_GPIO_AF_SEL + offset, tls_reg_read32(HR_GPIO_AF_SEL + offset) | BIT(pin)); /* gpio function */
tls_reg_write32(HR_GPIO_AF_S1 + offset, tls_reg_read32(HR_GPIO_AF_S1 + offset) & (~BIT(pin)));
tls_reg_write32(HR_GPIO_AF_S0 + offset, tls_reg_read32(HR_GPIO_AF_S0 + offset) & (~BIT(pin)));
return;
}
static void io_cfg_option2(enum tls_io_name name)
{
u8 pin;
u16 offset;
if ( (WM_IO_PB_13 == name) || (WM_IO_PB_27 == name) ||
(WM_IO_PB_31 == name) )
{
TLS_DBGPRT_IO_ERR("io %u have no option2.\r\n", name);
return;
}
if (name >= WM_IO_PB_00)
{
pin = name - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = name;
offset = 0;
}
tls_reg_write32(HR_GPIO_AF_SEL + offset, tls_reg_read32(HR_GPIO_AF_SEL + offset) | BIT(pin)); /* gpio function */
tls_reg_write32(HR_GPIO_AF_S1 + offset, tls_reg_read32(HR_GPIO_AF_S1 + offset) & (~BIT(pin)));
tls_reg_write32(HR_GPIO_AF_S0 + offset, tls_reg_read32(HR_GPIO_AF_S0 + offset) | BIT(pin));
return;
}
static void io_cfg_option3(enum tls_io_name name)
{
u8 pin;
u16 offset;
if ( (name == WM_IO_PB_19) || (name == WM_IO_PB_20) ||
(name >= WM_IO_PB_23) || (name == WM_IO_PA_00) ||
(name == WM_IO_PA_07) ||
((name >= WM_IO_PA_13) && (name <= WM_IO_PA_15)) )
{
TLS_DBGPRT_IO_ERR("io %u have no option3.\r\n", name);
return;
}
if (name >= WM_IO_PB_00)
{
pin = name - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = name;
offset = 0;
}
tls_reg_write32(HR_GPIO_AF_SEL + offset, tls_reg_read32(HR_GPIO_AF_SEL + offset) | BIT(pin)); /* gpio function */
tls_reg_write32(HR_GPIO_AF_S1 + offset, tls_reg_read32(HR_GPIO_AF_S1 + offset) | BIT(pin));
tls_reg_write32(HR_GPIO_AF_S0 + offset, tls_reg_read32(HR_GPIO_AF_S0 + offset) & (~BIT(pin)));
return;
}
static void io_cfg_option4(enum tls_io_name name)
{
u8 pin;
u16 offset;
if( (name == WM_IO_PA_00) || (name == WM_IO_PA_01) ||
(name == WM_IO_PA_06) ||
((name >= WM_IO_PA_13) && (name <= WM_IO_PA_15)) ||
((name >= WM_IO_PB_00) && (name <= WM_IO_PB_02)) ||
(name >= WM_IO_PB_19) )
{
TLS_DBGPRT_IO_ERR("io %u have no option4.\r\n", name);
return;
}
if (name >= WM_IO_PB_00)
{
pin = name - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = name;
offset = 0;
}
tls_reg_write32(HR_GPIO_AF_SEL + offset, tls_reg_read32(HR_GPIO_AF_SEL + offset) | BIT(pin)); /* gpio function */
tls_reg_write32(HR_GPIO_AF_S1 + offset, tls_reg_read32(HR_GPIO_AF_S1 + offset) | BIT(pin));
tls_reg_write32(HR_GPIO_AF_S0 + offset, tls_reg_read32(HR_GPIO_AF_S0 + offset) | BIT(pin));
return;
}
static void io_cfg_option5(enum tls_io_name name)
{
u8 pin;
u16 offset;
if (name >= WM_IO_PB_00)
{
pin = name - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = name;
offset = 0;
}
tls_reg_write32(HR_GPIO_AF_SEL + offset, tls_reg_read32(HR_GPIO_AF_SEL + offset) & (~BIT(pin))); /* disable gpio function */
return;
}
static void io_cfg_option6(enum tls_io_name name)
{
u8 pin;
u16 offset;
if( ((name >= WM_IO_PB_06)&&(name <= WM_IO_PB_18)) ||
((name >= WM_IO_PB_29)&&(name <= WM_IO_PB_31)))
{
TLS_DBGPRT_IO_ERR("io %u have no option6.\r\n", name);
return;
}
if (name >= WM_IO_PB_00)
{
pin = name - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = name;
offset = 0;
}
tls_reg_write32(HR_GPIO_AF_SEL + offset, tls_reg_read32(HR_GPIO_AF_SEL + offset) & (~BIT(pin))); /* disable gpio function */
tls_reg_write32(HR_GPIO_DIR + offset, tls_reg_read32(HR_GPIO_DIR + offset) & (~BIT(pin)));
tls_reg_write32(HR_GPIO_PULL_EN + offset, tls_reg_read32(HR_GPIO_PULL_EN + offset) & (~BIT(pin)));
return;
}
/**
* @brief This function is used to config io function
*
* @param[in] name io name
* @param[in] option io function option, value is WM_IO_OPT*_*, also is WM_IO_OPTION1-6
*
* @return None
*
* @note None
*/
void tls_io_cfg_set(enum tls_io_name name, u8 option)
{
if (WM_IO_OPTION1 == option)
io_cfg_option1(name);
else if (WM_IO_OPTION2 == option)
io_cfg_option2(name);
else if (WM_IO_OPTION3 == option)
io_cfg_option3(name);
else if (WM_IO_OPTION4 == option)
io_cfg_option4(name);
else if (WM_IO_OPTION5 == option)
io_cfg_option5(name);
else if (WM_IO_OPTION6 == option)
io_cfg_option6(name);
else
TLS_DBGPRT_IO_ERR("invalid io option.\r\n");
return;
}
/**
* @brief This function is used to get io function config
*
* @param[in] name io name
*
* @retval WM_IO_OPTION1~6 Mapping io function
*
* @note None
*/
int tls_io_cfg_get(enum tls_io_name name)
{
u8 pin;
u16 offset;
u32 afsel,afs1,afs0,dir,pullen;
if (name >= WM_IO_PB_00)
{
pin = name - WM_IO_PB_00;
offset = TLS_IO_AB_OFFSET;
}
else
{
pin = name;
offset = 0;
}
afsel = tls_reg_read32(HR_GPIO_AF_SEL + offset);
afs1 = tls_reg_read32(HR_GPIO_AF_S1 + offset);
afs0 = tls_reg_read32(HR_GPIO_AF_S0 + offset);
dir = tls_reg_read32(HR_GPIO_DIR + offset);
pullen = tls_reg_read32(HR_GPIO_PULL_EN + offset);
if(afsel&BIT(pin))
{
if((0==(afs1&BIT(pin))) && (0==(afs0&BIT(pin))))
return WM_IO_OPTION1;
else if((0==(afs1&BIT(pin))) && (afs0&BIT(pin)))
return WM_IO_OPTION2;
else if((afs1&BIT(pin)) && (0==(afs0&BIT(pin))))
return WM_IO_OPTION3;
else if((afs1&BIT(pin)) && (afs0&BIT(pin)))
return WM_IO_OPTION4;
}
else
{
if((!(dir&BIT(pin))) && (pullen&BIT(pin)))
return WM_IO_OPTION6;
else
return WM_IO_OPTION5;
}
return 0;
}

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