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build: W600-SDK importiert, Firmware-Build und Hello am EVK

Browse Source 
Docker-Build mit gcc-arm-none-eabi 4.9-2014q4 (statt Homebrew-Cask) verwendet,
Dockerfile/tools/docker.sh dafür aus Task 13 vorgezogen. cmake/sdk.cmake schont
gcc 4.9 (kennt -fcommon/-Wno-error=... nicht). Zwei zusätzliche SDK-Stubs
(EarlyInit, pre_gpio_config) in src/sys/sdk_stubs.c ergänzt, siehe sdk/PATCHES.md.
This commit is contained in:
Michael Sauer
2026-09-11 12:52:26 +02:00
parent 4e7ff78fc6
commit 1b0501179d
610 changed files with 224089 additions and 0 deletions
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sdk/Include/Driver/wm_7816.h
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/**************************************************************************//**
* @file wm_7816.h
* @author
* @version
* @date
* @brief
* @copyright (c) 2014 Winner Microelectronics Co., Ltd. All rights reserved.
*****************************************************************************/
#ifndef WM_7816_H_
#define WM_7816_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <string.h>
#include <stdbool.h>
#include "wm_regs.h"
#include "wm_type_def.h"
#include "wm_io.h"
#define WM_SC_RST_PIN WM_IO_PB_23 //(23)
#define WM_SC_PWR_PIN WM_IO_PB_29 //(29)
#define WM_SC_DEFAULT_FD (372)
typedef struct sc_io_map_ {
enum tls_io_name clk_pin_num;
uint32_t clk_opt;
enum tls_io_name io_pin_num;
uint32_t io_opt;
uint8_t initialed;
} sc_io_map;
extern sc_io_map sc_io;
/**
* @brief
* This function is used to config the pin in gpio or 7816 mode for the 7816 power on timing
*
* @param[in] mode : 1--gpio mode ; 0--7816 mode
*
* @retval
*/
void wm_sc_io_clk_config(uint8_t mode);
/**
* @brief
* close af to use as gpio
* @retval
*/
void wm_sc_powerInit(void);
/**
* @brief
* power on the 7816 device if power is controled by GPIO
* @retval
*/
void wm_sc_poweron(void);
/**
* @brief
* power off the 7816 device if power is controled by GPIO
* @retval
*/
void wm_sc_poweroff(void);
/**
* @brief
* drive the reset gpio in low level
* @retval
*/
void wm_sc_rst_low(void);
/**
* @brief
* driver the reset gpio in high level
* @retval
*/
void wm_sc_rst_high(void);
/**
* @brief
* hotrest the 7816 device obey the 7816-3 timing
* @retval
*/
void wm_sc_hotreset(void);
/**
* @brief
* colreset the 7816 device obey the 7816-3 timing
* @retval
*/
void wm_sc_colreset(void);
/**
* @brief
* deactive the 7816 device obey the 7816-3 timing
* @retval
*/
void wm_sc_deactive(void);
/**
* @brief
* This function is used to config the block guard time param in 7816 mode
* @param[in] bgt : the value of blcok guard time will be set
* @retval
*/
void wm_sc_set_bgt(uint8_t bgt);
/**
* @brief
* This function is used to config the tx retry count when detect err signal
* @param[in] count : the value of retry time will be set 7 for max
* @retval
*/
void wm_sc_tx_retry_times(uint8_t count);
/**
* @brief
* This function is used to config the rx retry count when detect parity error
* @param[in] count : the value of retry time will be set 7 for max
* @retval
*/
void wm_sc_rx_retry_times(uint8_t count);
/**
* @brief
* This function is used to config the etu param
* @param[in] etu : the value of etu will be set
* @retval
*/
void wm_sc_set_etu(uint16_t etu);
/**
* @brief
* This function config the module clock freq
* @param[in] freq : the value of clock freq
* @retval
*/
void wm_sc_set_frequency(uint32_t freq);
/**
* @brief
* config recv or not when parity error
* @param[in] bl : 1--- recv
* 0--- don't recv
* @retval
*/
static inline void wm_sc_parity_recv(bool bl)
{
tls_bitband_write(HR_UART2_LINE_CTRL, 9, bl);
}
/**
* @brief
* select the model in 7816 or uart function
* @param[in] bl : 1---7816 mode
* 0---uart mode
* @retval
*/
static inline void wm_sc_7816_mode(bool bl)
{
tls_bitband_write(HR_UART2_LINE_CTRL, 24, bl);
}
/**
* @brief
* This function is used to config the guard time param
* @param[in] bwt : the value of the guard time will be set
* @retval
*/
static inline void wm_sc_set_guardtime(uint8_t gt)
{
tls_reg_write32(HR_UART2_GUARD_TIME, gt);
}
/**
* @brief
* This function is used to config the CWT or BWT param
* @param[in] bwt : the value of CWT or BWT will be set
* @retval
*/
static inline void wm_sc_set_bcwt(uint32_t bwt)
{
bwt = (bwt > 0xFFFFFF) ? 0xFFFFFF : bwt;
tls_reg_write32(HR_UART2_WAIT_TIME, bwt);
}
/**
* @brief
* module errsignal int enable or disable
* @param[in] bl : 1---enable
* 0---disable
* @retval
*/
static inline void wm_sc_tx_errsignal_mask(bool bl)
{
tls_bitband_write(HR_UART2_INT_MASK, 9, bl);
}
/**
* @brief
* config the module protol
* @param[in] bl : 1--- T1 protocol
* 0--- T0 protocol
* @retval
*/
static inline void wm_sc_set_protocol(bool bl)
{
tls_bitband_write(HR_UART2_LINE_CTRL, 8, bl);
}
/**
* @brief
* get the module protol
* @retval
* 1--- T1 protocol
* 0--- T0 protocol
*/
static inline uint8_t wm_sc_get_protocol()
{
return tls_bitband_read(HR_UART2_LINE_CTRL, 8);
}
/**
* @brief
* smart card clock output enable or disable
* @param[in] bl : 0---enable;
* 1---disable;
* @retval
*/
static inline void wm_sc_clk_enable(bool bl)
{
tls_bitband_write(HR_UART2_LINE_CTRL, 10, bl);
}
#ifdef __cplusplus
}
#endif
#endif
sdk/Include/Driver/wm_adc.h
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/**
* @file wm_adc.h
*
* @brief ADC Driver Module
*
* @author
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_ADC_H
#define WM_ADC_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_type_def.h"
/** ADC MACRO */
//每次启动dma之后，需要一段稳定时间，所以采集到的数据前面的12个byte不稳定，要舍去
#define ADC_DEST_BUFFER_DMA (u32)0x20028000
#define ADC_DEST_BUFFER_SIZE 65532
#define SAMPLE_NUM_PER_CHANNEL 20
#define CONFIG_ADC_CAL_OFFSET_TEMP12 (1<<23)
#define CONFIG_ADC_G_CTRL12 (1<<22)
#define CONFIG_ADC_CMP_POL (1<<21)
#define CONFIG_ADC_REF_SEL (1<<20)
#define CONFIG_ADC_BUF_BYPASS (1<<19)
#define CONFIG_ADC_DMA_MASK (0xFF<<11)
#define CONFIG_ADC_EN_CAL (1<<10)
#define CONFIG_ADC_INT_CMP (1<<9)
#define CONFIG_ADC_INT (1<<8)
#define CONFIG_ADC_CMP_INT_MASK (1<<7)
#define CONFIG_ADC_INT_MASK (1<<6)
#define CONFIG_ADC_TEMP_ON (1<<5)
#define CONFIG_ADC_START (1<<4)
#define CONFIG_ADC_CHL_MASK (0xF)
#define CONFIG_ADC_CHL_OFFSET (0x0E)
#define CONFIG_ADC_CHL_VOLT (0x0D)
#define CONFIG_ADC_CHL_TEMP (0x0C)
#define CONFIG_ADC_INPUT_CMP_VAL(n) ((n&0x3FFF)<<14)
#define CONFIG_ADC_VCM(n) (((u32)n&0x3F)<<26)
#define CONFIG_ADC_G_TEMP12(n) ((n&0x03)<<24)
#define ADC_INT_TYPE_ADC 0
#define ADC_INT_TYPE_DMA 1
#define ADC_INT_TYPE_ADC_COMP 2
#define ADC_REFERENCE_EXTERNAL 0 //外部参考
#define ADC_REFERENCE_INTERNAL 1 //内部参考
typedef struct adc_st{
u8 dmachannel;
void (*adc_cb)(u16 *buf, u16 len);
void (*adc_bigger_cb)(u16 *buf, u16 len);
void (*adc_dma_cb)(u16 *buf,u16 len);
u16 valuelen; /*dma 采样数据长度*/
u16 offset;
}ST_ADC;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup ADC_Driver_APIs ADC Driver APIs
* @brief ADC driver APIs
*/
/**
* @addtogroup ADC_Driver_APIs
* @{
*/
/**
* @brief This function is used to init ADC
*
* @param[in] ifusedma if use dma
* @param[in] dmachannel dma channel
*
* @return None
*
* @note If the requested dma channel is already used by other task, system will auto use other dma channel.
*/
void tls_adc_init(u8 ifusedma,u8 dmachannel);
/**
* @brief This function is used to register interrupt callback function
*
* @param[in] inttype interrupt type
* ADC_INT_TYPE_ADC adc interrupt,user get adc result from the callback function.
* ADC_INT_TYPE_DMA dma interrupt,dma transfer the adc result to the user's buffer.
* @param[in] callback interrupt callback function
*
* @return None
*
* @note None
*/
void tls_adc_irq_register(int inttype, void (*callback)(u16 *buf, u16 len));
/**
* @brief This function is used to clear the interrupt source
*
* @param[in] inttype interrupt type
* ADC_INT_TYPE_ADC adc interrupt,user get adc result from the callback function.
* ADC_INT_TYPE_DMA dma interrupt,dma transfer the adc result to the user's buffer.
* ADC_INT_TYPE_ADC_COMP adc compare with setting data
*
* @return None
*
* @note None
*/
void tls_adc_clear_irq(int inttype);
/**
* @brief This function is used to start adc,use dma for transfer data
*
* @param[in] channel adc channel,from 0 to 3 is single input;4 and 5 is differential input
*
* @param[in] length byte data length,is an integer multiple of half word,need <= 0x500
*
* @return None
*
* @note None
*/
void tls_adc_start_with_dma(int Channel, int Length);
/**
* @brief This function is used to start adc,use cpu
*
* @param[in] channel adc channel,from 0 to 3 is single input;4 and 5 is differential input
*
* @return None
*
* @note None
*/
void tls_adc_start_with_cpu(int Channel);
/**
* @brief This function is used to enable input buffer calibration
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_adc_enable_calibration_buffer_offset(void);
/**
* @brief This function is used to sample voltage using cpu
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_adc_voltage_start_with_cpu(void);
/**
* @brief This function is used to sample temperature using cpu
*
* @param[in] calenflag 1:enable calibration , 0: disable calibration
*
* @return None
*
* @note None
*/
void tls_adc_temp_offset_with_cpu(u8 calenflag);
/**
* @brief This function is used to read adc result
*
* @param[in] None
*
* @return The value of adc result
*
* @note The 14th bit of the return value is the symbol bit
*/
u16 tls_read_adc_result(void);
/**
* @brief This function is used to stop the adc
*
* @param[in] ifusedma 1:use dma, 0:not use dma
*
* @return None
*
* @note None
*/
void tls_adc_stop(int ifusedma);
/**
* @brief This function is used to config adc compare register
*
* @param[in] cmp_data compare data
*
* @param[in] cmp_pol compare polarity
*
* @return None
*
* @note None
*/
void tls_adc_config_cmp_reg(int cmp_data, int cmp_pol);
/**
* @brief This function is used to set adc reference source
*
* @param[in] ref
* ADC_REFERENCE_EXTERNAL
* ADC_REFERENCE_INTERNAL
*
* @return None
*
* @note None
*/
void tls_adc_reference_sel(int ref);
/**
* @brief This function is used to set clock division
*
* @param[in] div
*
* @return None
*
* @note None
*/
void tls_adc_set_clk(int div);
void signedToUnsignedData(u16 *adcValue, u16 *offset);
/**
* @brief This function is used to set buffer bypass
*
* @param[in] isset 1: buffer bypass, 0: buffer work
*
* @return None
*
* @note None
*/
void tls_adc_buffer_bypass_set(u8 isset);
/**
* @brief This function is used to start compare
*
* @param[in] Channel sample channel
*
* @param[in] cmp_data compare data
*
* @param[in] cmp_pol compare polarity
*
* @return None
*
* @note None
*/
void tls_adc_cmp_start(int Channel, int cmp_data, int cmp_pol);
u16 adc_get_offset(void);
u32 adc_get_interTemp(void);
u16 adc_get_inputVolt(u8 channel);
u16 adc_get_interVolt(void);
u32 adc_temp(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_ADC_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_cpu.h
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/**
* @file wm_cpu.h
*
* @brief cpu driver module
*
* @author dave
*
* @copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_CPU_H
#define WM_CPU_H
#ifdef __cplusplus
extern "C" {
#endif
/** cpu clock: 80Mhz */
#define CPU_CLK_80M 0
/** cpu clock: 40Mhz */
#define CPU_CLK_40M 1
#define CPU_CLK_16M 2
#define W600_PLL_CLK_MHZ 160
#define UNIT_MHZ (1000000)
typedef struct{
u32 apbclk;
u32 cpuclk;
u32 wlanclk;
}tls_sys_clk;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup CPU_CLOCK_Driver_APIs CPU_CLOCK Driver APIs
* @brief CPU_CLOCK driver APIs
*/
/**
* @addtogroup CPU_CLOCK_Driver_APIs
* @{
*/
/**
* @brief This function is used to set cpu clock
*
* @param[in] clk select cpu clock
clk == CPU_CLK_80M 80M
clk == CPU_CLK_40M 40M
*
* @return None
*
* @note None
*/
void tls_sys_clk_set(u32 clk);
/**
* @brief This function is used to get cpu clock
*
* @param[out] *sysclk point to the addr for system clk output
*
* @return None
*
* @note None
*/
void tls_sys_clk_get(tls_sys_clk *sysclk);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_CPU_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_dma.h
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/**
* @file wm_dma.h
*
* @brief DMA Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_DMA_H_
#define __WM_DMA_H_
#ifdef __cplusplus
extern "C" {
#endif
#define TLS_DMA_SEL_UART_RX 0
#define TLS_DMA_SEL_UART_TX 1
#define TLS_DMA_SEL_PWM_CAP0 2
#define TLS_DMA_SEL_PWM_CAP1 3
#define TLS_DMA_SEL_LSSPI_RX 4
#define TLS_DMA_SEL_LSSPI_TX 5
#define TLS_DMA_SEL_SDADC_CH0 6
#define TLS_DMA_SEL_SDADC_CH1 7
#define TLS_DMA_SEL_SDADC_CH2 8
#define TLS_DMA_SEL_SDADC_CH3 9
#define TLS_DMA_SEL_SDADC_CH4 10
#define TLS_DMA_SEL_SDADC_CH5 11
#define TLS_DMA_SEL_SDADC_CH6 12
#define TLS_DMA_SEL_SDADC_CH7 13
#define TLS_DMA_SEL_I2S_RX 14
#define TLS_DMA_SEL_I2S_TX 15
#define TLS_DMA_FLAGS_HARD_MODE (1 << 0)
#define TLS_DMA_FLAGS_CHAIN_MODE (1 << 1)
#define TLS_DMA_FLAGS_CHANNEL_SEL(n) ((n) << 2)
#define TLS_DMA_FLAGS_CHAIN_LINK_EN (1 << 6)
#define TLS_DMA_FLAGS_CHANNEL_VALID (1 << 7)
#define TLS_DMA_DESC_VALID (1U << 31)
#define TLS_DMA_DESC_CTRL_SRC_ADD_INC (1 << 0)
#define TLS_DMA_DESC_CTRL_DEST_ADD_INC (1 << 2)
#define TLS_DMA_DESC_CTRL_DATA_SIZE_BYTE (0 << 4)
#define TLS_DMA_DESC_CTRL_DATA_SIZE_SHORT (1 << 4)
#define TLS_DMA_DESC_CTRL_DATA_SIZE_WORD (2 << 4)
#define TLS_DMA_DESC_CTRL_BURST_SIZE1 (0 << 6)
#define TLS_DMA_DESC_CTRL_BURST_SIZE4 (1 << 6)
#define TLS_DMA_DESC_CTRL_TOTAL_BYTES(n) ((n) << 7)
/* dma interrupt flags */
#define TLS_DMA_IRQ_BURST_DONE (1 << 0)
#define TLS_DMA_IRQ_TRANSFER_DONE (1 << 1)
#define TLS_DMA_IRQ_BOTH_DONE (TLS_DMA_IRQ_BURST_DONE | TLS_DMA_IRQ_TRANSFER_DONE)
struct tls_dma_descriptor {
unsigned int valid;
unsigned int dma_ctrl;
unsigned int src_addr;
unsigned int dest_addr;
struct tls_dma_descriptor *next; /**< next dms descriptor */
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup DMA_Driver_APIs DMA Driver APIs
* @brief DMA driver APIs
*/
/**
* @addtogroup DMA_Driver_APIs
* @{
*/
/**
* @brief This function is used to clear dma interrupt flag.
*
* @param[in] ch Channel no.[0~7]
* @param[in] flags Flags setted to TLS_DMA_IRQ_BURST_DONE, TLS_DMA_IRQ_TRANSFER_DONE, TLS_DMA_IRQ_BOTH_DONE.
*
* @return None
*
* @note None
*/
void tls_dma_irq_clr(unsigned char ch, unsigned char flags);
/**
* @brief This function is used to register dma interrupt callback function.
*
* @param[in] ch Channel no.[0~7]
* @param[in] callback is the dma interrupt call back function.
* @param[in] arg the param of the callback function.
* @param[in] flags Flags setted to TLS_DMA_IRQ_BURST_DONE, TLS_DMA_IRQ_TRANSFER_DONE, TLS_DMA_IRQ_BOTH_DONE.
*
* @return None
*
* @note None
*/
void tls_dma_irq_register(unsigned char ch, void (*callback)(void *p), void *arg, unsigned char flags);
/**
* @brief This function is used to Wait until DMA operation completes
*
* @param[in] ch DMA channel no.[0~7]
*
* @return 0 completed
* @return -1 failed
*
* @note None
*/
int tls_dma_wait_complt(unsigned char ch);
/**
* @brief This function is used to Start the DMA controller by Wrap
*
* @param[in] autoReload Does restart when current transfer complete?
* @param[in] ch Channel no.[0~7]
* @param[in] pDmaDesc Pointer to DMA channel descriptor structure.
*
* @retval Always STATUS_SUCCESS.
*
* @note
* DMA Descriptor:
* +--------------------------------------------------------------+
* |Vld[31] | RSV |
* +--------------------------------------------------------------+
* | RSV | Dma_Ctrl[16:0] |
* +--------------------------------------------------------------+
* | Src_Addr[31:0] |
* +--------------------------------------------------------------+
* | Dest_Addr[31:0] |
* +--------------------------------------------------------------+
* | Next_Desc_Add[31:0] |
* +--------------------------------------------------------------+
*/
unsigned char tls_dma_start_by_wrap(unsigned char ch, struct tls_dma_descriptor *dma_desc,
unsigned char auto_reload, unsigned short src_zize,
unsigned short dest_zize);
/**
* @brief This function is used for Starting the DMA controller
*
* @param[in] ch Channel no.[0~7]
* @param[in] pDmaDesc Pointer to DMA channel descriptor structure.
* @param[in] autoReload Does restart when current transfer complete?
*
* @retval 0 success
* @retval 1 failed
*
* @note
* DMA Descriptor:
* +--------------------------------------------------------------+
* |Vld[31] | RSV |
* +--------------------------------------------------------------+
* | RSV | Dma_Ctrl[16:0] |
* +--------------------------------------------------------------+
* | Src_Addr[31:0] |
* +--------------------------------------------------------------+
* | Dest_Addr[31:0] |
* +--------------------------------------------------------------+
* | Next_Desc_Add[31:0] |
* +--------------------------------------------------------------+
*/
unsigned char tls_dma_start(unsigned char ch, struct tls_dma_descriptor *dma_desc,
unsigned char auto_reload);
/**
* @brief This function is used to To stop current DMA channel transfer
*
* @param[in] ch channel no. to be stopped
*
* @retval 0 success
* @retval 1 failed
*
* @note If channel stop, DMA_CHNL_CTRL_CHNL_ON bit in DMA_CHNLCTRL_REG is cleared.
*/
unsigned char tls_dma_stop(unsigned char ch);
/**
* @brief This function is used to Request a free dma channel.
* If ch is 0, the function will select a random free channel,
* else return the selected channel no. if free.
*
* @param[in] ch channel no.
* @param[in] flags flags setted to selected channel
*
* @return Channel no. that is free now
*
* @note Channel no. that is free now
*/
unsigned char tls_dma_request(unsigned char ch, unsigned char flags);
/**
* @brief This function is used to Free the DMA channel when not use
*
* @param[in] ch channel no. that is ready to free
*
* @return None
*
* @note None
*/
void tls_dma_free(unsigned char ch);
/**
* @brief This function is used to Initialize DMA Control
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_dma_init(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of __WM_DMA_H_ */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_efuse.h
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/**
* @file wm_efuse.h
*
* @brief virtual efuse Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_EFUSE_H
#define WM_EFUSE_H
#define TLS_EFUSE_STATUS_OK (0)
#define TLS_EFUSE_STATUS_EINVALID (1)
#define TLS_EFUSE_STATUS_EIO (2)
#define TLS_EFUSE_STATUS_ERR (-1)
enum {
CMD_MAC = 0x01,
CMD_TX_DC,
CMD_RX_DC,
CMD_TX_IQ_GAIN,
CMD_RX_IQ_GAIN,
CMD_TX_IQ_PHASE,
CMD_RX_IQ_PHASE,
CMD_TX_GAIN,
CMD_ALL,
};
#define VCG_ADDR (FT_MAGICNUM_ADDR + sizeof(FT_PARAM_ST)+4)
#define VCG_LEN (4)
//#define TX_GAIN_NEW_ADDR (VCG_ADDR+VCG_LEN)
#define TX_GAIN_LEN (28*3)
/**
* @brief This function is used to init ft param.
*
* @param[in] None
*
* @retval TRUE init success
* @retval FALSE init failed
*/
int tls_ft_param_init(void);
/**
* @brief This function is used to write ft_param.
*
* @param[in] opnum ft cmd
* @param[in] data data pointer
* @param[in] len the length written into "data"
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_ft_param_set(unsigned int opnum, void *data, unsigned int len);
/**
* @brief This function is used to read ft_param.
*
* @param[in] opnum ft cmd
* @param[in] data data pointer
* @param[in] len len to read data
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_ft_param_get(unsigned int opnum, void *data, unsigned int rdlen);
/**
* @brief This function is used to get mac addr
*
* @param[in] mac mac addr,6 byte
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_mac_addr(u8 *mac);
/**
* @brief This function is used to set mac addr
*
* @param[in] mac mac addr,6 byte
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_mac_addr(u8 *mac);
/**
* @brief This function is used to get tx gain
*
* @param[in] txgain tx gain,12 byte
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_tx_gain(u8 *txgain);
/**
* @brief This function is used to set tx gain
*
* @param[in] txgain tx gain,12 byte
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_tx_gain(u8 *txgain);
/**
* @brief This function is used to get tx lod
*
* @param[in] txlo tx lod
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_tx_lo(u8 *txlo);
/**
* @brief This function is used to set tx lod
*
* @param[in] txlo tx lod
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_tx_lo(u8 *txlo);
/**
* @brief This function is used to get tx iq gain
*
* @param[in] txGain
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_tx_iq_gain(u8 *txGain);
/**
* @brief This function is used to set tx iq gain
*
* @param[in] txGain
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_tx_iq_gain(u8 *txGain);
/**
* @brief This function is used to get rx iq gain
*
* @param[in] rxGain
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_rx_iq_gain(u8 *rxGain);
/**
* @brief This function is used to set rx iq gain
*
* @param[in] rxGain
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_rx_iq_gain(u8 *rxGain);
/**
* @brief This function is used to get tx iq phase
*
* @param[in] txPhase
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_tx_iq_phase(u8 *txPhase);
/**
* @brief This function is used to set tx iq phase
*
* @param[in] txPhase
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_tx_iq_phase(u8 *txPhase);
/**
* @brief This function is used to get rx iq phase
*
* @param[in] rxPhase
*
* @retval 0 get success
* @retval -1 get failed
*/
int tls_get_rx_iq_phase(u8 *rxPhase);
/**
* @brief This function is used to set rx iq phase
*
* @param[in] rxPhase
*
* @retval 0 set success
* @retval -1 set failed
*/
int tls_set_rx_iq_phase(u8 *rxPhase);
/**
* @brief This function is used to set/get freq err
*
* @param[in] freqerr
* @param[in] flag 1-set 0-get
*/
int tls_freq_err_op(u8 *freqerr, u8 flag);
/**
* @brief This function is used to set/get vcg ctrl
*
* @param[in] vcg
* @param[in] flag 1-set 0-get
*
*/
int tls_rf_vcg_ctrl_op(u8 *vcg, u8 flag);
/**
* @brief This function is used to get chip ID
*
* @param[out] chip_id
*
*/
int tls_get_chipid(u8 chip_id[16]);
/**
* @brief This function is used for a delay of several seconds
*
* @param[in] seconds
*
* @retval 0
*/
unsigned int tls_sleep(unsigned int seconds);
/**
* @brief This function is used for a delay of several milliseconds
*
* @param[in] msec
*
* @retval 0
*/
int tls_msleep(unsigned int msec);
/**
* @brief This function is used for a delay of several microseconds
*
* @param[in] usec
*
* @retval 0
*/
int tls_usleep(unsigned int usec);
/**********************************************************************************************************
* Description: This function is used to get uuid
*
* Arguments : *uuid
*
* Returns : 0 get success
* -1 get failed
**********************************************************************************************************/
int tls_get_uuid(u8 *uuid, u8 len);
/**********************************************************************************************************
* Description: This function is used to get uuid
*
* Arguments : *uuid :data to be written to otp area
* len : data len to be written
* iflock : if lock the otp area,1-lock, once lock,can not unlock!!!
*
* Returns : 0 get success
* -1 get failed
**********************************************************************************************************/
int tls_set_uuid(u8 *uuid, u8 len, u8 iflock);
#endif /* WM_EFUSE_H */
sdk/Include/Driver/wm_flash.h
+203
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/**
* @file wm_flash.h
*
* @brief flash Driver module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_FLASH_H
#define WM_FLASH_H
#include "wm_type_def.h"
#include "wm_osal.h"
#define TLS_FLS_STATUS_OK (0)
#define TLS_FLS_STATUS_EINVAL (1)
#define TLS_FLS_STATUS_EBUSY (2)
#define TLS_FLS_STATUS_EPERM (3)
#define TLS_FLS_STATUS_ENOSUPPORT (4)
#define TLS_FLS_STATUS_EEXIST (5)
#define TLS_FLS_STATUS_ENOMEM (6)
#define TLS_FLS_STATUS_EOVERFLOW (7)
#define TLS_FLS_STATUS_ENODEV (8)
#define TLS_FLS_STATUS_EDEV (9)
#define TLS_FLS_STATUS_EIO (10)
#define TLS_FLS_STATUS_ENODRV (11)
#define TLS_FLS_PARAM_TYPE_ID (0)
#define TLS_FLS_PARAM_TYPE_SIZE (1)
#define TLS_FLS_PARAM_TYPE_PAGE_SIZE (2)
#define TLS_FLS_PARAM_TYPE_PROG_SIZE (3)
#define TLS_FLS_PARAM_TYPE_SECTOR_SIZE (4)
#define TLS_FLS_FLAG_UNDER_PROTECT (1<<0)
#define TLS_FLS_FLAG_FAST_READ (1<<1)
#define TLS_FLS_FLAG_AAAI (1<<2)
#define FLS_CMD_READ_DEV_ID (0x9F) // read device id //(0x9f)
/**
* @struct fls_list list
*/
struct fls_list
{
struct fls_list *next;
struct fls_list *prev;
};
/**
* @struct tls_fls_drv flash driver
*/
struct tls_fls_drv
{
struct fls_list drv_list;
u32 id;
u32 total_size;
u32 page_size;
u32 program_size;
u32 sector_size;
u32 clock;
u8 mode;
u8 cs_active;
u8 flags;
int (*read) (u32, u8 *, u32);
int (*fast_read) (u32, u8 *, u32);
int (*page_write) (u32, u8 *);
int (*erase) (u32);
int (*chip_erase) (void);
int (*probe)(u32 id);
void (*remove) (void);
};
/**
* @struct tls_fls flash
*/
struct tls_fls
{
struct fls_list fls_drvs;
struct tls_fls_drv *current_drv;
tls_os_sem_t *fls_lock;
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup SPIFLASH_Driver_APIs SPIFLASH Driver APIs
* @brief SPIFLASH driver APIs
*/
/**
* @addtogroup SPIFLASH_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial flash module structer.
*
* @param[in] None
*
* @retval TLS_FLS_STATUS_OK if init sucsess
* @retval TLS_FLS_STATUS_EBUSY if already inited
* @retval TLS_FLS_STATUS_ENOMEM if memory allocation failed
*
* @note None
*/
int tls_spifls_init(void);
/**
* @brief This function is used to read the id of the flash.
*
* @param[in] id Buffer to hold the id that been read.
*
* @retval TLS_FLS_STATUS_OK if read sucsess
* @retval TLS_FLS_STATUS_EIO if read fail
*
* @note None
*/
int tls_spifls_read_id(u32 * id);
/**
* @brief This function is used to read data from the flash.
*
* @param[in] addr Specifies the starting address to read from
* @param[in] buf Pointer to a byte array that is to be written.
* @param[in] len length to read.
*
* @retval TLS_FLS_STATUS_OK if read success
* @retval TLS_FLS_STATUS_EIO if read fail
* @retval TLS_FLS_STATUS_EPERM if flash driver module not beed installed
* @retval TLS_FLS_STATUS_ENODRV if the current spi flash driver not installed
* @retval TLS_FLS_STATUS_EINVAL if arguments is invalid
*
* @note None
*/
int tls_spifls_read(u32 addr, u8 * buf, u32 len);
/**
* @brief This function is used to write data into the flash.
*
* @param[in] addr Specifies the starting address to write to.
* @param[in] buf Pointer to a byte array that holds the data to be written.
* @param[in] len length to write.
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
* @retval TLS_FLS_STATUS_ENOMEM if memory allocation fail
*
* @note None
*/
int tls_spifls_write(u32 addr, u8 * buf, u32 len);
/**
* @brief This function is used to erase one sector of the flash.
*
* @param[in] sector Specifies the sector number to be erased..
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
*
* @note None
*/
int tls_spifls_erase(u32 sector);
/**
* @brief This function is used to erase the flash.
*
* @param[in] None
*
* @retval TLS_FLS_STATUS_OK if init sucsess
* @retval TLS_FLS_STATUS_EBUSY already inited
* @retval TLS_FLS_STATUS_ENOMEM memory error
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
*
* @note None
*/
int tls_spifls_chip_erase(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_FLASH_H */
sdk/Include/Driver/wm_flash_map.h
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/**
* @file wm_flash_map.h
*
* @brief flash zone map
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_FLASH_MAP_H__
#define __WM_FLASH_MAP_H__
/**FLASH MAP**/
/**Flash Base Address */
#define FLASH_BASE_ADDR (0x08000000UL)
#define FLASH_1M_END_ADDR (0x08100000UL)
/**Run-time image header area*/
#define CODE_RUN_HEADER_ADDR (0x08010000UL)
#define CODE_RUN_HEADER_AREA_LEN (0x100)
/**Run-time image area*/
#define CODE_RUN_START_ADDR (0x08010100UL)
/********************************************************
******************LAYOUT For 1M Flash**********************
*Reserved 0x8000000-0x8010000 64Kbyte
*Code 0x8010100-0x808FFFF 512Kbyte - 256 byte
*Update 0x8090000-0x80EFFFF 384Kbyte
*User 0x80F0000-0x80FBFFF 48Kbyte
*Parameter 0x80FC000-0x80FFFFF 16Kbyte
*********************************************************
**************LAYOUT For 2M Flash as 1M LAYOUT**************
*Reserved 0x8000000-0x8010000 64Kbyte
*Code 0x8010100-0x80FFFFF 896Kbyte -256byte
*Old User Area 0x80F0000-0x80FBFFF 48Kbyte
*Parameter 0x80FC000-0x80FFFFF 16Kbyte
*Update 0x8100000-0x81AFFFF 704Kbyte
*EXT User 0x81B0000-0x81FFFFF 320Kbyte
*********************************************************
******************LAYOUT For 2M Flash*********************
*Reserved 0x8000000-0x8010000 64Kbyte
*Code 0x8010100-0x80FFFFF 960Kbyte -256byte
*Update 0x8100000-0x81BFFFF 768Kbyte
*User 0x81C0000-0x81FBFFF 240Kbyte
*Parameter 0x81FC000-0x81FFFFF 16Kbyte
*********************************************************
*********************************************************/
/**Run-time image area size*/
extern unsigned int CODE_RUN_AREA_LEN;
/**Area can be used by User in 1M position*/
extern unsigned int USER_ADDR_START;
extern unsigned int TLS_FLASH_PARAM_DEFAULT;
extern unsigned int USER_AREA_LEN;
extern unsigned int USER_ADDR_END;
/**Upgrade image header area & System parameter area */
extern unsigned int CODE_UPD_HEADER_ADDR;
extern unsigned int TLS_FLASH_PARAM1_ADDR;
extern unsigned int TLS_FLASH_PARAM2_ADDR;
extern unsigned int TLS_FLASH_PARAM_RESTORE_ADDR;
/**Upgrade image area*/
extern unsigned int CODE_UPD_START_ADDR;
extern unsigned int CODE_UPD_AREA_LEN;
/**Area can be used by User in 2M position*/
extern unsigned int EX_USER_ADDR_START;
extern unsigned int EX_USER_AREA_LEN;
extern unsigned int EX_USER_ADDR_END;
extern unsigned int TLS_FLASH_END_ADDR;
#define SIGNATURE_WORD 0xa0ffff9f
#endif /*__WM_CONFIG_H__*/
sdk/Include/Driver/wm_fls_gd25qxx.h
+60
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/**
* @file wm_fls_gd25qxx.h
*
* @brief wm gd25qxx flash driver
*
* @author dave
*
* @copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef TLS_EXSPIFLS_H
#define TLS_EXSPIFLS_H
#define SPI_SCLK (10000000) /** 10MHz. */
#define FLASH_TOTAL_SIZE (1024*1024)
#define PAGE_SIZE 256
#define PROGRAM_SIZE 256
#define PAGE_ADDR_OFFSET 8
#define SECTOR_SIZE 4096
/**
* command code define.
*/
#define EXSPIFLASH_WRITE_ENABLE (0x06) /** Global write enable */
#define EXSPIFLASH_WRITE_DISABLE (0x04) /** Global write disable */
#define EXSPIFLASH_READ_SR1 (0x05) /** Read flash status register s0~s7 */
#define EXSPIFLASH_READ_SR2 (0x35) /** Read flash status register s8~s15 */
#define EXSPIFLASH_WRITE_SR (0x01) /** Write flash status register s0~s15 */
#define EXSPIFLASH_PAGE_PROGRAM (0x02) /** program one page */
#define EXSPIFLASH_DATA_READ (0x03) /** read data from specified address */
#define EXSPIFLASH_DATA_FAST_READ (0x0b) /** fast read data from specified address */
#define EXSPIFLASH_SECTOR_ERASE (0x20) /** Sector erase */
#define EXSPIFLASH_BLOCK32_ERASE (0x52) /** 32KB Block erase(128 pages) */
#define EXSPIFLASH_BLOCK64_ERASE (0xd8) /** 64kb Block erase(256 pages) */
#define EXSPIFLASH_CHIP_ERASE (0xc7) /** Chip erase */
#define EXSPIFLASH_FLASH_DEVICEID (0x90) /** Read flash manufacturer/device ID */
#define EXSPIFLASH_FLASH_ID (0x9f) /** Read flash ID */
#define FLASH_STATUS_BUSY (1 << 0)
#define FLASH_STATUS_WEL (1 << 1)
/**
* @brief This function is used to install gd25qxx driver.
*
* @param[in] None
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
* @retval TLS_FLS_STATUS_EEXIST if driver is already existed
*
* @note None
*/
int tls_spifls_drv_install(void);
#endif /* TLS_FLS_GD25QXX_H */
sdk/Include/Driver/wm_gpio.h
+190
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/**
* @file wm_gpio.h
*
* @brief GPIO Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_GPIO_H
#define WM_GPIO_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_type_def.h"
#include "wm_io.h"
/** gpio interrupte callback function */
typedef void (*tls_gpio_irq_callback)(void *arg);
/** Indicating gpio direction */
enum tls_gpio_dir {
WM_GPIO_DIR_OUTPUT, /**< output */
WM_GPIO_DIR_INPUT /**< input */
};
/** Indicating gpio attribute */
enum tls_gpio_attr {
WM_GPIO_ATTR_FLOATING, /**< floating status */
WM_GPIO_ATTR_PULLHIGH, /**< pull high */
WM_GPIO_ATTR_PULLLOW /**< pull low */
};
/** Indicating gpio interrupt trigger type */
enum tls_gpio_irq_trig {
WM_GPIO_IRQ_TRIG_RISING_EDGE, /**< rising edge arises the interrupt */
WM_GPIO_IRQ_TRIG_FALLING_EDGE, /**< falling edge arises the interrupt */
WM_GPIO_IRQ_TRIG_DOUBLE_EDGE, /**< both rising edge and falling edge arise the interrupt */
WM_GPIO_IRQ_TRIG_HIGH_LEVEL, /**< high power level arises the interrupt */
WM_GPIO_IRQ_TRIG_LOW_LEVEL /**< low power level arises the interrupt */
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup GPIO_Driver_APIs GPIO Driver APIs
* @brief GPIO driver APIs
*/
/**
* @addtogroup GPIO_Driver_APIs
* @{
*/
/**
* @brief This function is used to config gpio function
*
* @param[in] gpio_pin gpio pin num
* @param[in] dir gpio direction
* @param[in] attr gpio attribute
*
* @return None
*
* @note
* All gpio's attribute can only be set as WM_GPIO_ATTR_FLOATING or WM_GPIO_ATTR_PULLHIGH on W600/W601.
*/
void tls_gpio_cfg(enum tls_io_name gpio_pin, enum tls_gpio_dir dir, enum tls_gpio_attr attr);
/**
* @brief This function is used to read gpio status
*
* @param[in] gpio_pin gpio pin num
*
* @retval 0 low level
* @retval 1 high level
*
* @note None
*/
u8 tls_gpio_read(enum tls_io_name gpio_pin);
/**
* @brief This function is used to modify gpio status
*
* @param[in] gpio_pin gpio pin num
* @param[in] value electrical level
* 0: low level
* 1: high level
*
* @return None
*
* @note None
*/
void tls_gpio_write(enum tls_io_name gpio_pin, u8 value);
/**
* @brief This function is used to config gpio interrupt
*
* @param[in] gpio_pin gpio pin num
* @param[in] mode interrupt trigger type
*
* @return None
*
* @note None
*/
void tls_gpio_irq_enable(enum tls_io_name gpio_pin, enum tls_gpio_irq_trig mode);
/**
* @brief This function is used to disable gpio interrupt
*
* @param[in] gpio_pin gpio pin num
*
* @return None
*
* @note None
*/
void tls_gpio_irq_disable(enum tls_io_name gpio_pin);
/**
* @brief This function is used to get gpio interrupt status
*
* @param[in] gpio_pin gpio pin num
*
* @retval 0 no interrupt happened
* @retval 1 interrupt happened
*
* @note None
*/
u8 tls_get_gpio_irq_status(enum tls_io_name gpio_pin);
/**
* @brief This function is used to clear gpio interrupt flag
*
* @param[in] gpio_pin gpio pin num
*
* @return None
*
* @note None
*/
void tls_clr_gpio_irq_status(enum tls_io_name gpio_pin);
/**
* @brief This function is used to register gpio interrupt
*
* @param[in] gpio_pin gpio pin num
* @param[in] callback the gpio interrupt call back function
* @param[in] arg parammeter for the callback
*
* @return None
*
* @note
* gpio callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_gpio_isr_register(enum tls_io_name gpio_pin,
tls_gpio_irq_callback callback,
void *arg);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_GPIO_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_gpio_afsel.h
+510
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/**
* @file wm_gpio_afsel.h
*
* @brief GPIO Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_IO_MUX_H
#define WM_IO_MUX_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_gpio.h"
#include "wm_regs.h"
#include "wm_irq.h"
#include "wm_osal.h"
#include "tls_common.h"
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup IOMUX_Driver_APIs IOMUX Driver APIs
* @brief IOMUX driver APIs
*/
/**
* @addtogroup IOMUX_Driver_APIs
* @{
*/
/**
* @brief config the pins used for highspeed spi
* @param numsel: config highspeed spi pins multiplex relation,valid para 0,1
* 0: hspi0
* hspi_int PB14
* hspi_cs PB15
* hspi_ck PB16
* hspi_di PB17
* hspi_do PB18
* 1: hspi1
* hspi_int PB08
* hspi_cs PB09
* hspi_ck PB10
* hspi_di PB11
* hspi_do PB12
* @return None
*/
void wm_hspi_gpio_config(uint8_t numsel);
/**
* @brief config the pins used for spi ck
* @param io_name: config spi ck pins name
* WM_IO_PA_01
* WM_IO_PB_16
* WM_IO_PB_27
* WM_IO_PA_11
*
* @return None
*/
void wm_spi_ck_config(enum tls_io_name io_name);
/**
* @brief config the pins used for spi cs
* @param io_name: config spi cs pins name
* WM_IO_PA_02
* WM_IO_PB_15
* WM_IO_PB_00
* WM_IO_PB_07
* WM_IO_PA_12
*
* @return None
*/
void wm_spi_cs_config(enum tls_io_name io_name);
/**
* @brief config the pins used for spi di
* @param io_name: config spi di pins name
* WM_IO_PA_03
* WM_IO_PB_17
* WM_IO_PB_01
* WM_IO_PA_05
* WM_IO_PA_10
*
* @return None
*/
void wm_spi_di_config(enum tls_io_name io_name);
/**
* @brief config the pins used for spi do
* @param io_name: config spi do pins name
* WM_IO_PB_18
* WM_IO_PB_02
* WM_IO_PA_04
* WM_IO_PA_09
* WM_IO_PA_10
*
* @return None
*/
void wm_spi_do_config(enum tls_io_name io_name);
/**
* @brief config the pins used for sdio ck dat0 dat1 dat2 dat3
* @param numsel: config sdio ck dat0 dat1 dat2 dat3 pins multiplex relation,valid para 0
* 0:
* sdio_ck PB08
* sdio_dat0 PB09
* sdio_dat1 PB10
* sdio_dat2 PB11
* sdio_dat3 PB12
*
* @return None
*/
void wm_sdio_config(uint8_t numsel);
/**
* @brief config the pins used for sdio cmd
* @param io_name: config sdio cmd pins name
* WM_IO_PA_06
* WM_IO_PB_07
* WM_IO_PB_13
*
* @return None
*/
void wm_sdio_cmd_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart0 tx
* @param io_name: config uart0 tx pins name
* WM_IO_PA_04
* WM_IO_PA_08
* WM_IO_PB_07
* WM_IO_PB_26
*
* @return None
*/
void wm_uart0_tx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart0 rx
* @param io_name: config uart0 rx pins name
* WM_IO_PA_05
* WM_IO_PA_09
* WM_IO_PB_06
* WM_IO_PB_25
*
* @return None
*/
void wm_uart0_rx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart0 rts
* @param io_name: config uart0 rts pins name
* WM_IO_PA_13
* WM_IO_PB_04
* WM_IO_PB_24
*
* @return None
*/
void wm_uart0_rts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart0 cts
* @param io_name: config uart0 cts pins name
* WM_IO_PA_14
* WM_IO_PB_05
* WM_IO_PB_23
*
* @return None
*/
void wm_uart0_cts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart1 tx
* @param io_name: config uart1 tx pins name
* WM_IO_PB_12
* WM_IO_PB_18
*
* @return None
*/
void wm_uart1_tx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart1 rx
* @param io_name: config uart1 rx pins name
* WM_IO_PB_11
* WM_IO_PB_17
*
* @return None
*/
void wm_uart1_rx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart1 rts
* @param io_name: config uart1 rts pins name
* WM_IO_PB_10
*
* @return None
*/
void wm_uart1_rts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart1 cts
* @param io_name: config uart1 cts pins name
* WM_IO_PB_09
*
* @return None
*/
void wm_uart1_cts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart2 tx or 7816-io
* @param io_name: config uart2 tx or 7816-io pins name
* WM_IO_PA_01
* WM_IO_PA_11
* WM_IO_PB_02
* WM_IO_PB_20
*
* @return None
*/
void wm_uart2_tx_scio_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart2 rx
* @param io_name: config uart2 rx pins name
* WM_IO_PA_00
* WM_IO_PA_10
* WM_IO_PB_03
* WM_IO_PB_19
* WM_IO_PB_30
*
* @return None
*/
void wm_uart2_rx_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart2 rts or 7816-clk
* @param io_name: config uart2 rts or 7816-clk pins name
* WM_IO_PA_02
* WM_IO_PA_12
* WM_IO_PB_01
* WM_IO_PB_21
* WM_IO_PB_06
*
* @return None
*/
void wm_uart2_rts_scclk_config(enum tls_io_name io_name);
/**
* @brief config the pins used for uart2 cts
* @param io_name: config uart2 cts pins name
* WM_IO_PA_03
* WM_IO_PB_28
* WM_IO_PB_00
* WM_IO_PB_22
*
* @return None
*/
void wm_uart2_cts_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s master ck
* @param io_name: config i2s master ck pins name
* WM_IO_PA_04
* WM_IO_PA_08
* WM_IO_PB_08
*
* @return None
*/
void wm_i2s_m_ck_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s master ws
* @param io_name: config i2s master ws pins name
* WM_IO_PA_13
* WM_IO_PA_09
* WM_IO_PB_10
*
* @return None
*/
void wm_i2s_m_ws_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s master do
* @param io_name: config i2s master do pins name
* WM_IO_PA_03
* WM_IO_PA_07
* WM_IO_PB_09
*
* @return None
*/
void wm_i2s_m_do_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s slave ck
* @param io_name: config i2s slave ck pins name
* WM_IO_PA_15
* WM_IO_PA_11
* WM_IO_PB_15
* WM_IO_PB_04
*
* @return None
*/
void wm_i2s_s_ck_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s slave ws
* @param io_name: config i2s slave ws pins name
* WM_IO_PA_06
* WM_IO_PA_12
* WM_IO_PB_16
* WM_IO_PB_05
*
* @return None
*/
void wm_i2s_s_ws_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s slave di
* @param io_name: config i2s slave di pins name
* WM_IO_PA_14
* WM_IO_PA_10
* WM_IO_PB_14
* WM_IO_PB_03
*
* @return None
*/
void wm_i2s_s_di_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s mclk
* @param io_name: config i2s mclk pins name
* WM_IO_PA_02
* WM_IO_PB_28
* WM_IO_PB_31
*
* @return None
*/
void wm_i2s_mclk_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2s extclk
* @param io_name: config i2s extclk pins name
* WM_IO_PA_05
*
* @return None
*/
void wm_i2s_extclk_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2c scl
* @param io_name: config i2c scl pins name
* WM_IO_PA_06
* WM_IO_PA_08
* WM_IO_PB_13
* WM_IO_PB_11
* WM_IO_PB_21
*
* @return None
*/
void wm_i2c_scl_config(enum tls_io_name io_name);
/**
* @brief config the pins used for i2c sda
* @param io_name: config i2c sda pins name
* WM_IO_PA_15
* WM_IO_PA_07
* WM_IO_PB_14
* WM_IO_PB_12
* WM_IO_PB_22
*
* @return None
*/
void wm_i2c_sda_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm1
* @param io_name: config pwm1 pins name
* WM_IO_PA_00
* WM_IO_PB_18
* WM_IO_PB_05
* WM_IO_PA_05
* WM_IO_PB_19
* WM_IO_PB_30
*
* @return None
*/
void wm_pwm1_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm2
* @param io_name: config pwm2 pins name
* WM_IO_PA_01
* WM_IO_PB_17
* WM_IO_PB_04
* WM_IO_PA_07
* WM_IO_PB_13
* WM_IO_PB_20
*
* @return None
*/
void wm_pwm2_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm3
* @param io_name: config pwm3 pins name
* WM_IO_PA_02
* WM_IO_PB_16
* WM_IO_PB_03
* WM_IO_PA_08
* WM_IO_PB_21
*
* @return None
*/
void wm_pwm3_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm4
* @param io_name: config pwm4 pins name
* WM_IO_PA_03
* WM_IO_PB_15
* WM_IO_PB_02
* WM_IO_PA_09
* WM_IO_PB_22
* WM_IO_PB_06
*
* @return None
*/
void wm_pwm4_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm5
* @param io_name: config pwm5 pins name
* WM_IO_PA_04
* WM_IO_PB_14
* WM_IO_PB_01
* WM_IO_PA_10
* WM_IO_PB_23
* WM_IO_PB_08
*
* @return None
*/
void wm_pwm5_config(enum tls_io_name io_name);
/**
* @brief config the pins used for pwm break
* @param io_name: config pwm break pins name
* WM_IO_PB_24
* WM_IO_PB_29
* WM_IO_PB_00
* WM_IO_PA_11
*
* @return None
*/
void wm_pwmbrk_config(enum tls_io_name io_name);
/**
* @brief config the pins used for swd
* @param enable: enable or disable chip swd function
* 1: enable
* 0: disable
*
* @return None
*/
void wm_swd_config(bool enable);
/**
* @brief config the pins used for adc
* @param Channel: the channel that shall be used
* 0~07: single-ended input
* 8~11: differential input
*
* @return None
*/
void wm_adc_config(u8 Channel);
/**
* @brief disable all the gpio af
*
* @return None
*
* @note This function must call before anyothers for configure
* gpio Alternate functions
*/
void wm_gpio_af_disable(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_IO_MUX_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_hostspi.h
+299
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@@ -0,0 +1,299 @@
/**
* @file wm_hostspi.h
*
* @brief host spi Driver Module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_HOST_SPI_H
#define WM_HOST_SPI_H
#include "wm_type_def.h"
#include "list.h"
#include "wm_osal.h"
#include "wm_ram_config.h"
#define SPI_USE_DMA
#define SPI_TX_DMA_MASK 0x01
#define SPI_RX_DMA_MASK 0x02
#define SPI_DMA_CMD_ADDR ((u32)(MASTER_SPI_DMA_ADDR))
#define SPI_DMA_CMD_MAX_SIZE (0x20)
#define SPI_DMA_BUF_ADDR ((u32)(SPI_DMA_CMD_ADDR + SPI_DMA_CMD_MAX_SIZE))
// #define SPI_DMA_BUF_MAX_SIZE 8160
#define SPI_DMA_BUF_MAX_SIZE (1024 - 32)
// #define SPI_DMA_MAX_TRANS_SIZE 4092
#define SPI_DMA_MAX_TRANS_SIZE 512
/**
* error code.
*/
#define TLS_SPI_STATUS_OK (0)
#define TLS_SPI_STATUS_EINVAL (-1)
#define TLS_SPI_STATUS_ENOMEM (-2)
#define TLS_SPI_STATUS_EBUSY (-3)
#define TLS_SPI_STATUS_ESHUTDOWN (-4)
#define TLS_SPI_STATUS_EPERM (-5)
#define TLS_SPI_STATUS_ECLKNOSUPPORT (-6)
#define TLS_SPI_STATUS_EMODENOSUPPORT (-7)
#define SPI_MASTER_FIFO_SIZE (32)
/**
* the SPI master controller's configuration data.
*/
/** configuration data. */
#define SPI_CPHA (0x01) /** clock phase. */
#define SPI_CPOL (0x02) /** clock polarity. */
#define TLS_SPI_MODE_0 (0|0) /** motorola mode. */
#define TLS_SPI_MODE_1 (0|SPI_CPHA)
#define TLS_SPI_MODE_2 (SPI_CPOL|0)
#define TLS_SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
#define TLS_SPI_CS_LOW 0x00 /** chipselect active low. */
#define TLS_SPI_CS_HIGH 0x01 /** chipselect active high. */
#define TLS_SPI_FCLK_MIN (1000) /** minimum work clock rate(Hz). */
#define TLS_SPI_FCLK_MAX (APB_CLK/2) /** maximum work clock rate(Hz). */
/** default configuration data. */
#define SPI_DEFAULT_SPEED (2000000) /** default clock rate is 2MHz. */
#define SPI_DEFAULT_MODE (TLS_SPI_MODE_0) /** default mode MODE_0. */
#define SPI_CS_ACTIVE_MODE (TLS_SPI_CS_LOW) /** default chipselect mode is active low. */
#define SPI_CS_INACTIVE_MODE (TLS_SPI_CS_HIGH)
/** SPI transaction message status. */
#define SPI_MESSAGE_STATUS_IDLE (0)
#define SPI_MESSAGE_STATUS_INPROGRESS (1)
#define SPI_MESSAGE_STATUS_DONE (2)
/**slave type*/
#define SPI_SLAVE_FLASH 0 /**flash */
#define SPI_SLAVE_CARD 1 /** SD card */
#define SPI_SLAVE_CONTROL_PIN 0
/**transfer type*/
#define SPI_BYTE_TRANSFER 0 /**byte transfer*/
#define SPI_WORD_TRANSFER 1 /**word transfer*/
#define SPI_DMA_TRANSFER 2 /** DMA transfer */
/**
* a read/write buffer pair
*
* SPI transfers always write the same number of bytes as they read.
* If the transmit buffer is null, zeroes will be shifted out while
* filling rx_buf. If the receive buffer is null, the data shifted in
* will be discarded.
*/
struct tls_spi_transfer
{
struct dl_list transfer_list; /**< transfers are sequenced through
tls_spi_message.transfers. */
const void *tx_buf; /**< data to be written, or NULL. */
void *rx_buf; /**< data to be read, or NULL. */
u32 len; /**< size of rx and tx buffers (in bytes). */
u32 delay_usecs; /**< microseconds to delay after this transfer. */
};
/**
* one multi-segment SPI transaction
*
* A struct tls_spi_message is used to execute an atomic sequence of data
* transfers, each represented by a struct tls_spi_transfer. The sequence
* is "atomic" in the sense that no other spi_message may use that SPI bus
* until that sequence completes.
*/
struct tls_spi_message
{
struct dl_list queue; /**< transaction messages are sequenced through
tls_spi_port.wait_queue. */
struct dl_list transfers; /**< list of transfer segments in this transaction. */
void (*complete) (void *); /**< called to report transaction completions. */
void *context; /**< the argument to complete() when it's called. */
u32 status; /**< transaction message status. */
};
/**
* driver structure to SPI master controller
*
* This data structure presents the SPI master controller's configuration
* data. The device attached to this SPI master controller share the same
* transfer mode, chipselect mode and clock rate. And this structure maintains
* a queue of tls_spi_message transactions and uses this tls_spi_message transaction
* to access to the SPI device. For each such message it queues, it calls the message's
* completion function when the transaction completes.
*/
struct tls_spi_port
{
u32 speed_hz; /**< clock rate to be used. */
u8 cs_active; /**< chipselect mode, maybe active low or active
high. */
u8 mode; /**< SPI transfer mode: mode_0(CPHA=0, CHOL=0),
mode_1(CPHA=0, CHOL=1), mode_2(CPHA=1,
CHOL=0), mode_3(CPHA=1, CHOL=1). */
u8 reconfig;
struct dl_list wait_queue; /**< wait list of transaction messages. */
tls_os_queue_t *lock;
tls_os_queue_t *msg_queue; /**< notify the schedule thread that there's
transaction message queued. */
struct tls_spi_message *current_message; /**< current transaction message
in-progressing. */
u32 current_remaining_transfer; /**< remaining transfer segments count in
current transaction message. */
struct tls_spi_transfer *current_transfer; /**< current transfer segment
in-progressing. */
u32 current_remaining_bytes; /**< remaining data length in current
transfer segment. */
u8 transtype; /**< transfer type */
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup HOSTSPI_Driver_APIs HOSTSPI Driver APIs
* @brief HOSTSPI driver APIs
*/
/**
* @addtogroup HOSTSPI_Driver_APIs
* @{
*/
/**
* @brief This function is used to initialize the SPI master driver.
*
* @param[in] None
*
* @retval TLS_SPI_STATUS_OK if initialize success
* @retval TLS_SPI_STATUS_EBUSY if SPI is already initialized
* @retval TLS_SPI_STATUS_ENOMEM if malloc SPI memory fail
*
* @note None
*/
int tls_spi_init(void);
/**
* @brief This function is used to setup the spi controller.
*
* @param[in] mode is CPOL and CPHA type defined in TLS_SPI_MODE_0 to TLS_SPI_MODE_3
* @param[in] cs_active is cs mode, defined as TLS_SPI_CS_LOW or TLS_SPI_CS_HIGH
* @param[in] fclk is spi clock,the unit is HZ.
*
* @retval TLS_SPI_STATUS_OK if setup success
* @retval TLS_SPI_STATUS_EMODENOSUPPORT if mode is not support
* @retval TLS_SPI_STATUS_EINVAL if cs_active is not support
* @retval TLS_SPI_STATUS_ECLKNOSUPPORT if fclk is not support
*
* @note None
*/
int tls_spi_setup(u8 mode, u8 cs_active, u32 fclk);
/**
* @brief This function is used to synchronous write data by SPI.
*
* @param[in] buf data to be sent.
* @param[in] len data length.
*
* @retval TLS_SPI_STATUS_OK if write success.
* @retval TLS_SPI_STATUS_EINVAL if argument is invalid.
* @retval TLS_SPI_STATUS_ENOMEM if there is no enough memory.
* @retval TLS_SPI_STATUS_ESHUTDOWN if SPI driver does not installed.
*
* @note None
*/
int tls_spi_write(const u8 * buf, u32 len);
/**
* @brief This function is used to synchronously read data from SPI.
*
* @param[in] buf is the buffer for saving SPI data.
* @param[in] len is the data length.
*
* @retval TLS_SPI_STATUS_OK if write success.
* @retval TLS_SPI_STATUS_EINVAL if argument is invalid.
* @retval TLS_SPI_STATUS_ENOMEM if there is no enough memory.
* @retval TLS_SPI_STATUS_ESHUTDOWN if SPI driver does not installed.
*
* @note None
*/
int tls_spi_read(u8 * buf, u32 len);
/**
* @brief This function is used to synchronously write command and then read data from SPI.
*
* @param[in] txbuf is the write data buffer.
* @param[in] n_tx is the write data length.
* @param[in] rxbuf is the read data buffer.
* @param[in] n_rx is the read data length.
*
* @retval TLS_SPI_STATUS_OK if write success.
* @retval TLS_SPI_STATUS_EINVAL if argument is invalid.
* @retval TLS_SPI_STATUS_ENOMEM if there is no enough memory.
* @retval TLS_SPI_STATUS_ESHUTDOWN if SPI driver has not been installed.
*
* @note None
*/
int tls_spi_read_with_cmd(const u8 * txbuf, u32 n_tx, u8 * rxbuf, u32 n_rx);
/**
* @brief This function is used to synchronous write 32bit command then write data from SPI.
*
* @param[in] cmd is the command data.
* @param[in] n_cmd is the command len,can not bigger than four
* @param[in] txbuf is the write data buffer.
* @param[in] n_tx is the write data length.
*
* @retval TLS_SPI_STATUS_OK if write success.
* @retval TLS_SPI_STATUS_EINVAL if argument is invalid.
* @retval TLS_SPI_STATUS_ENOMEM if there is no enough memory.
* @retval TLS_SPI_STATUS_ESHUTDOWN if SPI driver does not installed.
*
* @note None
*/
int tls_spi_write_with_cmd(const u8 * cmd, u32 n_cmd, const u8 * txbuf, u32 n_tx);
/**
* @brief This function is used to set SPI transfer mode.
*
* @param[in] type is the transfer type.
* SPI_BYTE_TRANSFER ->byte transfer;
* SPI_WORD_TRANSFER ->word transfer;
* SPI_DMA_TRANSFER ->DMA transfer;
*
* @return None
*
* @note None
*/
void tls_spi_trans_type(u8 type);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_HOST_SPI_H */
sdk/Include/Driver/wm_hspi.h
+264
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@@ -0,0 +1,264 @@
/**
* @file wm_hspi.h
*
*
* @brief High speed spi slave Module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_HSPI_H
#define WM_HSPI_H
#include "wm_type_def.h"
#include "wm_ram_config.h"
#define HSPI_TX_MEM_MALLOC 0 /** tx mem dynamic malloc*/
#define HSPI_IO_REUSE_NUM 0
#define SDIO_IO_REUSE_NUM 2
#define HSPI_INTERFACE_SPI 2 /** spi interface*/
#define HSPI_INTERFACE_SDIO 3 /** sdio interface*/
/**rx message*/
#define HSPI_RX_CMD_MSG 1
#define HSPI_RX_DATA_MSG 2
/**spi/sdio buffer£¬Wraper controller can only access the address after the 0x60000*/
#define HSPI_TXBUF_NUM 2
#define HSPI_TX_DESC_NUM HSPI_TXBUF_NUM
#define HSPI_RXBUF_NUM 3//10
#define HSPI_RX_DESC_NUM HSPI_RXBUF_NUM
#define HSPI_TXBUF_SIZE 1500
#define HSPI_RXBUF_SIZE 1500
#define HSPI_TX_DESC_SIZE sizeof(struct tls_hspi_tx_desc)
#define HSPI_RX_DESC_SIZE sizeof(struct tls_hspi_rx_desc)
/*****************************************************************************
* sdio/hspi sram partition
* total size : 0x61800 - 0x67FFFF (26KB)
******************************************************************************/
/* HSPI txbuf zone */
#define HSPI_TXBUF_BASE_ADDR ((u32)(SLAVE_HSPI_SDIO_ADDR))
#if HSPI_TX_MEM_MALLOC
#define HSPI_TXBUF_TOTAL_SIZE 0
#else
#define HSPI_TXBUF_TOTAL_SIZE (HSPI_TXBUF_SIZE * HSPI_TXBUF_NUM)
#endif
/** HSPI tx desc zone */
#define HSPI_TX_DESC_BASE_ADDR ((u32)(HSPI_TXBUF_BASE_ADDR + HSPI_TXBUF_TOTAL_SIZE))
#define HSPI_TX_DESC_TOTAL_SIZE (HSPI_TX_DESC_SIZE * HSPI_TX_DESC_NUM) //28*3=84
/** HSPI rxbuf zone */
#define HSPI_RXBUF_BASE_ADDR ((u32)(HSPI_TX_DESC_BASE_ADDR + HSPI_TX_DESC_TOTAL_SIZE))
#define HSPI_RXBUF_TOTAL_SIZE (HSPI_RXBUF_NUM * HSPI_RXBUF_SIZE) //4500
/** HSPI rx desc zone */
#define HSPI_RX_DESC_BASE_ADDR ((u32)(HSPI_RXBUF_BASE_ADDR + HSPI_RXBUF_TOTAL_SIZE))
#define HSPI_RX_DESC_TOTAL_SIZE (HSPI_RX_DESC_SIZE * HSPI_RX_DESC_NUM) //36
#if 0
#define SDIO_CMD_RXBUF_SIZE (0x100)
#define SDIO_CMD_RXBUF_ADDR (0x00068000 - SDIO_CMD_RXBUF_SIZE)
#define SDIO_CIS1_ADDR (SDIO_CMD_RXBUF_ADDR - 0x80)
#define SDIO_CIS0_ADDR (SDIO_CIS1_ADDR - 0x80)
#else
#define SDIO_CIS0_ADDR (HSPI_RX_DESC_BASE_ADDR + HSPI_RX_DESC_TOTAL_SIZE) //128
#define SDIO_CIS1_ADDR (SDIO_CIS0_ADDR + 0x80) //128
#define SDIO_CMD_RXBUF_ADDR (SDIO_CIS1_ADDR + 0x80)
#define SDIO_CMD_RXBUF_SIZE 256//(1500) //256
#endif
#define CIS_FUN0_ADDR SDIO_CIS0_ADDR
#define CIS_FUN1_ADDR SDIO_CIS1_ADDR
#define FN0_TPL_FUNCID (CIS_FUN0_ADDR + 0x00)
#define FN0_TPL_FUNCE (CIS_FUN0_ADDR + 0x04)
#define FN0_TPL_FUNCE_MAXBLK (CIS_FUN0_ADDR + 0x08)
#define FN0_TPL_MANFID_MID (CIS_FUN0_ADDR + 0x0C)
#define FN0_TPL_END (CIS_FUN0_ADDR + 0x10)
#define FN1_TPL_FUNCID (CIS_FUN1_ADDR + 0x00)
#define FN1_TPL_FUNCE (CIS_FUN1_ADDR + 0x04)
#define FN1_TPL_FUNCE_VER (CIS_FUN1_ADDR + 0x08)
#define FN1_TPL_FUNCE_NSN (CIS_FUN1_ADDR + 0x0C)
#define FN1_TPL_FUNCE_CSASIZE (CIS_FUN1_ADDR + 0x10)
#define FN1_TPL_FUNCE_OCR (CIS_FUN1_ADDR + 0x14)
#define FN1_TPL_FUNCE_MINPWR (CIS_FUN1_ADDR + 0x18)
#define FN1_TPL_FUNCE_STANDBY (CIS_FUN1_ADDR + 0x1C)
#define FN1_TPL_FUNCE_OPTBW (CIS_FUN1_ADDR + 0x20)
#define FN1_TPL_FUNCE_NTIMEOUT (CIS_FUN1_ADDR + 0x24)
#define FN1_TPL_FUNCE_AVGPWR (CIS_FUN1_ADDR + 0x28)
#define FN1_TPL_END (CIS_FUN1_ADDR + 0x30)
/**Definition of SDIO interrupt in the system*/
#define SDIO_RX_DATA_INT (0UL)
#define SDIO_TX_DATA_INT (1UL)
#define SDIO_RX_CMD_INT (2UL)
#define SDIO_TX_CMD_INT (3UL)
/**IO control register*/
#define HR_IOCTL_GP_SDIO HR_IOCTL_GP_SDIO_I2C
/** SDIO interrupt bit definition */
#define SDIO_WP_INT_SRC_CMD_DOWN (1UL<<3)
#define SDIO_WP_INT_SRC_CMD_UP (1UL<<2)
#define SDIO_WP_INT_SRC_DATA_DOWN (1UL<<1)
#define SDIO_WP_INT_SRC_DATA_UP (1UL<<0)
/** Definition of send data descriptor structure */
struct tls_hspi_tx_desc {
volatile u32 valid_ctrl;
u32 buf_info;
u32 buf_addr[3];
u32 next_desc_addr;
#if HSPI_TX_MEM_MALLOC
u32 txbuf_addr; /**< txbuf addr, pbuf and buf_addr[0] are different */
#endif
};
/** Definition of receive data descriptor structure */
struct tls_hspi_rx_desc {
u32 valid_ctrl;
u32 buf_addr;
u32 next_desc_addr;
};
/** struct tls_slave_hspi */
struct tls_slave_hspi {
u8 ifusermode;
s16 (*rx_cmd_callback)(char *buf);
s16 (*rx_data_callback)(char *buf);
s16 (*tx_data_callback)(char *buf);
struct tls_hspi_tx_desc *curr_tx_desc; /**< Upstream data management */
struct tls_hspi_rx_desc *curr_rx_desc; /**< Downlink data management */
#if HSPI_TX_MEM_MALLOC
u8 txdoneflag; /**< tx done falg*/
#endif
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup HSPI_Driver_APIs HSPI Driver APIs
* @brief HSPI driver APIs
*/
/**
* @addtogroup HSPI_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial HSPI register.
*
* @param[in] None
*
* @retval 0 success
* @retval other failed
*
* @note When the system is initialized, the function has been called, so users can not call this function.
*/
int tls_slave_spi_init(void);
/**
* @brief This function is used to enable or disable user mode.
*
* @param[in] ifenable TRUE or FALSE
*
* @return None
*
* @note If the user enables the user mode, RICM instruction in the system will not be used by SPI.
* If the user wants to use the SPI interface as other use, need to enable the user mode.
* This function must be called before the register function.
*/
void tls_set_hspi_user_mode(u8 ifenable);
/**
* @brief This function is used to set high speed interface type.
*
* @param[in] type is the interface type. HSPI_INTERFACE_SPI or HSPI_INTERFACE_SDIO
*
* @return None
*
* @note None
*/
void tls_set_high_speed_interface_type(int type);
/**
* @brief This function is used to register hspi rx command interrupt.
*
* @param[in] rx_cmd_callback is the hspi rx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_hspi_rx_cmd_callback_register(s16 (*rx_cmd_callback)(char *buf));
/**
* @brief This function is used to register hspi rx data interrupt.
*
* @param[in] rx_data_callback is the hspi rx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_hspi_rx_data_callback_register(s16 (*rx_data_callback)(char *buf));
/**
* @brief This function is used to register hspi tx data interrupt.
*
* @param[in] tx_data_callback is the hspi tx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_hspi_tx_data_callback_register(s16 (*tx_data_callback)(char *buf));
/**
* @brief This function is used to transfer data.
*
* @param[in] txbuf is a buf for saving user data.
* @param[in] len is the data length.
*
* @retval transfer data len success
* @retval 0 failed
*
* @note None
*/
int tls_hspi_tx_data(char *txbuf, int len);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_HSPI_H */
sdk/Include/Driver/wm_i2c.h
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/**************************************************************************//**
* @file wm_i2c.h
* @author
* @version
* @date
* @brief
* @copyright (c) 2014 Winner Microelectronics Co., Ltd. All rights reserved.
*****************************************************************************/
#ifndef __WM_I2C_H
#define __WM_I2C_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_regs.h"
#include "wm_type_def.h"
typedef struct
{
__IO uint32_t PRER_LO;
__IO uint32_t PRER_HI;
__IO uint32_t CTRL;
__O uint32_t TX_RX;
__O uint32_t CR_SR;
__I uint32_t TXR;
__I uint32_t CR;
}I2C_T;
#define I2C ((I2C_T *)(HR_I2C_BASE_ADDR))
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup I2C_Driver_APIs I2C Driver APIs
* @brief I2C driver APIs
*/
/**
* @addtogroup I2C_Driver_APIs
* @{
*/
/**
* @brief Init the I2C module
*
* @param freq I2C reference clock frequency in Hz that will be used
*
* @retval none
*
* @note
* the value must be between 100k and 400k
*/
void tls_i2c_init(u32 freq);
#define wm_i2c_int_mask(bl) do { tls_bitband_write(HR_I2C_CTRL, 6, bl);}while(0);
/**
* @brief send stop signal
*
*/
void tls_i2c_stop(void);
/**
* @brief Waiting for ack signal
* @retval
* - \ref WM_FAILED
* - \ref WM_SUCCESS
*/
int tls_i2c_wait_ack(void);
/**
* @brief Writes the data to data register of I2C module
* when ifstart one the start signal will be sent followed by the data
* when ifstart zero only the data will be send
*
* @param[in] data the data will be write to the data register of I2C module
* @param[in] ifstart when one send start signal, when zero don't
*
* @retval
*
*/
void tls_i2c_write_byte(u8 data, u8 ifstart);
/**
* @brief Get the data stored in data register of I2C module
*
* @param[in] ifack when one send ack after reading the data register,when zero don't
* @param[in] ifstop when one send stop signal after read, when zero do not send stop
*
* @retval
* the received data
*/
u8 tls_i2c_read_byte(u8 ifack, u8 ifstop);
/**
* @brief This function is used to register i2c transfer done callback function.
*
* @param[in] done is the i2c transfer done callback function.
*
* @retval None
*
* @note None
*/
void wm_i2c_transfer_done_register(void (*done)(void));
/**
* @brief Start writing through int mode
*
* @param[in] devaddr the device address
* @param[in] wordaddr when one send stop signal after read, when zero do not send stop
* @param[in] buf the address point where data shoule be stored
* @param[in] len the length of data will be received
*
* @retval
* - \ref WM_FAILED
* - \ref WM_SUCCESS
*/
int wm_i2c_start_write_it(uint8_t devaddr, uint8_t wordaddr, uint8_t * buf, uint16_t len);
/**
* @brief start read through int mode
*
* @param[in] devaddr the device address
* @param[in] wordaddr when one send stop signal after read, when zero do not send stop
* @param[in] buf the address point where data shoule be stored
* @param[in] len the length of data will be received
*
* @retval
* - \ref WM_FAILED
* - \ref WM_SUCCESS
*/
int wm_i2c_start_read_it(uint8_t devaddr, uint8_t wordaddr, uint8_t * buf, uint16_t len);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_i2s.h
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/**************************************************************************//**
* @file wm_i2s.h
* @author
* @version
* @date
* @brief
*
* @copyright (c) 2014 Winner Microelectronics Co., Ltd. All rights reserved.
*****************************************************************************/
#ifndef __WM_I2S_H
#define __WM_I2S_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_type_def.h"
#include "wm_regs.h"
#include "wm_osal.h"
#include "misc.h"
#include "wm_dma.h"
#define I2S_CTRL_FORMAT_Pos (24) /*!< CTRL : FORMAT Position */
#define I2S_CTRL_FORMAT_MASK (3UL<<I2S_CTRL_FORMAT_Pos) /*!< CTRL : FORMAT mask */
#define I2S_CTRL_FORMAT_I2S (0x0UL<<I2S_CTRL_FORMAT_Pos) /*!< I2S data format*/
#define I2S_CTRL_FORMAT_MSB (0x1UL<<I2S_CTRL_FORMAT_Pos) /*!< MSB data format*/
#define I2S_CTRL_FORMAT_PCMA (0x2UL<<I2S_CTRL_FORMAT_Pos) /*!< PCMA data format*/
#define I2S_CTRL_FORMAT_PCMB (0x3UL<<I2S_CTRL_FORMAT_Pos) /*!< PCMB data format*/
#define I2S_CTRL_DATABIT_MASK (0x30UL) /*!< CTRL : DATABIT mask */
#define I2S_CTRL_DATABIT_8 ((uint8_t)0x0) /*!< I2S data width is 8-bit */
#define I2S_CTRL_DATABIT_16 ((uint8_t)0x10) /*!< I2S data width is 16-bit */
#define I2S_CTRL_DATABIT_24 ((uint8_t)0x20) /*!< I2S data width is 24-bit */
#define I2S_CTRL_DATABIT_32 ((uint8_t)0x30) /*!< I2S data width is 32-bit */
#define I2S_CTRL_CHSEL_Pos (23) /*!< CTRL : Channel select position */
#define I2S_CTRL_CHSEL_MASK (1UL<<I2S_CTRL_CHSEL_Pos) /*!< CTRL: Channel select mask */
#define I2S_CTRL_CHSEL_LEFT (1UL<<I2S_CTRL_CHSEL_Pos) /*!< CTRL: Left channel select */
#define I2S_CTRL_CHSEL_RIGHT (0UL<<I2S_CTRL_CHSEL_Pos) /*!< CTRL: Right channel select */
#define I2S_CTRL_STEREO_MONO_Pos (22) /*!< CTRL: STEREO MONO Position */
#define I2S_CTRL_STEREO_MONO_MASK (1UL<<I2S_CTRL_STEREO_MONO_Pos) /*!< CTRL: STEREO MONO MASK */
#define I2S_CTRL_MONO (1UL<<I2S_CTRL_STEREO_MONO_Pos) /*!< Monaural channel */
#define I2S_CTRL_STERO (0UL<<I2S_CTRL_STEREO_MONO_Pos) /*!< Stereo channel */
#define I2S_CTRL_RXDMA_Pos (21) /*!< CTRL: RXDMA Position */
#define I2S_CTRL_RXDMA_MASK (1UL<<I2S_CTRL_RXDMA_Pos) /*!< CTRL: RXDMA mask */
#define I2S_CTRL_TXDMA_Pos (20) /*!< CTRL: TXDMA Position*/
#define I2S_CTRL_TXDMA_MASK (1UL<<I2S_CTRL_TXDMA_Pos) /*!< CTRL: TXDMA mask */
#define I2S_CTRL_RX_CLR_Pos (19) /*!< CTRL: RXFIFO clear Position */
#define I2S_CTRL_RX_CLR_MASK (1UL<<I2S_CTRL_RX_CLR_Pos) /*!< CTRL: RXFIFO clear mask */
#define I2S_CTRL_TX_CLR_Pos (18) /*!< CTRL: TXFIFO clear Position */
#define I2S_CTRL_TX_CLR_MASK (1UL<<I2S_CTRL_TX_CLR_Pos) /*!< CTRL: TXFIFO clear mask */
#define I2S_CTRL_LZCEN_Pos (17) /*!< CTRL: LZCEN Position */
#define I2S_CTRL_LZCEN_MASK (1UL<<I2S_CTRL_LZCEN_Pos) /*!< CTRL: LZCEN mask */
#define I2S_CTRL_RZCEN_Pos (16) /*!< CTRL: RZCEN Position */
#define I2S_CTRL_RZCEN_MASK (1UL<<I2S_CTRL_RZCEN_Pos) /*!< CTRL: RZCEN mask */
#define I2S_CTRL_RXTH_Pos (12) /*!< CTRL: RXTH Position */
#define I2S_CTRL_RXTH_MASK (7UL<<I2S_CTRL_RXTH_Pos) /*!< CTRL: RXTH mask */
#define I2S_CTRL_TXTH_Pos (9) /*!< CTRL: TXTH Position */
#define I2S_CTRL_TXTH_MASK (7UL<<I2S_CTRL_TXTH_Pos) /*!< CTRL: TXTH mask */
#define I2S_CTRL_MUTE_Pos (3) /*!< CTRL: MUTE Position */
#define I2S_CTRL_MUTE_MASK (1UL<<I2S_CTRL_MUTE_Pos) /*!< CTRL: MUTE mask */
#define I2S_CTRL_RXE_Pos (2) /*!< CTRL: RXEN Position */
#define I2S_CTRL_RXE_MASK (1UL<<I2S_CTRL_RXE_Pos) /*!< CTRL: RXEN mask */
#define I2S_CTRL_TXE_Pos (1) /*!< CTRL: TXEN Position */
#define I2S_CTRL_TXE_MASK (1UL<<I2S_CTRL_TXE_Pos) /*!< CTRL: TXEN mask */
#define I2S_CTRL_EN_Pos (0) /*!< CTRL: EN Position */
#define I2S_CTRL_EN_MASK (1UL<<I2S_CTRL_EN_Pos) /*!< CTRL: EN mask */
#define I2S_INT_MASK_LZC ((uint16_t)0x200) /*!< Left Channel Zero-Cross Interrupt MASK */
#define I2S_INT_MASK_RZC ((uint16_t)0x100) /*!< Right Channel Zero-Cross Interrupt MASK */
#define I2S_INT_MASK_TXDONE ((uint16_t)0x080) /*!< Transmit Done Interrupt Mask */
#define I2S_INT_MASK_TXTH ((uint16_t)0x040) /*!< Transmit FIFO Threshold level Interrupt MASK */
#define I2S_INT_MASK_TXOV ((uint16_t)0x020) /*!< Transmit FIFO Overflow Interrupt MASK */
#define I2S_INT_MASK_TXUD ((uint16_t)0x010) /*!< Transmit FIFO Underflow Interrupt MASK */
#define I2S_INT_MASK_RXDONE ((uint16_t)0x008) /*!< Receive Done Interrupt Mask */
#define I2S_INT_MASK_RXTH ((uint16_t)0x004) /*!< Receive FIFO Threshold level Interrupt MASK */
#define I2S_INT_MASK_RXOV ((uint16_t)0x002) /*!< Receive FIFO Overflow Interrupt MASK */
#define I2S_INT_MASK_RXUD ((uint16_t)0x001) /*!< Receive FIFO Underflow Interrupt MASK */
#define I2S_FLAG_TX_Pos (12) /*!< INT_SRC: TX interrupt flag Position */
#define I2S_FLAG_RX_Pos (11) /*!< INT_SRC: RX interrupt flag Position */
#define I2S_FLAG_I2S_Pos (10) /*!< INT_SRC: I2S module interrupt flag Position */
#define I2S_FLAG_LZC_Pos (9) /*!< INT_SRC: LZC module interrupt flag Position */
#define I2S_FLAG_RZC_Pos (8) /*!< INT_SRC: RZC module interrupt flag Position */
#define I2S_FLAG_TXDONE_Pos (7) /*!< INT_SRC: TXDONE module interrupt flag Position */
#define I2S_FLAG_TXTH_Pos (6) /*!< INT_SRC: TXTH module interrupt flag Position */
#define I2S_FLAG_TXOV_Pos (5) /*!< INT_SRC: TXOV module interrupt flag Position */
#define I2S_FLAG_TXUD_Pos (4) /*!< INT_SRC: TXUD module interrupt flag Position */
#define I2S_FLAG_RXDONE_Pos (3) /*!< INT_SRC: RXDONE module interrupt flag Position */
#define I2S_FLAG_RXTH_Pos (2) /*!< INT_SRC: RXTH module interrupt flag Position */
#define I2S_FLAG_RXOV_Pos (1) /*!< INT_SRC: RXOV module interrupt flag Position */
#define I2S_FLAG_RXUD_Pos (0) /*!< INT_SRC: RXUD module interrupt flag Position */
#define I2S_FLAG_TX (1<<I2S_FLAG_TX_Pos) /*!< INT_SRC: TX interrupt flag */
#define I2S_FLAG_RX (1<<I2S_FLAG_RX_Pos) /*!< INT_SRC: RX interrupt flag */
#define I2S_FLAG_I2S (1<<I2S_FLAG_I2S_Pos) /*!< INT_SRC: I2S module interrupt flag */
#define I2S_FLAG_LZC (1<<I2S_FLAG_LZC_Pos) /*!< INT_SRC: LZC module interrupt flag */
#define I2S_FLAG_RZC (1<<I2S_FLAG_RZC_Pos) /*!< INT_SRC: RZC module interrupt flag */
#define I2S_FLAG_TXDONE (1<<I2S_FLAG_TXDONE_Pos) /*!< INT_SRC: TXDONE module interrupt flag */
#define I2S_FLAG_TXTH (1<<I2S_FLAG_TXTH_Pos) /*!< INT_SRC: TXTH module interrupt flag */
#define I2S_FLAG_TXOV (1<<I2S_FLAG_TXOV_Pos) /*!< INT_SRC: TXOV module interrupt flag */
#define I2S_FLAG_TXUD (1<<I2S_FLAG_TXUD_Pos) /*!< INT_SRC: TXUD module interrupt flag */
#define I2S_FLAG_RXDONE (1<<I2S_FLAG_RXDONE_Pos) /*!< INT_SRC: RXDONE module interrupt flag */
#define I2S_FLAG_RXTH (1<<I2S_FLAG_RXTH_Pos) /*!< INT_SRC: RXTH module interrupt flag */
#define I2S_FLAG_RXOV (1<<I2S_FLAG_RXOV_Pos) /*!< INT_SRC: RXOV module interrupt flag */
#define I2S_FLAG_RXUD (1<<I2S_FLAG_RXUD_Pos) /*!< INT_SRC: RXUD module interrupt flag */
#define I2S_RX_FIFO_CNT_MASK (0x0F) /*!< RX fifo count mask */
#define I2S_TX_FIFO_CNT_MASK (0xF0) /*!< TX fifo count mask */
#define I2S_MAX_RXTXFIFO_LEVEL (8) /*!< max rx/tx fifo level */
#define WM_I2S_TX_DMA_CHANNEL (4)
#define WM_I2S_RX_DMA_CHANNEL (5)
typedef void (*tls_i2s_callback)();
typedef struct
{
/** I2S Control Register */
__IO uint32_t CTRL;
/** I2S Interrupt mask Register */
__IO uint32_t INT_MASK;
/** I2S Interrupt source Register */
__IO uint32_t INT_SRC;
/** I2S Interrupt status Register */
__I uint32_t INT_STATUS;
/** I2S TX data Register */
__O uint32_t TX;
/** I2S RX data Register */
__I uint32_t RX;
} I2S_T;
/** base address of the I2S module */
#define I2S ((I2S_T *)HR_I2S_REG_BASE)
typedef enum
{
/** left channel select */
I2S_CHANNEL_LEFT = I2S_CTRL_CHSEL_LEFT,
/** right channel select */
I2S_CHANNEL_RIGHT = I2S_CTRL_CHSEL_RIGHT
} I2S_CHANNEL_SEL;
typedef struct tls_i2s_options
{
/** I2S receiver enable */
uint8_t rx_en;
/** I2S transfer enable */
uint8_t tx_en;
/** I2S Stereo or Monaural
- \ref I2S_CTRL_STERO
- \ref I2S_CTRL_MONO
*/
uint32_t stereo_mono;
/** I2S module format
- \ref I2S_CTRL_FORMAT_I2S
- \ref I2S_CTRL_FORMAT_MSB
- \ref I2S_CTRL_FORMAT_PCMA
- \ref I2S_CTRL_FORMAT_PCMB
*/
uint32_t format;
/** I2S module data width
- \ref I2S_CTRL_DATABIT_8
- \ref I2S_CTRL_DATABIT_16
- \ref I2S_CTRL_DATABIT_24
- \ref I2S_CTRL_DATABIT_32
*/
uint32_t data_width;
/** I2S module sample rate max 128KHz */
uint32_t sample_rate;
} tls_i2s_options_t;
typedef struct tls_i2s_buf_t
{
/** pointer the bufffer address */
uint32_t * buf;
/** the buffer size in bytes */
uint16_t len;
/** current position of the data */
uint16_t index;
}tls_i2s_buf;
typedef struct _tls_i2s_port
{
/** i2s config params */
struct tls_i2s_options opts;
/** pointer to the I2S registers */
I2S_T * regs;
/** the semaphore used to synchronous transmission */
tls_os_sem_t *tx_sem;
/** instance of tls_i2s_buf struct for data receive */
tls_i2s_buf rx_buf;
/** instance of tls_i2s_buf struct for data receive */
tls_i2s_buf tx_buf;
/** function pointer for data receiver when in interrupt mode */
void (*rx_callback)(u16 len);
/** function pointer for data transmit when in interrupt mode */
void (*tx_callback)(u16 len);
} tls_i2s_port_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup I2S_Driver_APIs I2S Driver APIs
* @brief I2S driver APIs
*/
/**
* @addtogroup I2S_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial i2s port.
* @param[in] opts the i2s setting options,if this param is NULL,this function will use the default options.
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
*
*/
int tls_i2s_port_init(tls_i2s_options_t *opts);
/**
* @brief This function is used to config i2s port.
* @param[in] opts is the i2s setting options
*
*/
void tls_i2s_config(tls_i2s_options_t *opts);
/**
* @brief Set the frequency of the i2s port.
* @param[in] freq the required frequency of the i2s module
* @retval
*
*/
void tls_i2s_set_freq(uint32_t freq);
/**
* @brief set the frequency of the i2s port.
*
* @param[in] freq the required frequency of the i2s module
* @param[in] exclk the frequency of the external clock
*
* @retval
*
*/
void wm_i2s_set_freq_exclk(uint32_t freq, uint32_t exclk);
/**
* @brief This function is used to transfer data in blocking mode.
* @param[in] buf pointer to data buffer
* @param[in] len amount of data to be sent.
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
*/
int tls_i2s_tx_block(uint32_t *buf, uint16_t len);
/**
* @brief This function is used to transfer data in non-blocking mode.
* @param[in] buf pointer to data buffer
* @param[in] len bytes of data to be sent.
* @param[in] tx_callback function pointer to a callback,when the data have been sent this specified function will be called
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
* @note
* this function only submit the data
* when the data transfer finished the tx_callback function will be called
*/
int tls_i2s_tx_nonblock(uint32_t *buf, uint16_t len, void (*tx_callback)(u16 len));
/**
* @brief This function is used to receive data in non-blocking mode.
* @param[in] buf pointer to data buffer
* @param[in] len bytes of data to be sent.
* @param[in] rx_callback function pointer to a callback,when the data have been received this specified function will be called
*
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
* @note
*
*/
int tls_i2s_rx_nonblock(uint32_t *buf, uint16_t len, void (*rx_callback)(u16 len));
/**
* @brief This function is used to transmit data in DMA mode.
* @param[in] buf pointer to data buffer
* @param[in] len bytes of data to be sent.
* @param[in] callback function pointer to a callback,when the data have been sent this specified function will be called
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
* @note
*
*/
int tls_i2s_tx_dma(uint32_t * addr, uint16_t len, tls_i2s_callback callback);
/**
* @brief This function is used to receive data in DMA mode.
* @param[in] addr pointer to data buffer
* @param[in] len bytes of data to be sent.
* @param[in] callback function pointer to a callback,when the data have been received this specified function will be called
* @retval
* - \ref WM_SUCCESS
* - \ref WM_FAILED
* @note
* this function only submit the data
* when the data transfer finished the callback function will be called
*/
int tls_i2s_rx_dma(uint32_t * addr, uint16_t len, tls_i2s_callback callback);
/**
* @brief Enable I2S module
*
*/
#define TLS_I2S_ENABLE() (I2S->CTRL |= I2S_CTRL_EN_MASK)
/**
* @brief Disable I2S module
*
*/
#define TLS_I2S_DISABLE() (I2S->CTRL &= ~I2S_CTRL_EN_MASK)
/**
* @brief Enable clock of I2S module
*
*/
#define TLS_I2S_CLK_ENABLE() \
do { \
tls_bitband_write(HR_CLK_BASE_ADDR, HR_CLK_I2S_GATE_Pos , 1); \
} while(0)
/**
* @brief Disnable clock of I2S module
*
*/
#define TLS_I2S_CLK_DISABLE() \
do { \
tls_bitband_write(HR_CLK_BASE_ADDR, HR_CLK_I2S_GATE_Pos , 0); \
} while(0)
/**
* @brief Enable transmit of I2S module
*
*/
#define TLS_I2S_TX_ENABLE() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_TXE_Pos, 1); \
} while(0)
/**
* @brief Disable transmit of I2S module
*
*/
#define TLS_I2S_TX_DISABLE() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_TXE_Pos, 0); \
} while(0)
/**
* @brief Enable receive of I2S module
*
*/
#define TLS_I2S_RX_ENABLE() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_RXE_Pos, 1); \
} while(0)
/**
* @brief Disable receive of I2S module
*
*/
#define TLS_I2S_RX_DISABLE() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_RXE_Pos, 0); \
} while(0)
/**
* @brief Clear receive FIFO
*
*/
#define TLS_I2S_RX_FIFO_CLEAR() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_RX_CLR_Pos, 1); \
} while(0)
/**
* @brief Clear transmit FIFO
*
*/
#define TLS_I2S_TX_FIFO_CLEAR() \
do { \
tls_bitband_write(HR_I2S_CTRL, I2S_CTRL_TX_CLR_Pos, 1); \
} while(0)
/**
* @brief Enable transmit DMA request
*
*/
#define TLS_I2S_TXDMA_ENABLE() (I2S->CTRL |= I2S_CTRL_TXDMA_MASK)
/**
* @brief Disnable transmit DMA request
*
*/
#define TLS_I2S_TXDMA_DISABLE() (I2S->CTRL &= ~I2S_CTRL_TXDMA_MASK)
/**
* @brief Enable receive DMA request
*
*/
#define TLS_I2S_RXDMA_ENABLE() (I2S->CTRL |= I2S_CTRL_RXDMA_MASK)
/**
* @brief Disnable receive DMA request
*
*/
#define TLS_I2S_RXDMA_DISABLE() (I2S->CTRL &= ~I2S_CTRL_RXDMA_MASK)
/**
* @brief Left channel zero-cross detection enable
*
*/
#define TLS_I2S_LZC_ENABLE() (I2S->CTRL |= I2S_CTRL_LZCEN_MASK)
/**
* @brief Left channel zero-cross detection disable
*
*/
#define TLS_I2S_LZC_DISABLE() (I2S->CTRL &= ~I2S_CTRL_LZCEN_MASK)
/**
* @brief Right channel zero-cross detection enable
*
*/
#define TLS_I2S_RZC_ENABLE() (I2S->CTRL |= I2S_CTRL_RZCEN_MASK)
/**
* @brief Right channel zero-cross detection disable
*
*/
#define TLS_I2S_RZC_DISABLE() (I2S->CTRL &= ~I2S_CTRL_RZCEN_MASK)
/** @brief Enable transmit mute
*
*/
#define TLS_I2S_TX_MUTE_ENABLE() (I2S->CTRL |= I2S_CTRL_MUTE_MASK)
/**
* @brief Disable transmit mute
*
*/
#define TLS_I2S_TX_MUTE_DISABLE() (I2S->CTRL &= ~ I2S_CTRL_MUTE_MASK)
/**
* @brief Set receive FIFO threshold level
* @param[in] level The value set to Rx threshold level
*
*/
static __inline__ void tls_i2s_set_rxth(uint8_t level)
{
if (level > 8)
{
level = 3;
}
I2S->CTRL &= ~ I2S_CTRL_RXTH_MASK;
I2S->CTRL |= ((level - 1)<<I2S_CTRL_RXTH_Pos);
}
/**
* @brief Set transmit FIFO threshold level
* @param[in] level The value set to Tx threshold level
*/
static __inline__ void tls_i2s_set_txth(uint8_t level)
{
if (level > 8)
level = 4;
I2S->CTRL &= ~ I2S_CTRL_TXTH_MASK;
I2S->CTRL |= (level<<I2S_CTRL_TXTH_Pos);
}
/**
* @brief Enable or disable receiver of I2S module
* @param[in] enable When one enable the receiver of I2S module, when zero disable
*/
static __inline__ void tls_i2s_channel_sel(I2S_CHANNEL_SEL channel_sel)
{
I2S->CTRL &= ~ I2S_CTRL_CHSEL_MASK;
I2S->CTRL |= channel_sel;
}
/**
* @brief Enables or disables the specified I2S interrupts
* @param[in] i2s_int_mask specifies the I2S interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* - \ref I2S_INT_MASK_LZC
* - \ref I2S_INT_MASK_RZC
* - \ref I2S_INT_MASK_TXDONE
* - \ref I2S_INT_MASK_TXTH
* - \ref I2S_INT_MASK_TXOV
* - \ref I2S_INT_MASK_TXUD
* - \ref I2S_INT_MASK_RXDONE
* - \ref I2S_INT_MASK_RXTH
* - \ref I2S_INT_MASK_RXOV
* - \ref I2S_INT_MASK_RXUD
* @param[in] enable when set 1 disable interrupt, 0 enable
* @retval None
*/
static __inline__ void tls_i2s_int_config(uint32_t i2s_int_mask, uint8_t enable)
{
if(enable)
{
I2S->INT_MASK &= ~i2s_int_mask;
}
else
{
I2S->INT_MASK |= i2s_int_mask;
}
}
/**
* @brief Enable master clock (MCLK).
* @param[in] clock The target MCLK clock rate.
* @retval actual MCLK clock rate
* @details Set the master clock rate according to u32BusClock parameter and enable master clock output.
* The actual master clock rate may be different from the target master clock rate.
* The real master clock rate will be returned for reference.
*/
uint32_t tls_i2s_mclk_enable(uint32_t clock);
/**
* @brief disable master clock (MCLK).
*
*/
void tls_i2s_mclk_disable(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /** __WM_I2S_H*/
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_internal_flash.h
+239
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/**
* @file wm_internal_flash.h
*
* @brief inter flash driver
*
* @author dave
*
* @copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_INTERNAL_FLASH_H
#define WM_INTERNAL_FLASH_H
#include "wm_type_def.h"
#include "wm_osal.h"
typedef volatile unsigned char vu8;
typedef volatile unsigned short vu16;
typedef volatile unsigned long vu32;
#define M8(adr) (*((vu8 *) (adr)))
#define M16(adr) (*((vu16*) (adr)))
#define M32(adr) (*((vu32*) (adr)))
#define INSIDE_FLS_BLOCK_SIZE (0x10000UL)
#define INSIDE_FLS_SECTOR_SIZE (0x1000UL)
#define INSIDE_FLS_PAGE_SIZE 256
#define INSIDE_FLS_BASE_ADDR 0x8000000UL
#define INSIDE_FLS_SECBOOT_ADDR (INSIDE_FLS_BASE_ADDR + 0x02000)
enum TYPE_FLASH_ID{
SPIFLASH_MID_GD = 0xC8,
SPIFLASH_MID_ESMT = 0x1C,
SPIFLASH_MID_PUYA = 0x85,
SPIFLASH_MID_WINBOND = 0xEF,
};
/**
* @typedef struct Flash Registers
*/
typedef struct
{
vu32 ACR; /**< offset 0x000 */
vu32 KEYR; /**< offset 0x004 */
vu32 SR; /**< offset 0x008 */
vu32 CR; /**< offset 0x00C */
vu32 AR; /**< offset 0x010 */
} FLASH_TypeDef;
#define FLASH_HS 0x00000001
/** Flash Keys */
#define RDPRT_KEY 0x5AA5
#define FLASH_KEY1 0x57696E6E
#define FLASH_KEY2 0x65724D69
#define FLASH_KEY3 0x63726F21
/** Flash Control Register definitions */
#define FLASH_PG 0x00000001
#define FLASH_PER 0x00000002
#define FLASH_MER 0x00000004
#define FLASH_STRT 0x00000008
#define FLASH_LOCK 0x00000020
#define FLASH_ERRIE 0x00000040
#define FLASH_EOPIE 0x00000080
/** Flash Status Register definitions */
#define FLASH_BSY 0x00000001
#define FLASH_PGERR 0x00000002
#define FLASH_EOP 0x00000004
#define TLS_FLS_STATUS_OK (0)
#define TLS_FLS_STATUS_EINVAL (1)
#define TLS_FLS_STATUS_EBUSY (2)
#define TLS_FLS_STATUS_EPERM (3)
#define TLS_FLS_STATUS_ENOSUPPORT (4)
#define TLS_FLS_STATUS_EEXIST (5)
#define TLS_FLS_STATUS_ENOMEM (6)
#define TLS_FLS_STATUS_EOVERFLOW (7)
#define TLS_FLS_STATUS_ENODEV (8)
#define TLS_FLS_STATUS_EDEV (9)
#define TLS_FLS_STATUS_EIO (10)
#define TLS_FLS_STATUS_ENODRV (11)
#define TLS_FLS_PARAM_TYPE_ID (0)
#define TLS_FLS_PARAM_TYPE_SIZE (1)
#define TLS_FLS_PARAM_TYPE_PAGE_SIZE (2)
#define TLS_FLS_PARAM_TYPE_PROG_SIZE (3)
#define TLS_FLS_PARAM_TYPE_SECTOR_SIZE (4)
#define TLS_FLS_FLAG_UNDER_PROTECT (1<<0)
#define TLS_FLS_FLAG_FAST_READ (1<<1)
#define TLS_FLS_FLAG_AAAI (1<<2)
/**
* @struct tls_inside_fls
*/
struct tls_inside_fls
{
tls_os_sem_t *fls_lock;
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup INTERNAL_FLASH_Driver_APIs INTERNAL_FLASH Driver APIs
* @brief INTERNAL_FLASH driver APIs
*/
/**
* @addtogroup INTERNAL_FLASH_Driver_APIs
* @{
*/
/**
* @brief This function is used to unlock flash protect area [0x0~0x2000].
*
* @param None
*
* @return 0 success
* -1 fail
*
* @note None
*/
int tls_flash_unlock(void);
/**
* @brief This function is used to lock flash protect area [0x0~0x2000].
*
* @param None
*
* @return 0 success
* -1 fail
*
* @note None
*/
int tls_flash_lock(void);
/**
* @brief This function is used to get the flash semaphore.
*
* @param None
*
* @return None
*
* @note None
*/
void tls_fls_sem_lock(void);
/**
* @brief This function is used to release the flash semaphore.
*
* @param None
*
* @return None
*
* @note None
*/
void tls_fls_sem_unlock(void);
/**
* @brief This function is used to initial flash module structer.
*
* @param[in] None
*
* @retval TLS_FLS_STATUS_OK if init sucsess
* @retval TLS_FLS_STATUS_EBUSY already inited
* @retval TLS_FLS_STATUS_ENOMEM memory error
*
* @note None
*/
int tls_fls_init(void);
/**
* @brief This function is used to read data from the flash.
*
* @param[in] addr Specifies the starting address to read from.
* @param[in] buf Specified the address to save the readback data.
* @param[in] len Specifies the length of the data to read.
*
* @retval TLS_FLS_STATUS_OK if read sucsess
* @retval TLS_FLS_STATUS_EPERM if flash driver module not beed installed
* @retval TLS_FLS_STATUS_EINVAL if arguments invalid
* @retval TLS_FLS_STATUS_EIO if read fail
*
* @note None
*/
int tls_fls_read(u32 addr, u8 * buf, u32 len);
/**
* @brief This function is used to write data into the flash.
*
* @param[in] addr Specifies the starting address to write to
* @param[in] buf Pointer to a byte array that is to be written
* @param[in] len Specifies the length of the data to be written
*
* @retval TLS_FLS_STATUS_OK if write flash success
* @retval TLS_FLS_STATUS_EPERM if flash struct point is null
* @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
* @retval TLS_FLS_STATUS_EINVAL if argument is invalid
* @retval TLS_FLS_STATUS_EIO if io error
*
* @note None
*/
int tls_fls_write(u32 addr, u8 * buf, u32 len);
/**
* @brief This function is used to erase the appointed sector
*
* @param[in] sector sector num of the flash, 4K bytes every sector
*
* @retval TLS_FLS_STATUS_OK if read sucsess
* @retval other if read fail
*
* @note None
*/
int tls_fls_erase(u32 sector);
void writeSRLockBit(unsigned char srbitlock);
#endif /* WM_INTERNAL_FLASH_H */
sdk/Include/Driver/wm_io.h
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/**
* @file wm_io.h
*
* @brief IO Driver Module
*
* @author lilm
*
* @copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_IO_H
#define WM_IO_H
#define TLS_IO_AB_OFFSET (0x40011200 - 0x40010C00)
/** io name */
enum tls_io_name {
WM_IO_PA_00 = 0, /**< gpio a0 */
WM_IO_PA_01, /**< gpio a1 */
WM_IO_PA_02, /**< gpio a2 */
WM_IO_PA_03, /**< gpio a3 */
WM_IO_PA_04, /**< gpio a4 */
WM_IO_PA_05, /**< gpio a5 */
WM_IO_PA_06, /**< gpio a6 */
WM_IO_PA_07, /**< gpio a7 */
WM_IO_PA_08, /**< gpio a8 */
WM_IO_PA_09, /**< gpio a9 */
WM_IO_PA_10, /**< gpio a10 */
WM_IO_PA_11, /**< gpio a11 */
WM_IO_PA_12, /**< gpio a12 */
WM_IO_PA_13, /**< gpio a13 */
WM_IO_PA_14, /**< gpio a14 */
WM_IO_PA_15, /**< gpio a15 */
WM_IO_PB_00, /**< gpio b0 */
WM_IO_PB_01, /**< gpio b1 */
WM_IO_PB_02, /**< gpio b2 */
WM_IO_PB_03, /**< gpio b3 */
WM_IO_PB_04, /**< gpio b4 */
WM_IO_PB_05, /**< gpio b5 */
WM_IO_PB_06, /**< gpio b6 */
WM_IO_PB_07, /**< gpio b7 */
WM_IO_PB_08, /**< gpio b8 */
WM_IO_PB_09, /**< gpio b9 */
WM_IO_PB_10, /**< gpio b10 */
WM_IO_PB_11, /**< gpio b11 */
WM_IO_PB_12, /**< gpio b12 */
WM_IO_PB_13, /**< gpio b13 */
WM_IO_PB_14, /**< gpio b14 */
WM_IO_PB_15, /**< gpio b15 */
WM_IO_PB_16, /**< gpio b16 */
WM_IO_PB_17, /**< gpio b17 */
WM_IO_PB_18, /**< gpio b18 */
WM_IO_PB_19, /**< gpio b19 */
WM_IO_PB_20, /**< gpio b20 */
WM_IO_PB_21, /**< gpio b21 */
WM_IO_PB_22, /**< gpio b22 */
WM_IO_PB_23, /**< gpio b23 */
WM_IO_PB_24, /**< gpio b24 */
WM_IO_PB_25, /**< gpio b25 */
WM_IO_PB_26, /**< gpio b26 */
WM_IO_PB_27, /**< gpio b27 */
WM_IO_PB_28, /**< gpio b28 */
WM_IO_PB_29, /**< gpio b29 */
WM_IO_PB_30, /**< gpio b30 */
WM_IO_PB_31 /**< gpio b31 */
};
/** option 1 of the io */
#define WM_IO_OPTION1 1
/** option 2 of the io */
#define WM_IO_OPTION2 2
/** option 3 of the io */
#define WM_IO_OPTION3 3
/** option 4 of the io */
#define WM_IO_OPTION4 4
/** option 5 of the io */
#define WM_IO_OPTION5 5
/** option 6 of the io */
#define WM_IO_OPTION6 6
/* io option1 */
#define WM_IO_OPT1_I2C_DAT WM_IO_OPTION1
#define WM_IO_OPT1_PWM1 WM_IO_OPTION1
#define WM_IO_OPT1_PWM2 WM_IO_OPTION1
#define WM_IO_OPT1_PWM3 WM_IO_OPTION1
#define WM_IO_OPT1_PWM4 WM_IO_OPTION1
#define WM_IO_OPT1_PWM5 WM_IO_OPTION1
#define WM_IO_OPT1_UART0_RXD WM_IO_OPTION1
#define WM_IO_OPT1_UART0_TXD WM_IO_OPTION1
#define WM_IO_OPT1_PWM_BRAKE WM_IO_OPTION1
#define WM_IO_OPT1_I2S_M_EXTCLK WM_IO_OPTION1
#define WM_IO_OPT1_SPI_M_DO WM_IO_OPTION1
#define WM_IO_OPT1_SPI_M_DI WM_IO_OPTION1
#define WM_IO_OPT1_SPI_M_CS WM_IO_OPTION1
#define WM_IO_OPT1_SPI_M_CK WM_IO_OPTION1
#define WM_IO_OPT1_I2S_S_RL WM_IO_OPTION1
#define WM_IO_OPT1_I2S_S_SCL WM_IO_OPTION1
#define WM_IO_OPT1_I2S_S_SDA WM_IO_OPTION1
#define WM_IO_OPT1_I2S_M_RL WM_IO_OPTION1
#define WM_IO_OPT1_I2S_M_SCL WM_IO_OPTION1
#define WM_IO_OPT1_I2S_M_SDA WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_RST WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_TDO WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_TDI WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_TCK_SWDCK WM_IO_OPTION1
#define WM_IO_OPT1_JTAG_TMS_SWDAT WM_IO_OPTION1
#define WM_IO_OPT1_UART1_RXD WM_IO_OPTION1
#define WM_IO_OPT1_UART1_TXD WM_IO_OPTION1
#define WM_IO_OPT1_UART1_RTS WM_IO_OPTION1
#define WM_IO_OPT1_UART1_CTS WM_IO_OPTION1
#define WM_IO_OPT1_SDIO_DAT WM_IO_OPTION1
/* io option2 */
#define WM_IO_OPT2_PWM1 WM_IO_OPTION2
#define WM_IO_OPT2_PWM2 WM_IO_OPTION2
#define WM_IO_OPT2_PWM3 WM_IO_OPTION2
#define WM_IO_OPT2_PWM4 WM_IO_OPTION2
#define WM_IO_OPT2_PWM5 WM_IO_OPTION2
#define WM_IO_OPT2_SPI_M_DO WM_IO_OPTION2
#define WM_IO_OPT2_SPI_M_DI WM_IO_OPTION2
#define WM_IO_OPT2_SPI_M_CS WM_IO_OPTION2
#define WM_IO_OPT2_SPI_M_CK WM_IO_OPTION2
#define WM_IO_OPT2_I2C_SCL WM_IO_OPTION2
#define WM_IO_OPT2_I2S_M_EXTCLK WM_IO_OPTION2
#define WM_IO_OPT2_UART1_RXD WM_IO_OPTION2
#define WM_IO_OPT2_UART1_TXD WM_IO_OPTION2
#define WM_IO_OPT2_UART1_RTS WM_IO_OPTION2
#define WM_IO_OPT2_UART1_CTS WM_IO_OPTION2
#define WM_IO_OPT2_I2C_DAT WM_IO_OPTION2
#define WM_IO_OPT2_PWM_BRAKE WM_IO_OPTION2
#define WM_IO_OPT2_UART0_RTS WM_IO_OPTION2
#define WM_IO_OPT2_UART0_CTS WM_IO_OPTION2
#define WM_IO_OPT2_SDIO_DAT WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_CK WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_INT WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_CS WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_DI WM_IO_OPTION2
#define WM_IO_OPT2_HSPI_DO WM_IO_OPTION2
/* io option3 */
#define WM_IO_OPT3_UART0_RXD WM_IO_OPTION3
#define WM_IO_OPT3_UART0_TXD WM_IO_OPTION3
#define WM_IO_OPT3_UART0_RTS WM_IO_OPTION3
#define WM_IO_OPT3_UART0_CTS WM_IO_OPTION3
#define WM_IO_OPT3_SPI_M_DO WM_IO_OPTION3
#define WM_IO_OPT3_SPI_M_DI WM_IO_OPTION3
#define WM_IO_OPT3_SPI_M_CS WM_IO_OPTION3
#define WM_IO_OPT3_SDIO_CK WM_IO_OPTION3
#define WM_IO_OPT3_SDIO_CMD WM_IO_OPTION3
#define WM_IO_OPT3_SDIO_DAT WM_IO_OPTION3
/* io option4 */
#define WM_IO_OPT4_I2S_M_MCLK WM_IO_OPTION4
#define WM_IO_OPT4_I2S_M_RL WM_IO_OPTION4
#define WM_IO_OPT4_I2S_M_SCL WM_IO_OPTION4
#define WM_IO_OPT4_I2S_M_SDA WM_IO_OPTION4
/* io option5 */
#define WM_IO_OPT5_GPIO WM_IO_OPTION5
/* io option6 */
#define WM_IO_OPT6_ADC WM_IO_OPTION6
#define WM_IO_OPT6_LCD_COM WM_IO_OPTION6
#define WM_IO_OPT6_LCD_SEG WM_IO_OPTION6
/**
* @brief This function is used to config io function
*
* @param[in] name io name
* @param[in] option io function option, value is WM_IO_OPT*_*, also is WM_IO_OPTION1~6
*
* @return None
*
* @note None
*/
void tls_io_cfg_set(enum tls_io_name name, u8 option);
/**
* @brief This function is used to get io function config
*
* @param[in] name io name
*
* @retval WM_IO_OPTION1~6 Mapping io function
*
* @note None
*/
int tls_io_cfg_get(enum tls_io_name name);
#endif /* end of WM_IO_H */
sdk/Include/Driver/wm_iouart.h
+138
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/*****************************************************************************
*
* File Name : wm_iouart.h
*
* Description: IO uart Driver Module
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
* All rights reserved.
*
* Author : dave
*
* Date : 2015-8-13
*****************************************************************************/
#ifndef WM_IO_UART_H
#define WM_IO_UART_H
#include "wm_uart.h"
#include "wm_io.h"
#define IO_UART_FOR_PRINT 0
#define IO_UART_TX WM_IO_PB_08
#define IO_UART_RX WM_IO_PB_09
#define IO_UART_HIGH 1
#define IO_UART_LOW 0
#define TLS_IO_UART_RX_BUF_SIZE 1024
#define TLS_IO_UART_TX_BUF_SIZE 1024
#define IO_UART_RATE_MUL 8 //采样率=该值*波特率
#define IO_UART_ONEBITE_SAMPLE_NUM 2
#define IO_UART_ONEBYTE_BIT 10
typedef struct tls_io_uart{
struct tls_uart_circ_buf recv;
int timercnt;
u8 bit[IO_UART_ONEBITE_SAMPLE_NUM]; //每个bit采样3次，然后判断高低电平
u8 bitcnt; //单个bit采样次数
u8 bitnum; //bit号，一个byte共有10个bit(1个起始位+8个数据位+1个停止位)
u8 ifrx; //是否正在rx
u8 iftx; //是否正在tx
u8 timerid;
}tls_io_uart_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup IOUART_Driver_APIs IOUART Driver APIs
* @brief IOUART driver APIs
*/
/**
* @addtogroup IOUART_Driver_APIs
* @{
*/
/**
* @brief This function is used to initialize uart io
*
* @param[in] bandrate iouart baudrate
*
* @return WM_SUCCESS success
* @return WM_FAILED fail
*
* @note None
*/
int tls_iouart_init(int bandrate);
/**
* @brief This function is used to restore uart io cfg
*
* @param[in] None
*
* @return WM_SUCCESS success
*
* @note None
*/
int tls_iouart_destroy(void);
/**
* @brief This function is used to read data from uart io
*
* @param[in] buf is the user buffer
* @param[in] readsize is the user read size
*
* @return >0 copy data size
* @return WM_FAILED fail
*
* @note None
*/
int tls_iouart_read(u8 * buf, int bufsize);
/**
* @brief This function is used to transfer data synchronously.
*
* @param[in] buf is a buf for saving user data
* @param[in] writesize is the user data length
*
* @retval WM_SUCCESS tx success
* @retval WM_FAILED tx failed
*
* @note None
*/
int tls_iouart_write(u8 * buf, int bufsize);
/**
* @brief This function is used to output a character to the serial port.
*
* @param[in] ch character to be output
*
* @retval ch
*
* @note None
*/
int tls_iouart_output_char(int ch);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_IO_UART_H */
sdk/Include/Driver/wm_irq.h
+177
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/**
* @file wm_irq.h
*
* @brief interupt driver module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_IRQ_H
#define WM_IRQ_H
#include "wm_type_def.h"
/* Number of interrupts. */
#define INTR_CNT 41
#define SDIO_UP_DATA_INT (0UL)
#define SDIO_DOWN_DATA_INT (1UL)
#define SDIO_UP_CMD_INT (2UL)
#define SDIO_DOWN_CMD_INT (3UL)
#define MAC_INT (4UL)
#define RX_INT (6UL)
#define TX_MGMT_COMPLETE_INT (7UL)
#define TX_DATA_COMPLETE_INT (8UL)
#define PMU_TIMER1_INT (9UL)
#define PMU_TIMER0_INT (10UL)
#define PMU_GPIO_WAKEUP_INT (11UL)
#define PMU_SDIO_WAKEUP_INT (12UL)
#define DMA0_INT (13UL)
#define DMA1_INT (14UL)
#define DMA2_INT (15UL)
#define DMA3_INT (16UL)
#define DMA4_INT (17UL)
#define DMA_BURST_INT (18UL)
#define I2C_INT (19UL)
#define ADC_INT (20UL)
#define SPI0_INT (21UL)
#define SPI1_INT (22UL)
#define UART0_INT (23UL)
#define UART1_INT (24UL)
#define GPIO_INT (25UL)
#define TIMER0_INT (26UL)
#define TIMER1_INT (27UL)
#define TIMER2_INT (28UL)
#define TIMER3_INT (29UL)
#define TIMER4_INT (30UL)
#define TIMER5_INT (31UL)
#define WATCHDOG_INT (32UL)
#define PMU_BOD_INT (33UL)
#define FLASH_INT (34UL)
#define PWM_INT (35UL)
#define I2S_INT (36UL)
#define PMU_RTC_INT (37UL)
#define RSA_INT (38UL)
#define CRYPTION_INT (39UL)
#define GPIOB_INT (40UL)
#define UART2_INT (41UL)
#define IRQ_MAX_SYSCALL_PRIORITY 0x0B
typedef void (*intr_handler_func) (void *);
/**
* @typedef struct tls_irq_handler
*/
typedef struct tls_irq_handler
{
void (*handler) (void *);
void *data;
// const char *name;
u32 counter;
} tls_irq_handler_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup IRQ_Driver_APIs IRQ Driver APIs
* @brief IRQ driver APIs
*/
/**
* @addtogroup IRQ_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial system interrupt.
*
* @param[in] None
*
* @return None
*
* @note None
*/
void tls_irq_init(void);
/**
* @brief This function is used to register interrupt handler function.
*
* @param[in] vec_no interrupt NO
* @param[in] handler
* @param[in] *data
*
* @return None
*
* @note None
*/
void tls_irq_register_handler(u8 vec_no, intr_handler_func handler, void *data);
/**
* @brief This function is used to enable interrupt.
*
* @param[in] vec_no interrupt NO
*
* @return None
*
* @note None
*/
void tls_irq_enable(u8 vec_no);
/**
* @brief This function is used to set interrupt priority.
*
* @param[in] vec_no interrupt no
* @param[in] priority priority
*
* @return None
*
* @note None
*/
void tls_irq_set_priority(u8 vec_no, u8 priority);
/**
* @brief This function is used to disable interrupt.
*
* @param[in] vec_no interrupt NO
*
* @return None
*
* @note None
*/
void tls_irq_disable(u8 vec_no);
/**
* @brief This function is used to get the isr count.
*
* @param[in] None
*
* @retval count
*
* @note None
*/
u8 tls_get_isr_count(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_IRQ_H */
sdk/Include/Driver/wm_lcd.h
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/**
* @file wm_lcd.h
*
* @brief LCD Driver Module
*
* @author dave
*
* @copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef __WM_LCD_H
#define __WM_LCD_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_regs.h"
#include <stdbool.h>
/**
* @brief LCD Register Declaration
*
*/
typedef struct
{
/** Control Register */
__IO uint32_t CTRL;
/** Refresh Rate Prescaler Register */
__IO uint32_t FRAMECNT;
/** Data Register */
__IO uint32_t COM01;
/** Data Register */
__IO uint32_t COM23;
/** Data Register */
__IO uint32_t COM45;
/** Data Register */
__IO uint32_t COM67;
/** LCD IO Control Register */
__IO uint32_t IO_EN;
} LCD_T;
/** LCD base pointer */
#define LCD ((LCD_T *)HR_LCD_REG_BASE)
typedef enum
{
/** Static (2 levels) */
BIAS_STATIC = LCD_BIAS_STATIC,
/** 1/2 Bias (3 levels) */
BIAS_ONEHALF = LCD_BIAS_ONEHALF,
/** 1/3 Bias (4 levels) */
BIAS_ONETHIRD = LCD_BIAS_ONETHIRD,
/** 1/4 Bias (4 levels) */
BIAS_ONEFOURTH = LCD_BIAS_ONEFOURTH,
} LCD_BiasDef;
typedef enum
{
/** VLCD 2.7v */
VLCD27 = LCD_VLCD_27,
/** VLCD 2.9v */
VLCD29 = LCD_VLCD_29,
/** VLCD 3.1v */
VLCD31 = LCD_VLCD_31,
/** VLCD 3.3v */
VLCD33 = LCD_VLCD_33,
} LCD_VlcdDef;
typedef enum
{
/** max configuration is 8x16 */
MODE8x16 = LCD_CR_MODE_8X16,
/** max configuration is 4x20 */
MODE4x20 = LCD_CR_MODE_4x20,
} LCD_ModeDef;
typedef enum
{
/** Static (segments can be multiplexed with LCD_COM[0]) */
DUTY_STATIC = LCD_DUTY_STATIC,
/** 1/2 Duty cycle (segments can be multiplexed with LCD_COM[0:1]) */
DUTY_ONEHALF = LCD_DUTY_ONEHALF,
/** 1/3 Duty cycle (segments can be multiplexed with LCD_COM[0:2]) */
DUTY_ONETHIRD = LCD_DUTY_ONETHIRD,
/** 1/4 Duty cycle (segments can be multiplexed with LCD_COM[0:3]) */
DUTY_ONEFOURTH = LCD_DUTY_ONEFOURTH,
/** 1/5 Duty cycle (segments can be multiplexed with LCD_COM[0:4]) */
DUTY_ONEFIFTH = LCD_DUTY_ONEFIFTH,
/** 1/6 Duty cycle (segments can be multiplexed with LCD_COM[0:5]) */
DUTY_ONESIXTH = LCD_DUTY_ONESIXTH,
/** 1/7 Duty cycle (segments can be multiplexed with LCD_COM[0:6]) */
DUTY_ONESEVENTH = LCD_DUTY_ONESEVENTH,
/** 1/8 Duty cycle (segments can be multiplexed with LCD_COM[0:7]) */
DUTY_ONEEIGHTH = LCD_DUTY_ONEEIGHTH,
} LCD_DutyDef;
typedef struct tls_lcd_options
{
bool enable;
/** 8x16 or 4x20*/
LCD_ModeDef mode;
/** Bias configuration */
LCD_BiasDef bias;
/** Duty configuration */
LCD_DutyDef duty;
/** Vlcd configuration */
LCD_VlcdDef vlcd;
/** Fresh rate configuration */
uint16_t fresh_rate;
} tls_lcd_options_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup LCD_Driver_APIs LCD Driver APIs
* @brief LCD driver APIs
*/
/**
* @addtogroup LCD_Driver_APIs
* @{
*/
/**
* @brief initialize the LCD module
* param[in] opts LCD Structure pointer
*/
void tls_lcd_init(tls_lcd_options_t *opts);
/**
* @brief Initialize LCD Frame Counter
* @param[in] freq LCD reference refresh frequency in Hz that will be used
*
*/
void tls_lcd_fresh_rate(uint16_t freq);
/**
* @brief Turn on or clear a segment
* @param[in] com Which COM line to update
* @param[in] bit Bit index of which field to change
* @param[in] enable When one will set segment, when zero will clear segment
* @note Before this function be called, the module must have been intialized
*/
void tls_lcd_seg_set(int com, int bit, int on_off);
/**
* @brief Select the voltage of LCD module
* @param[in] vlcd This parameter can be one of the following values:
* - \ref VLCD27
* - \ref VLCD29
* - \ref VLCD31
* - \ref VLCD33
*/
void tls_lcd_vlcd_sel(LCD_VlcdDef vlcd);
/**
* @brief Set the duty of LCD module
* @param[in] duty This parameter can be one of the following values:
* - \ref DUTY_STATIC
* - \ref DUTY_ONEHALF
* - \ref DUTY_ONETHIRD
* - \ref DUTY_ONEFOURTH
* - \ref DUTY_ONEFIFTH
* - \ref DUTY_ONESIXTH
* - \ref DUTY_ONESEVENTH
* - \ref DUTY_ONEEIGHTH
*
*/
void tls_lcd_duty_set(LCD_DutyDef duty);
/**
* @brief Set the bias of LCD module
* @param[in] duty This parameter can be one of the following values:
* - \ref BIAS_STATIC
* - \ref BIAS_ONEHALF
* - \ref BIAS_ONETHIRD
* - \ref BIAS_ONEFOURTH
*
*/
void tls_lcd_bias_set(LCD_BiasDef bias);
/**
* @brief Enable or disable the LCD module gpio
*
* @param[in] val Each bit of the value corresponds to a LCD gpio, set 1 gpio output enable ,0 output disabled
*
*/
void tls_lcd_io_config(unsigned int val);
/**
* @brief Enable or disable clock of LCD module
* @param[in] enable When one enable the clock of LCD module, when zero disable
*/
#define TLS_LCD_CLK_ENABLE(enable) \
do { \
tls_bitband_write(HR_CLK_BASE_ADDR, HR_CLK_LCD_GATE_Pos, enable); \
} while(0)
/**
* @brief Enable or disable the LCD module
* @param[in] enable When one enable the LCD module, when zero disable
*
*/
#define TLS_LCD_ENABLE(enable) \
do { \
tls_bitband_write(HR_LCD_CR, LCD_CR_EN_Pos, enable); \
} while(0)
/**
* @brief Enable or disable the LCD module
* @param[in] enable When one close LCD module, when zero open the LCD module
*
*/
#define TLS_LCD_POWERDOWM(enable) \
do { \
tls_bitband_write(HR_LCD_CR, LCD_CR_PD_Pos, enable); \
} while(0)
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_pmu.h
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/**
* @file wm_pmu.h
*
* @brief pmu driver module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_PMU_H
#define WM_PMU_H
#ifdef __cplusplus
extern "C" {
#endif
#include "wm_type_def.h"
typedef void (*tls_pmu_irq_callback)(void *arg);
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup PMU_Driver_APIs PMU Driver APIs
* @brief PMU driver APIs
*/
/**
* @addtogroup PMU_Driver_APIs
* @{
*/
/**
* @brief This function is used to register pmu timer1 interrupt
*
* @param[in] callback the pmu timer1 interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* user not need clear interrupt flag.
* pmu timer1 callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_pmu_timer1_isr_register(tls_pmu_irq_callback callback, void *arg);
/**
* @brief This function is used to register pmu timer0 interrupt
*
* @param[in] callback the pmu timer0 interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* user not need clear interrupt flag.
* pmu timer0 callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_pmu_timer0_isr_register(tls_pmu_irq_callback callback, void *arg);
/**
* @brief This function is used to register pmu gpio interrupt
*
* @param[in] callback the pmu gpio interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* user not need clear interrupt flag.
* pmu gpio callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_pmu_gpio_isr_register(tls_pmu_irq_callback callback, void *arg);
/**
* @brief This function is used to register pmu sdio interrupt
*
* @param[in] callback the pmu sdio interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* user not need clear interrupt flag.
* pmu sdio callback function is called in interrupt,
* so can not operate the critical data in the callback fuuction,
* recommendation to send messages to other tasks to operate it.
*/
void tls_pmu_sdio_isr_register(tls_pmu_irq_callback callback, void *arg);
/**
* @brief This function is used to select pmu clk
*
* @param[in] bypass pmu clk whether or not use bypass mode
* 1 pmu clk use 32K by 40MHZ
* other pmu clk 32K by calibration circuit
*
* @return None
*
* @note None
*/
void tls_pmu_clk_select(u8 bypass);
/**
* @brief This function is used to start pmu timer0
*
* @param[in] second vlaue of timer0 count[s]
*
* @return None
*
* @note None
*/
void tls_pmu_timer0_start(u16 second);
/**
* @brief This function is used to stop pmu timer0
*
* @param None
*
* @return None
*
* @note None
*/
void tls_pmu_timer0_stop(void);
/**
* @brief This function is used to start pmu timer1
*
* @param[in] second vlaue of timer1 count[ms]
*
* @return None
*
* @note None
*/
void tls_pmu_timer1_start(u16 msec);
/**
* @brief This function is used to stop pmu timer1
*
* @param None
*
* @return None
*
* @note None
*/
void tls_pmu_timer1_stop(void);
/**
* @brief This function is used to start pmu goto standby
*
* @param None
*
* @return None
*
* @note None
*/
void tls_pmu_standby_start(void);
typedef enum {
TLS_PERIPHERAL_TYPE_I2C = (1 << 0),
TLS_PERIPHERAL_TYPE_UART0 = (1 << 1),
TLS_PERIPHERAL_TYPE_UART1 = (1 << 2),
TLS_PERIPHERAL_TYPE_LSPI = (1 << 3),
TLS_PERIPHERAL_TYPE_DMA = (1 << 4),
TLS_PERIPHERAL_TYPE_RFCFG = (1 << 5),
TLS_PERIPHERAL_TYPE_TIMER = (1 << 6),
TLS_PERIPHERAL_TYPE_GPIO = (1 << 7),
TLS_PERIPHERAL_TYPE_SDADC = (1 << 8),
TLS_PERIPHERAL_TYPE_PWM = (1 << 9),
TLS_PERIPHERAL_TYPE_LCD = (1 << 10),
TLS_PERIPHERAL_TYPE_I2S = (1 << 11),
TLS_PERIPHERAL_TYPE_RSA = (1 << 12),
TLS_PERIPHERAL_TYPE_GPSEC = (1 << 13),
TLS_PERIPHERAL_TYPE_7816 = (1 << 14)
}tls_peripheral_type_s;
/**
* @brief This function is used to close peripheral's clock
*
* @param[in] devices peripherals
*
* @return None
*
* @note None
*/
void tls_close_peripheral_clock(tls_peripheral_type_s devices);
/**
* @brief This function is used to open peripheral's clock
*
* @param[in] devices peripherals
*
* @return None
*
* @note None
*/
void tls_open_peripheral_clock(tls_peripheral_type_s devices);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end of WM_PMU_H */
/*** (C) COPYRIGHT 2014 Winner Microelectronics Co., Ltd. ***/
sdk/Include/Driver/wm_pwm.h
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/**
* @file wm_pwm.h
*
* @brief pwm driver module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_PWM_H
#define WM_PWM_H
#include "wm_type_def.h"
/** pwm channel's maximum number */
#define PWM_CHANNEL_MAX_NUM 5
/** pwm work mode for signal generate */
enum tls_pwm_out_mode
{
WM_PWM_OUT_MODE_BRAKE = 0, /**< brake mode */
WM_PWM_OUT_MODE_ALLSYC, /**< all synchronous mode */
WM_PWM_OUT_MODE_2SYC, /**< two channel synchronous mode */
WM_PWM_OUT_MODE_MC, /**< complementary mode */
WM_PWM_OUT_MODE_INDPT /**< independent mode */
};
/** interrupt type for capture mode */
enum tls_pwm_cap_int_type{
WM_PWM_CAP_RISING_EDGE_INT, /**< rising edge arises the interrupt */
WM_PWM_CAP_FALLING_EDGE_INT, /**< falling edge arises the interrupt */
WM_PWM_CAP_RISING_FALLING_EDGE_INT, /**< both rising edge and falling edge arise the interrupt */
WM_PWM_CAP_DMA_INT /**< dma request */
};
/** pwm output status */
enum tls_pwm_out_en_state{
WM_PWM_OUT_EN_STATE_TRI, /**< set tristate status */
WM_PWM_OUT_EN_STATE_OUT /**< set output status */
};
/** pwm count mode */
enum tls_pwm_cnt_type{
WM_PWM_CNT_TYPE_EDGE_ALLGN_CAP, /**< edge alignment(only capture mode) */
WM_PWM_CNT_TYPE_EDGE_ALIGN_OUT, /**< edge alignment(only output mode) */
WM_PWM_CNT_TYPE_CENTER_ALIGN /**< central alignment */
};
/** pwm cycle type */
enum tls_pwm_loop_type{
WM_PWM_LOOP_TYPE_SINGLE, /**< single mode */
WM_PWM_LOOP_TYPE_LOOP /**< auto load */
};
/** pwm waveform inversion mode */
enum tls_pwm_waveform_inversion{
WM_PWM_WAVEFORM_NOINVERSION, /**< not inverse */
WM_PWM_WAVEFORM_INVERSION /**< inversion */
};
/** pwm output level in the brake mode */
enum tls_pwm_brake_out_level{
WM_PWM_BRAKE_OUT_HIGH, /**< output high level */
WM_PWM_BRAKE_OUT_LOW /**< output low level */
};
/** pwm initial parameters */
typedef struct _pwm_init_param{
enum tls_pwm_out_mode mode; /**< work mode */
u8 channel; /**< channel id 0~4 */
u16 clkdiv; /**< clock divided value */
u8 period; /**< period value(output frequency F = CLK/CLK_DIV/PERIOD) */
u8 duty; /**< duty radio (range 0~255, high level or low level by out_inversion decided */
bool dten; /**< enable dead zone time (ENABLE or DISABLE) */
u8 dtclkdiv; /**< dead zone clock divided value (0~3) */
u8 dtcnt; /**< period number of dead zone time (0~255) */
enum tls_pwm_cnt_type cnt_type; /**< count type */
enum tls_pwm_loop_type loop_type; /**< cycle type */
bool inverse_en; /**< output is inverse */
u8 pnum; /**< generate interrupt after pnum period */
bool pnum_int; /**< period interrupt is enable */
}pwm_init_param;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup PWM_Driver_APIs PWM Driver APIs
* @brief PWM driver APIs
*/
/**
* @addtogroup PWM_Driver_APIs
* @{
*/
/**
* @brief This function is used to register the pwm interrupt callback function
*
* @param[in] callback the pwm interrupt callback function
*
* @return None
*
* @note None
*/
void tls_pwm_isr_register(void (*callback)(void));
/**
* @brief This function is used to set duty radio
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] duty Number of active levels
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_duty_config(u8 channel, u8 duty);
/**
* @brief This function is used to set frequency
*
* @param[in] channel pwm channel NO., range form 0 to 4
* @param[in] clkdiv clock divider, range 0 to 65535
* @param[in] period the number of the counting clock cycle
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_freq_config(u8 channel, u16 clkdiv, u8 period);
/**
* @brief This function is used to set the output mode
*
* @param[in] channel pwm channel NO., range form 0 to 4
* @param[in] mode pwm work mode for signal generate
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_out_mode_config(u8 channel, enum tls_pwm_out_mode mode);
/**
* @brief This function is used to set the counting mode
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] cnt_type counting mode
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_cnt_type_config(u8 channel, enum tls_pwm_cnt_type cnt_type);
/**
* @brief This function is used to set whether to loop
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] loop_mode whether to loop
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_loop_mode_config(u8 channel, enum tls_pwm_loop_type loop_mode);
/**
* @brief This function is used to set whether to inverse the output
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] en ENABLE or DISABLE
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_out_inverse_cmd(u8 channel, bool en);
/**
* @brief This function is used to set the number of period to be generated
*
* @param[in] channel pwm channel NO.,range form 0 to 4
* @param[in] pnum the number of period to be generated,range from 0 to 255
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_stoptime_by_period_config(u8 channel, u8 pnum);
/**
* @brief This function is used to set output enable
*
* @param[in] channel pwm channel NO.,channel 0 or channel 4
* @param[in] en ENABLE or DISABLE
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_output_en_cmd(u8 channel, bool en);
/**
* @brief This function is used to set the dead time
*
* @param[in] channel pwm channel NO.,channel 0 or channel 2
* @param[in] dten whether enalbe the dead time, ENABLE or DISABLE
* @param[in] dtclkdiv dead zone clock divider, range 0 to 3
* @param[in] dtcnt the number of the counting clock cycle, range 0 to 255
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_deadzone_config(u8 channel, bool dten, u8 dtclkdiv, u8 dtcnt);
/**
* @brief This function is used to set whether to inverse the capture input
*
* @param[in] channel pwm channel NO.,channel 0 or channel 4
* @param[in] en ENABLE or DISABLE
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_capture_inverse_cmd(u8 channel, bool en);
/**
* @brief This function is used to set break mode
*
* @param[in] channel pwm channel NO.,channel 0 or channel 4
* @param[in] en whether enable the break mode,ENABLE or DISABLE
* @param[in] brok when break
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_brake_mode_config(u8 channel, bool en, enum tls_pwm_brake_out_level brok);
/**
* @brief This function is used to enable the capture mode
*
* @param[in] channel pwm channel NO.,channel 0 or channel 4
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_capture_mode_config(u8 channel);
/**
* @brief This function is used to set the interrupt about the number of period
*
* @param[in] channel pwm channel,range from 0 to 4
* @param[in] en enble or disable
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_stoptime_irq_cmd(u8 channel, bool en);
/**
* @brief This function is used to set the interrupt about the capture
*
* @param[in] channel pwm channel,channel 0 or channel 4
* @param[in] int_type interrupt type
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_capture_irq_type_config(u8 channel, enum tls_pwm_cap_int_type int_type);
/**
* @brief This function is used to initial pwm(out mode)
*
* @param[in] pwm_param structure containing the initialization parameters
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_out_init(pwm_init_param pwm_param);
/**
* @brief This function is used to initial pwm(capture mode)
*
* @param[in] channel pwm channel, channel 0 or channel 4
* @param[in] clkdiv clock divider, range 0 to 65535
* @param[in] inverse_en whether the input signal is reversed
* @param[in] int_type interrupt type
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_cap_init(u8 channel, u16 clkdiv, bool inverse_en, enum tls_pwm_cap_int_type int_type);
/**
* @brief This function is used to start pwm
*
* @param[in] channel pwm channel, range from 0 to 4
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_start(u8 channel);
/**
* @brief This function is used to set pwm's frequency
*
* @param[in] channel pwm channel no, range form 0 to 4
* @param[in] freq frequency, range from 1 to 156250
*
* @return None
*
* @note None
*/
void tls_pwm_freq_set(u8 channel, u32 freq);
/**
* @brief This function is used to set duty radio
*
* @param[in] channel pwm channel NO., range form 0 to 4
* @param[in] duty duty radio, range from 0 to 255
*
* @return None
*
* @note None
*/
void tls_pwm_duty_set(u8 channel, u8 duty);
/**
* @brief This function is used to initial pwm
*
* @param[in] channel pwm channel, range from 0 to 4
* @param[in] freq is a pointer to frequency, freq range from 1 to 156250
* @param[in] duty is a pointer to duty radio, duty range from 0 to 255
* @param[in] pnum period num,range from 0 to 255
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_init(u8 channel,u32 freq, u8 duty, u8 pnum);
/**
* @brief This function is used to initial pwm
*
* @param[in] channel pwm channel, range from 0 to 4
* @param[in] freq freq range from 1 to 156250
* @param[in] duty duty range from 0 to 255
* @param[in] pnum period num,range from 0 to 255
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_ineverse_init(u8 channel,u32 freq, u8 duty, u8 pnum);
/**
* @brief This function is used to stop pwm
*
* @param[in] channel pwm channel, range from 0 to 4
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note None
*/
int tls_pwm_stop(u8 channel);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_PWM_H */
sdk/Include/Driver/wm_rtc.h
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/**
* @file wm_rtc.h
*
* @brief rtc Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_RTC_H
#define WM_RTC_H
#include <time.h>
#include "wm_type_def.h"
/** rtc interrupt callback */
typedef void (*tls_rtc_irq_callback)(void *arg);
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup RTC_Driver_APIs RTC Driver APIs
* @brief RTC driver APIs
*/
/**
* @addtogroup RTC_Driver_APIs
* @{
*/
/**
* @brief This function is used to set pmu rtc time
*
* @param[in] tblock time value
*
* @return None
*
* @note None
*/
void tls_set_rtc(struct tm *tblock);
/**
* @brief This function is used to get pmu rtc time
*
* @param[out] tblock time value
*
* @return None
*
* @note None
*/
void tls_get_rtc(struct tm *tblock);
/**
* @brief This function is used to register pmu rtc interrupt
*
* @param[in] callback the rtc interrupt call back function
* @param[in] arg parameter of call back function
*
* @return None
*
* @note
* User does not need to clear the interrupt flag.
* Rtc callback function is called in interrupt,
* so do not operate the critical data in the callback fuuction.
* Sending messages to other tasks to handle is recommended.
*/
void tls_rtc_isr_register(tls_rtc_irq_callback callback, void *arg);
/**
* @brief This function is used to start pmu rtc timer
*
* @param[in] tblock timer value
*
* @return None
*
* @note None
*/
void tls_rtc_timer_start(struct tm *tblock);
/**
* @brief This function is used to stop pmu rtc timer
*
* @param None
*
* @return None
*
* @note This function also is used to clear rtc timer interrupt
*/
void tls_rtc_timer_stop(void);
/**
* @}
*/
/**
* @}
*/
#endif
sdk/Include/Driver/wm_timer.h
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/**
* @file wm_timer.h
*
* @brief Timer Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_TIMER_H
#define WM_TIMER_H
/** invalid timer id */
#define WM_TIMER_ID_INVALID 0xFF
#define TIMER_MS_UNIT_FLAG 1
#define TIMER_US_UNIT_FLAG 0
/** timer interrupt callback */
typedef void (*tls_timer_irq_callback)(void *arg);
/** timer unit */
enum tls_timer_unit{
TLS_TIMER_UNIT_US = 0, /**< microsecond level(us) */
TLS_TIMER_UNIT_MS /**< millisecond level(ms) */
};
/** timer configuration */
struct tls_timer_cfg {
enum tls_timer_unit unit; /**< timer accuracy */
u32 timeout; /**< timeout period */
bool is_repeat; /**< cycle timer */
tls_timer_irq_callback callback; /**< timeout callback function */
void *arg; /**< parameter fot the timeout callback function */
};
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup TIMER_Driver_APIs TIMER Driver APIs
* @brief TIMER driver APIs
*/
/**
* @addtogroup TIMER_Driver_APIs
* @{
*/
/**
* @brief This function is used to create a timer
*
* @param[in] cfg timer configuration
*
* @retval WM_TIMER_ID_INVALID failed
* @retval other timer id
*
* @note
* User does not need to clear the interrupt flag.
* Rtc callback function is called in interrupt,
* so do not operate the critical data in the callback fuuction.
* Sending messages to other tasks to handle is recommended.
*/
u8 tls_timer_create(struct tls_timer_cfg *cfg);
/**
* @brief This function is used to start a timer
*
* @param[in] timer_id timer id
*
* @return None
*
* @note None
*/
void tls_timer_start(u8 timer_id);
/**
* @brief This function is used to stop a timer
*
* @param[in] timer_id timer id
*
* @return None
*
* @note None
*/
void tls_timer_stop(u8 timer_id);
/**
* @brief This function is used to change a timer wait time
*
* @param[in] timer_id timer id[0~5]
*
* @param[in] newtime new wait time
*
* @retval None
*
* @note If the timer does not start, this function will start the timer
*/
void tls_timer_change(u8 timer_id, u32 newtime);
/**
* @brief This function is used to delete a timer
*
* @param[in] timer_id timer id
*
* @return None
*
* @note None
*/
void tls_timer_destroy(u8 timer_id);
/**
* @brief This function is create a delay to elapse
*
* @param[timeout] timeout the value written into TMR0_PRD
* @param[in] m_flag millisecond flag in TIMER0
*
* @return 0
*
* @note None
*/
int tls_delay_via_timer(unsigned int timeout, unsigned int m_flag);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_TIMER_H */
sdk/Include/Driver/wm_uart.h
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/**
* @file wm_uart.h
*
* @brief uart Driver Module
*
* @author dave
*
* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_UART_H
#define WM_UART_H
#include "list.h"
//#include "wm_regs.h"
#include "wm_type_def.h"
#include "wm_osal.h"
#define TLS_UART_RX_BUF_SIZE 4096
#define TLS_UART_TX_BUF_SIZE 4096
#define WAKEUP_CHARS 256
#define MBOX_MSG_UART_RX 1
#define MBOX_MSG_UART_TX 2
/** baud rate definition */
#define UART_BAUDRATE_B600 600
#define UART_BAUDRATE_B1200 1200
#define UART_BAUDRATE_B1800 1800
#define UART_BAUDRATE_B2400 2400
#define UART_BAUDRATE_B4800 4800
#define UART_BAUDRATE_B9600 9600
#define UART_BAUDRATE_B19200 19200
#define UART_BAUDRATE_B38400 38400
#define UART_BAUDRATE_B57600 57600
#define UART_BAUDRATE_B115200 115200
#define UART_BAUDRATE_B230400 230400
#define UART_BAUDRATE_B460800 460800
#define UART_BAUDRATE_B921600 921600
#define UART_BAUDRATE_B1000000 1000000
#define UART_BAUDRATE_B1250000 1250000
#define UART_BAUDRATE_B1500000 1500000
#define UART_BAUDRATE_B2000000 2000000
#define UART_RX_INT_FLAG (UIS_RX_FIFO | UIS_RX_FIFO_TIMEOUT | UIS_BREAK |\
UIS_OVERRUN | UIS_FRM_ERR | UIS_PARITY_ERR)
#define UART_RX_ERR_INT_FLAG (UIS_BREAK | UIS_FRM_ERR | \
UIS_PARITY_ERR)
#define UART_TX_INT_FLAG (UIS_TX_FIFO | UIS_TX_FIFO_EMPTY)
#ifndef UART0_INT
#define UART0_INT (23UL)
#endif
#ifndef UART1_INT
#define UART1_INT (24UL)
#endif
/** return count in buffer. */
#define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1))
/** Return space available, 0..size-1. We always leave one free char
as a completely full buffer has head == tail, which is the same as
empty. */
#define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size))
/** Return count up to the end of the buffer. Carefully avoid
accessing head and tail more than once, so they can change
underneath us without returning inconsistent results. */
#define CIRC_CNT_TO_END(head,tail,size) \
({int end = (size) - (tail); \
int n = ((head) + end) & ((size)-1); \
n < end ? n : end;})
/** Return space available up to the end of the buffer. */
#define CIRC_SPACE_TO_END(head,tail,size) \
({int end = (size) - 1 - (head); \
int n = (end + (tail)) & ((size)-1); \
n <= end ? n : end+1;})
#define CIRC_SPACE_TO_END_FULL(head,tail,size) \
({int end = (size) - 1 - (head); \
int n = (end + (tail)) & ((size)-1); \
n < end ? n : end+1;})
#define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
#define uart_circ_chars_pending(circ) \
(CIRC_CNT((circ)->head, (circ)->tail, TLS_UART_TX_BUF_SIZE))
/**
* @struct tls_uart_baud_rate baudrate define
*/
struct tls_uart_baud_rate
{
u32 baud_rate;
u16 ubdiv;
u16 ubdiv_frac;
};
/**
* @enum uart number enum
*/
enum
{
TLS_UART_0 = 0,
TLS_UART_1 = 1,
TLS_UART_2 = 2,
};
/**
* @typedef enum TLS_UART_PMODE Parity Mode
*/
typedef enum TLS_UART_PMODE
{
TLS_UART_PMODE_DISABLED = 0, /**< No Parity */
TLS_UART_PMODE_ODD = 1, /**< Odd Parity */
TLS_UART_PMODE_EVEN = 2, /**< Even Parity */
TLS_UART_PMODE_MARK = 3, /**< The parity bit is always 1. */
TLS_UART_PMODE_SPACE = 4, /**< The parity bit is always 0. */
} TLS_UART_PMODE_T;
/**
* @typedef enum TLS_UART_CHSIZE Character Size
*/
typedef enum TLS_UART_CHSIZE
{
TLS_UART_CHSIZE_5BIT = (0x00 << 0), /**< Character size: 5 bit */
TLS_UART_CHSIZE_6BIT = (0x01 << 0), /**< Character size: 6 bit */
TLS_UART_CHSIZE_7BIT = (0x02 << 0), /**< Character size: 7 bit */
TLS_UART_CHSIZE_8BIT = (0x03 << 0), /**< Character size: 8 bit */
} TLS_UART_CHSIZE_T;
/**
* @typedef enum TLS_UART_FLOW_CTRL_MODE flow control mode
*/
typedef enum TLS_UART_FLOW_CTRL_MODE
{
TLS_UART_FLOW_CTRL_NONE,
TLS_UART_FLOW_CTRL_HARDWARE,
} TLS_UART_FLOW_CTRL_MODE_T;
/**
* @typedef enum TLS_UART_RX_FLOW_CTRL_FLAG flow control rx flag
*/
typedef enum TLS_UART_RX_FLOW_CTRL_FLAG
{
TLS_UART_RX_DISABLE,
TLS_UART_RX_ENABLE,
} TLS_UART_RX_FLOW_CTRL_FLAG_T;
/**
* @typedef enum TLS_UART_STOPBITS
*/
typedef enum TLS_UART_STOPBITS
{
TLS_UART_ONE_STOPBITS,
TLS_UART_TWO_STOPBITS,
} TLS_UART_STOPBITS_T;
/**
* @typedef enum TLS_UART_STATUS
*/
typedef enum TLS_UART_STATUS
{
TLS_UART_STATUS_OK,
TLS_UART_STATUS_ERROR,
} TLS_UART_STATUS_T;
/**
* @typedef enum TLS_UART_MODE operation mode
*/
typedef enum TLS_UART_MODE
{
TLS_UART_MODE_POLL, /**< uart operation mode: poll */
TLS_UART_MODE_INT, /**< uart operation mode: interrupt mode */
} TLS_UART_MODE_T;
/**
* @struct tls_uart_icount
*/
struct tls_uart_icount
{
u32 cts;
u32 dsr;
u32 rng;
u32 dcd;
u32 rx;
u32 tx;
u32 frame;
u32 overrun;
u32 parity;
u32 brk;
u32 buf_overrun;
};
/**
* @typedef struct tls_uart_options
*/
typedef struct tls_uart_options
{
u32 baudrate; /**< Set baud rate of the UART */
TLS_UART_CHSIZE_T charlength; /**< Number of bits to transmit as a character (5 to 8). */
TLS_UART_PMODE_T paritytype; /**< Parity type */
TLS_UART_FLOW_CTRL_MODE_T flow_ctrl; /**< Flow control type */
TLS_UART_STOPBITS_T stopbits; /**< Number of stop bits */
} tls_uart_options_t;
/**
* @typedef struct tls_uart_circ_buf
*/
typedef struct tls_uart_circ_buf
{
u8 *buf;
u32 head;
u32 tail;
} tls_uart_circ_buf_t;
/**
* @typedef struct TLS_UART_REGS
*/
typedef struct TLS_UART_REGS
{
u32 UR_LC; /**< line control register */
u32 UR_FC; /**< flow control register */
u32 UR_DMAC; /**< dma control register */
u32 UR_FIFOC; /**< fifo control register */
u32 UR_BD; /**< baud rate register */
u32 UR_INTM; /**< interrupt mask register */
u32 UR_INTS; /**< interrupt source register */
u32 UR_FIFOS; /**< fifo status register */
u32 UR_TXW; /**< tx windows register */
u32 UR_RES0;
u32 UR_RES1;
u32 UR_RES2;
u32 UR_RXW; /**< rx windows register */
} TLS_UART_REGS_T;
/**
* @typedef struct tls_uart_port
*/
typedef struct tls_uart_port
{
u32 uart_no; /**< uart number: 0 or 1 */
u32 uart_irq_no; /**< uart interrupt number */
u32 plus_char_cnt;
TLS_UART_MODE_T uart_mode; /**< uart work mode: interrupt mode or poll mode */
struct tls_uart_options opts; /**< uart config parameters */
int fcStatus; /**< flow ctrl status,0 closed ,1 opened */
enum TLS_UART_RX_FLOW_CTRL_FLAG rxstatus;
u32 tx_fifofull; /**< uart tx fifo trigger level */
TLS_UART_REGS_T volatile *regs; /**< uart registers struct pointer */
struct tls_uart_icount icount; /**< uart statistics information */
struct tls_uart_circ_buf recv; /**< uart ring buffer */
// struct tls_uart_circ_buf xmit;
struct dl_list tx_msg_pending_list;
struct dl_list tx_msg_to_be_freed_list;
u8 hw_stopped;
tls_os_sem_t *tx_sem;
char *buf_ptr;
u16 buf_len;
s16(*rx_callback) (u16 len);
s16(*tx_callback) (struct tls_uart_port * port);
bool tx_dma_on;
} tls_uart_port_t;
/**
* @typedef struct tls_uart_tx_msg
*/
typedef struct tls_uart_tx_msg
{
struct dl_list list;
char *buf;
u16 buflen;
u16 offset;
void (*finish_callback) (void *arg);
void *callback_arg;
} tls_uart_tx_msg_t;
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup UART_Driver_APIs UART Driver APIs
* @brief UART driver APIs
*/
/**
* @addtogroup UART_Driver_APIs
* @{
*/
/**
* @brief This function is used to initial uart port.
*
* @param[in] uart_no is the uart number. TLS_UART_0 or TLS_UART_1
* @param[in] opts is the uart setting options,if this param is NULL,this function will use the default options.
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note When the system is initialized, the function has been called, so users can not call the function.
*/
int tls_uart_port_init(u16 uart_no, tls_uart_options_t * opts, u8 modeChoose);
/**
* @brief This function is used to register uart rx interrupt.
*
* @param[in] uart_no TLS_UART_0 or TLS_UART_1
* @param[in] rx_callback is the uart rx interrupt call back function.
*
* @return None
*
* @note None
*/
void tls_uart_rx_callback_register(u16 uart_no, s16(*rx_callback) (u16 len));
/**
* @brief This function is used to copy circular buffer data to user buffer.
*
* @param[in] uart_no is the uart numer
* @param[in] buf is the user buffer
* @param[in] readsize is the user read size
*
* @retval copy data size
*
* @note None
*/
int tls_uart_read(u16 uart_no, u8 * buf, u16 readsize);
/**
* @brief This function is used to transfer data synchronously.
*
* @param[in] uart_no is the uart number
* @param[in] buf is a buf for saving user data
* @param[in] writesize is the user data length
*
* @retval WM_SUCCESS tx success
* @retval WM_FAILED tx failed
*
* @note None
*/
int tls_uart_write(u16 uart_no, char *buf, u16 writesize);
/**
* @brief This function is used to transfer data with DMA.
*
* @param[in] buf is a buf for saving user data
* @param[in] writesize is the user data length
* @param[in] cmpl_callback function point,when the transfer is completed, the function will be called.
* @param[in] uart_no is the uart number
*
* @retval WM_SUCCESS success
* @retval WM_FAILED failed
*
* @note Only uart1 support DMA transfer.
*/
int tls_uart_dma_write(char *buf, u16 writesize, void (*cmpl_callback) (void *p), u16 uart_no);
/**
* @brief This function is used to set uart parity.
*
* @param[in] uart_no is the uart number
* @param[in] paritytype is a parity type defined in TLS_UART_PMODE_T
*
* @retval WM_SUCCESS if setting success
* @retval WM_FAILED if setting fail
*
* @note None
*/
int tls_uart_set_parity(u16 uart_no, TLS_UART_PMODE_T paritytype);
/**
* @brief This function is used to set uart baudrate.
*
* @param[in] uart_no is the uart number
* @param[in] baudrate is the baudrate user want used,the unit is HZ.
*
* @retval WM_SUCCESS if setting success
* @retval WM_FAILED if setting fail
*
* @note None
*/
int tls_uart_set_baud_rate(u16 uart_no, u32 baudrate);
/**
* @brief This function is used to set uart stop bits.
*
* @param[in] uart_no is the uart number
* @param[in] stopbits is a stop bit type defined in TLS_UART_STOPBITS_T
*
* @retval WM_SUCCESS if setting success
* @retval WM_FAILED if setting fail
*
* @note None
*/
int tls_uart_set_stop_bits(u16 uart_no, TLS_UART_STOPBITS_T stopbits);
/**
* @brief This function is used to output a character to the serial port.
*
* @param[in] ch character to be output
*
* @retval ch
*
* @note None
*/
int tls_uart_output_char(int ch);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_UART_H */
sdk/Include/Driver/wm_watchdog.h
+99
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/**
* @file wm_watchdog.h
*
* @brief watchdog Driver Module
*
* @author dave
*
* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
*/
#ifndef WM_WATCHDOG_H
#define WM_WATCHDOG_H
/**
* @defgroup Driver_APIs Driver APIs
* @brief Driver APIs
*/
/**
* @addtogroup Driver_APIs
* @{
*/
/**
* @defgroup WDG_Driver_APIs WDG Driver APIs
* @brief WDG driver APIs
*/
/**
* @addtogroup WDG_Driver_APIs
* @{
*/
/**
* @brief This function is used to clear watchdog irq in case watchdog reset.
*
* @param None
*
* @return None
*
* @note None
*/
void tls_watchdog_clr(void);
/**
* @brief This function is used to init and start the watchdog.
*
* @param[in] usec microseconds
*
* @return None
*
* @note None
*/
void tls_watchdog_init(u32 usec);
/**
* @brief This function is used to start calculating elapsed time.
*
* @param[in] None
*
* @return elapsed time, unit:millisecond
*
* @note None
*/
void tls_watchdog_start_cal_elapsed_time(void);
/**
* @brief This function is used to stop calculating & return elapsed time.
*
* @param[in] none
*
* @return elapsed time, unit:millisecond
*
* @note None
*/
u32 tls_watchdog_stop_cal_elapsed_time(void);
/**
* @brief This function is used to reset the system.
*
* @param None
*
* @return None
*
* @note None
*/
void tls_sys_reset(void);
/**
* @}
*/
/**
* @}
*/
#endif /* WM_WATCHDOG_H */