Michael Sauer
1b0501179d
Docker-Build mit gcc-arm-none-eabi 4.9-2014q4 (statt Homebrew-Cask) verwendet, Dockerfile/tools/docker.sh dafür aus Task 13 vorgezogen. cmake/sdk.cmake schont gcc 4.9 (kennt -fcommon/-Wno-error=... nicht). Zwei zusätzliche SDK-Stubs (EarlyInit, pre_gpio_config) in src/sys/sdk_stubs.c ergänzt, siehe sdk/PATCHES.md.
494 lines
14 KiB
C
494 lines
14 KiB
C
/**
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* @file wm_hspi.c
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*
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* @brief High speed spi slave Module
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*
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* @author dave
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*
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* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "wm_hspi.h"
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#include "wm_regs.h"
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#include "wm_config.h"
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#include "wm_mem.h"
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#include "wm_osal.h"
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#include "wm_irq.h"
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#include "lwip/mem.h"
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#include "wm_io.h"
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#if TLS_CONFIG_HS_SPI
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struct tls_slave_hspi g_slave_hspi;
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#define SET_BIT(x) (1UL << (x))
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void hspi_free_rxdesc(struct tls_hspi_rx_desc *rx_desc);
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void hspi_rx_init(struct tls_slave_hspi *hspi)
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{
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struct tls_hspi_rx_desc *hspi_rx_desc;
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int i;
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/* set current availble rx desc pointer */
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hspi_rx_desc = (struct tls_hspi_rx_desc *) HSPI_RX_DESC_BASE_ADDR;
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hspi->curr_rx_desc = hspi_rx_desc;
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/* initialize rx descriptor content */
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for (i = 0; i < HSPI_RX_DESC_NUM; i++)
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{
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/* initialize tx descriptors */
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if (i < HSPI_RXBUF_NUM)
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{
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hspi_rx_desc->valid_ctrl = SET_BIT(31);
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hspi_rx_desc->buf_addr = HSPI_RXBUF_BASE_ADDR + i * HSPI_RXBUF_SIZE;
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}
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else
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{
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/* indicate this descriptor is can't use by hspi */
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hspi_rx_desc->valid_ctrl = 0;
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/* point to null */
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hspi_rx_desc->buf_addr = 0x0;
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}
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if (i == (HSPI_RX_DESC_NUM - 1))
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{
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hspi_rx_desc->next_desc_addr = (u32) HSPI_RX_DESC_BASE_ADDR;
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}
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else
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{
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hspi_rx_desc->next_desc_addr = (u32) (hspi_rx_desc + 1);
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}
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hspi_rx_desc++;
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}
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}
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void hspi_tx_init(struct tls_slave_hspi *hspi)
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{
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struct tls_hspi_tx_desc *hspi_tx_desc;
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int i;
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hspi_tx_desc = (struct tls_hspi_tx_desc *) HSPI_TX_DESC_BASE_ADDR;
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hspi->curr_tx_desc = hspi_tx_desc;
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for (i = 0; i < HSPI_TX_DESC_NUM; i++)
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{
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hspi_tx_desc->valid_ctrl = 0;
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hspi_tx_desc->buf_info = 0;
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#if HSPI_TX_MEM_MALLOC
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hspi_tx_desc->txbuf_addr = NULL;
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hspi_tx_desc->buf_addr[0] = 0;
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#else
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hspi_tx_desc->buf_addr[0] = HSPI_TXBUF_BASE_ADDR + i * HSPI_TXBUF_SIZE;
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#endif
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hspi_tx_desc->buf_addr[1] = 0;
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hspi_tx_desc->buf_addr[2] = 0;
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if (i == (HSPI_TX_DESC_NUM - 1))
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{
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hspi_tx_desc->next_desc_addr = (u32) HSPI_TX_DESC_BASE_ADDR;
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}
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else
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{
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hspi_tx_desc->next_desc_addr = (u32) (hspi_tx_desc + 1);
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}
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hspi_tx_desc++;
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}
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}
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static int slave_spi_rx_data(struct tls_slave_hspi *hspi)
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{
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struct tls_hspi_rx_desc *rx_desc;
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/* get rx descriptor */
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rx_desc = hspi->curr_rx_desc;
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while (!(rx_desc->valid_ctrl & SET_BIT(31)))
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{
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if (hspi->rx_data_callback)
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hspi->rx_data_callback((char *) rx_desc->buf_addr);
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hspi_free_rxdesc(rx_desc);
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rx_desc = (struct tls_hspi_rx_desc *) rx_desc->next_desc_addr;
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hspi->curr_rx_desc = rx_desc;
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}
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return 0;
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}
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void SDIO_RX_IRQHandler(void)
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{
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struct tls_slave_hspi *hspi = (struct tls_slave_hspi *) &g_slave_hspi;
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#if HSPI_TX_MEM_MALLOC
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hspi->txdoneflag = 1;
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#endif
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if (hspi->tx_data_callback)
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hspi->tx_data_callback((char *) hspi->curr_tx_desc->buf_addr);
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/* clear interrupt */
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tls_reg_write32(HR_SDIO_INT_SRC, SDIO_WP_INT_SRC_DATA_UP);
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}
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void SDIO_TX_IRQHandler(void)
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{
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struct tls_slave_hspi *hspi = (struct tls_slave_hspi *) &g_slave_hspi;
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//用户模式下，直接给出数据，链表的操作不对外开放，避免造成链表操作错误
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if (hspi->ifusermode)
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{
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slave_spi_rx_data(hspi);
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}
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else
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{
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if (hspi->rx_data_callback)
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hspi->rx_data_callback((char *) hspi->curr_rx_desc->buf_addr);
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}
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/* clear interrupt */
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tls_reg_write32(HR_SDIO_INT_SRC, SDIO_WP_INT_SRC_DATA_DOWN);
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}
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void SDIO_TX_CMD_IRQHandler(void)
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{
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struct tls_slave_hspi *hspi = (struct tls_slave_hspi *) &g_slave_hspi;
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if (hspi->rx_cmd_callback)
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hspi->rx_cmd_callback((char *) SDIO_CMD_RXBUF_ADDR);
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if (hspi->ifusermode) // 用户模式下，数据给出去之后，寄存器由驱动自己操作
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{
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tls_reg_write32(HR_SDIO_DOWNCMDVALID, 0x1);
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}
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/* clear interrupt */
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tls_reg_write32(HR_SDIO_INT_SRC, SDIO_WP_INT_SRC_CMD_DOWN);
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}
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void SPI_HS_IRQHandler(void)
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{
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printf("spi HS irqhandle\n");
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}
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void hspi_free_rxdesc(struct tls_hspi_rx_desc *rx_desc)
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{
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rx_desc->valid_ctrl = SET_BIT(31);
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/* 设置hspi/sdio tx enable寄存器，让sdio硬件知道有可用的tx descriptor */
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tls_reg_write32(HR_SDIO_TXEN, SET_BIT(0));
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}
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void hspi_regs_cfg(void)
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{
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tls_reg_write32(HR_HSPI_CLEAR_FIFO, 0x1); /* Clear data up&down interrput
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*/
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tls_reg_write32(HR_HSPI_SPI_CFG, 0); /* CPOL=0, CPHA=0, Small-Endian */
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tls_reg_write32(HR_HSPI_MODE_CFG, 0x0);
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tls_reg_write32(HR_HSPI_INT_MASK, 0x03);
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tls_reg_write32(HR_HSPI_INT_STTS, 0x03);
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}
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void sdio_init_cis(void)
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{
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tls_reg_write32(FN0_TPL_FUNCID, 0x000C0221);
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tls_reg_write32(FN0_TPL_FUNCE, 0x00000422);
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tls_reg_write32(FN0_TPL_FUNCE_MAXBLK, 0x04203208);
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tls_reg_write32(FN0_TPL_MANFID_MID, 0x53470296);
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tls_reg_write32(FN0_TPL_END, 0x000000ff);
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tls_reg_write32(FN1_TPL_FUNCID, 0x000C0221);
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tls_reg_write32(FN1_TPL_FUNCE, 0x01012a22);
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tls_reg_write32(FN1_TPL_FUNCE_VER, 0x00000011);
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tls_reg_write32(FN1_TPL_FUNCE_NSN, 0x02000000);
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tls_reg_write32(FN1_TPL_FUNCE_CSASIZE, 0x08000300);
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tls_reg_write32(FN1_TPL_FUNCE_OCR, 0x00FF8000);
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tls_reg_write32(FN1_TPL_FUNCE_MINPWR, 0x010f0a08);
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tls_reg_write32(FN1_TPL_FUNCE_STANDBY, 0x00000101);
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tls_reg_write32(FN1_TPL_FUNCE_OPTBW, 0x00000000);
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tls_reg_write32(FN1_TPL_FUNCE_NTIMEOUT, 0x00000000);
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tls_reg_write32(FN1_TPL_FUNCE_AVGPWR, 0x00000000);
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tls_reg_write32(FN1_TPL_FUNCE_AVGPWR + 4, 0x00000000);
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tls_reg_write32(FN1_TPL_END, 0x000000ff);
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}
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void hsdio_regs_cfg(void)
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{
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u32 v;
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sdio_init_cis();
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tls_reg_write32(HR_SDIO_CIS0, SDIO_CIS0_ADDR - 0x1000);
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tls_reg_write32(HR_SDIO_CIS1, SDIO_CIS1_ADDR - 0x2000);
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v = tls_reg_read32(HR_SDIO_CIA);
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tls_reg_write32(HR_SDIO_CIA, (v & 0xFFFFF000) | 0x232);
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/* set sdio ready */
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tls_reg_write32(HR_SDIO_PROG, 0x02FD);
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}
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/**
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* @brief This function is used to initial HSPI register.
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*
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* @param[in] None
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*
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* @retval 0 success
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* @retval other failed
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*
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* @note When the system is initialized, the function has been called, so users can not call the function.
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*/
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int tls_slave_spi_init(void)
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{
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struct tls_slave_hspi *hspi;
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hspi = &g_slave_hspi;
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memset(hspi, 0, sizeof(struct tls_slave_hspi));
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hspi_rx_init(hspi);
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hspi_tx_init(hspi);
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// tls_set_high_speed_interface_type(HSPI_INTERFACE_SPI);
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/* regiseter hspi tx rx cmd interrupt handler */
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/* setting hw interrupt module isr enable regiset */
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tls_irq_enable(SDIO_TX_DATA_INT);
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tls_irq_enable(SDIO_RX_DATA_INT);
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tls_irq_enable(SDIO_TX_CMD_INT);
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tls_irq_enable(SPI1_INT);
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/********************************************
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* setting hspi wrapper registers
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*********************************************/
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/* hspi data down(rx) */
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tls_reg_write32(HR_SDIO_TXBD_ADDR, HSPI_RX_DESC_BASE_ADDR);
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tls_reg_write32(HR_SDIO_TXBD_LINKEN, 1);
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tls_reg_write32(HR_SDIO_TXEN, 1);
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/* hspi data up (tx) */
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tls_reg_write32(HR_SDIO_RXBD_ADDR, HSPI_TX_DESC_BASE_ADDR);
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tls_reg_write32(HR_SDIO_RXBD_LINKEN, 1);
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/* hspi cmd down */
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tls_reg_write32(HR_SDIO_CMD_ADDR, SDIO_CMD_RXBUF_ADDR);
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tls_reg_write32(HR_SDIO_CMD_SIZE, SDIO_CMD_RXBUF_SIZE);
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tls_reg_write32(HR_SDIO_DOWNCMDVALID, 0x1);
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/* enable sdio module register */
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tls_reg_write32(HR_SDIO_INT_MASK, 0x00);
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return 0;
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}
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/**
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* @brief This function is used to set high speed interface type.
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*
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* @param[in] type is the interface type. HSPI_INTERFACE_SPI or HSPI_INTERFACE_SDIO
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*
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* @return None
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*
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* @note None
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*/
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void tls_set_high_speed_interface_type(int type)
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{
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if (HSPI_INTERFACE_SPI == type)
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{
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#if 0
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#if (HSPI_IO_REUSE_NUM == 0)
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tls_io_cfg_set(WM_IO_PB_14, WM_IO_OPTION1);
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tls_io_cfg_set(WM_IO_PB_15, WM_IO_OPTION1);
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tls_io_cfg_set(WM_IO_PB_16, WM_IO_OPTION1);
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tls_io_cfg_set(WM_IO_PB_17, WM_IO_OPTION1);
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tls_io_cfg_set(WM_IO_PB_18, WM_IO_OPTION1);
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#else
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if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_14))
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tls_io_cfg_set(WM_IO_PB_14, WM_IO_OPTION5);
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if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_15))
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tls_io_cfg_set(WM_IO_PB_15, WM_IO_OPTION5);
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if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_16))
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tls_io_cfg_set(WM_IO_PB_16, WM_IO_OPTION5);
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if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_17))
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tls_io_cfg_set(WM_IO_PB_17, WM_IO_OPTION5);
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if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_18))
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tls_io_cfg_set(WM_IO_PB_18, WM_IO_OPTION5);
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tls_io_cfg_set(WM_IO_PB_08, WM_IO_OPTION2);
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tls_io_cfg_set(WM_IO_PB_09, WM_IO_OPTION2);
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tls_io_cfg_set(WM_IO_PB_10, WM_IO_OPTION2);
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tls_io_cfg_set(WM_IO_PB_11, WM_IO_OPTION2);
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tls_io_cfg_set(WM_IO_PB_12, WM_IO_OPTION2);
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#endif
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#endif
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hspi_regs_cfg();
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}
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else if (HSPI_INTERFACE_SDIO == type)
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{
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#if 0
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if(WM_IO_OPTION1 == tls_io_cfg_get(WM_IO_PB_16)) //HSPI_CK,as sdio need close
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tls_io_cfg_set(WM_IO_PB_16, WM_IO_OPTION5);
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if(WM_IO_OPTION2 == tls_io_cfg_get(WM_IO_PB_08)) //HSPI_CK,as sdio need close
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tls_io_cfg_set(WM_IO_PB_08, WM_IO_OPTION5);
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tls_io_cfg_set(WM_IO_PB_08, WM_IO_OPTION3);
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tls_io_cfg_set(WM_IO_PB_09, WM_IO_OPTION3);
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tls_io_cfg_set(WM_IO_PB_10, WM_IO_OPTION3);
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tls_io_cfg_set(WM_IO_PB_11, WM_IO_OPTION3);
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tls_io_cfg_set(WM_IO_PB_12, WM_IO_OPTION3);
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#if (SDIO_IO_REUSE_NUM == 0)
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tls_io_cfg_set(WM_IO_PA_06, WM_IO_OPTION3);
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#elif (SDIO_IO_REUSE_NUM == 1)
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tls_io_cfg_set(WM_IO_PB_07, WM_IO_OPTION3);
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#else
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tls_io_cfg_set(WM_IO_PB_13, WM_IO_OPTION4);
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#endif
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#endif
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hsdio_regs_cfg();
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}
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}
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/**
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* @brief This function is used to enable or disable user mode.
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*
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* @param[in] ifenable TRUE or FALSE
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*
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* @return None
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*
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* @note If the user enables the user mode, RICM instruction in the system will not be used by SPI.
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* If the user wants to use the SPI interface as other use, need to enable the user mode.
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* This function must be called before the register function.
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*/
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void tls_set_hspi_user_mode(u8 ifenable)
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{
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struct tls_slave_hspi *hspi = &g_slave_hspi;
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hspi->ifusermode = ifenable;
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if (ifenable)
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{
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hspi->rx_cmd_callback = NULL;
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hspi->rx_data_callback = NULL;
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hspi->tx_data_callback = NULL;
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}
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}
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/**
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* @brief This function is used to register hspi rx command interrupt.
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*
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* @param[in] rx_cmd_callback is the hspi rx interrupt call back function.
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*
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* @return None
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*
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* @note None
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*/
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void tls_hspi_rx_cmd_callback_register(s16(*rx_cmd_callback) (char *buf))
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{
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g_slave_hspi.rx_cmd_callback = rx_cmd_callback;
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}
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/**
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* @brief This function is used to register hspi rx data interrupt.
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*
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* @param[in] rx_data_callback is the hspi rx interrupt call back function.
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*
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* @return None
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*
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* @note None
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*/
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void tls_hspi_rx_data_callback_register(s16(*rx_data_callback) (char *buf))
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{
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g_slave_hspi.rx_data_callback = rx_data_callback;
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}
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/**
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* @brief This function is used to register hspi tx data interrupt.
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*
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* @param[in] tx_data_callback is the hspi tx interrupt call back function.
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*
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* @return None
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*
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* @note None
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*/
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void tls_hspi_tx_data_callback_register(s16(*tx_data_callback) (char *buf))
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{
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g_slave_hspi.tx_data_callback = tx_data_callback;
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}
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/**
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* @brief This function is used to transfer data.
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*
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* @param[in] txbuf is a buf for saving user data.
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* @param[in] len is the data length.
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*
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* @retval transfer data len success
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* @retval 0 failed
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*
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* @note None
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*/
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int tls_hspi_tx_data(char *txbuf, int len)
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{
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struct tls_hspi_tx_desc *tx_desc;
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int totallen = len;
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int txlen;
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if (NULL == txbuf || len <= 0 || len > (HSPI_TXBUF_SIZE * HSPI_TX_DESC_NUM))
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{
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printf("\nhspi tx param error\n");
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return 0;
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}
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tx_desc = g_slave_hspi.curr_tx_desc;
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while (1)
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{
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// printf("---\n");
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if ((tx_desc->valid_ctrl & SET_BIT(31)) == 0)
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break;
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tls_os_time_delay(1);
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}
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while (!(tx_desc->valid_ctrl & SET_BIT(31)))
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{
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|
txlen = (totallen > HSPI_TXBUF_SIZE) ? HSPI_TXBUF_SIZE : totallen;
|
|
#if HSPI_TX_MEM_MALLOC
|
|
if (tx_desc->txbuf_addr != NULL)
|
|
{
|
|
printf("\nhspi txbuf not null,error %x\n", tx_desc->txbuf_addr);
|
|
if (tx_desc->txbuf_addr == tx_desc->buf_addr[0])
|
|
{
|
|
mem_free((void *) tx_desc->txbuf_addr);
|
|
tx_desc->txbuf_addr = NULL;
|
|
}
|
|
else // 不应该出现
|
|
{
|
|
printf("\nhspi tx mem error\n");
|
|
break;
|
|
}
|
|
}
|
|
|
|
tx_desc->txbuf_addr = (u32) mem_malloc(txlen + 1);
|
|
if (NULL == tx_desc->txbuf_addr)
|
|
{
|
|
printf("\nhspi tx data malloc error\n");
|
|
break;
|
|
}
|
|
tx_desc->buf_addr[0] = tx_desc->txbuf_addr;
|
|
#endif
|
|
MEMCPY((char *) tx_desc->buf_addr[0], txbuf, txlen);
|
|
tx_desc->buf_info = txlen << 12;
|
|
tx_desc->valid_ctrl = SET_BIT(31);
|
|
tls_reg_write32(HR_SDIO_RXEN, 0x01);
|
|
tx_desc = (struct tls_hspi_tx_desc *) tx_desc->next_desc_addr;
|
|
g_slave_hspi.curr_tx_desc = tx_desc;
|
|
totallen -= txlen;
|
|
if (totallen <= 0)
|
|
break;
|
|
}
|
|
|
|
return (len - totallen);
|
|
}
|
|
|
|
#endif
|
|
|
|
|