Michael Sauer
1b0501179d
Docker-Build mit gcc-arm-none-eabi 4.9-2014q4 (statt Homebrew-Cask) verwendet, Dockerfile/tools/docker.sh dafür aus Task 13 vorgezogen. cmake/sdk.cmake schont gcc 4.9 (kennt -fcommon/-Wno-error=... nicht). Zwei zusätzliche SDK-Stubs (EarlyInit, pre_gpio_config) in src/sys/sdk_stubs.c ergänzt, siehe sdk/PATCHES.md.
150 lines
3.3 KiB
C
150 lines
3.3 KiB
C
/**
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* @file wm_irq.c
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*
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* @brief interupt driver module
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*
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* @author dave
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*
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* Copyright (c) 2015 Winner Microelectronics Co., Ltd.
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*/
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#include <stdio.h>
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#include "wm_regs.h"
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#include "wm_irq.h"
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#include "wm_config.h"
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#include "wm_mem.h"
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void tls_irq_handler_dummy(void *data)
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{
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}
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tls_irq_handler_t *intr_handler_vect[INTR_CNT];
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u8 intr_counter;
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/**
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* @brief This function is used to initial system interrupt.
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*
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* @param[in] None
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*
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* @return None
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*
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* @note None
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*/
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void tls_irq_init(void)
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{
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#if 0
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int i;
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for (i = 0; i < INTR_CNT; i++)
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{
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intr_handler_vect[i].handler = tls_irq_handler_dummy;
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intr_handler_vect[i].data = NULL;
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intr_handler_vect[i].name = "intr_dummy";
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intr_handler_vect[i].counter = 0;
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}
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#endif
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intr_counter = 0;
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/* initailize VIC */
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tls_reg_write32(HR_VIC_INT_SELECT, 0);
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tls_reg_write32(HR_VIC_VECT_ENABLE, 0); /* disable vector interrupt */
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tls_reg_write32(HR_VIC_INT_EN_CLR, 0xFFFFFFFF);
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}
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/**
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* @brief This function is used to register interrupt.
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*
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* @param[in] vec_no interrupt no
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* @param[in] handler
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* @param[in] *data
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*
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* @return None
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*
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* @note None
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*/
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void tls_irq_register_handler(u8 vec_no, intr_handler_func handler, void *data)
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{
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// ASSERT (vec_no >= 0 && vec_no <= 0x1f);
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if (NULL == intr_handler_vect[vec_no])
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{
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intr_handler_vect[vec_no] = tls_mem_alloc(sizeof(tls_irq_handler_t));
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}
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if (intr_handler_vect[vec_no])
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{
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intr_handler_vect[vec_no]->handler = handler;
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intr_handler_vect[vec_no]->data = data;
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// intr_handler_vect[vec_no].name = NULL;
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intr_handler_vect[vec_no]->counter = 0;
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}
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}
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extern void NVIC_Configration(int irqno, FunctionalState irqstatus);
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/**
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* @brief This function is used to enable interrupt.
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*
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* @param[in] vec_no interrupt no
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*
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* @return None
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*
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* @note None
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*/
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void tls_irq_enable(u8 vec_no)
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{
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NVIC_ClearPendingIRQ((IRQn_Type)vec_no);
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NVIC_Configration(vec_no, ENABLE);
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}
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/**
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* @brief This function is used to disable interrupt.
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*
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* @param[in] vec_no interrupt no
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*
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* @return None
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*
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* @note None
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*/
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void tls_irq_disable(u8 vec_no)
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{
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NVIC_Configration(vec_no, DISABLE);
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NVIC_ClearPendingIRQ((IRQn_Type)vec_no);
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}
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/**
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* @brief This function is used to set interrupt priority.
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*
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* @param[in] vec_no interrupt no
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* @param[in] priority priority
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*
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* @return None
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*
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* @note None
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*/
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void tls_irq_set_priority(u8 vec_no, u8 priority)
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{
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NVIC_SetPriority(vec_no, priority);
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}
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void OS_CPU_IRQ_ISR_Handler(void)
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{
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u32 irq_status = tls_reg_read32(HR_VIC_IRQ_STATUS);
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int i = 0;
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intr_counter++;
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for (i = 0; i < INTR_CNT; i++)
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{
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if (irq_status & (1UL << i))
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{
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intr_handler_vect[i]->handler((void *) intr_handler_vect[i]->data);
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intr_handler_vect[i]->counter++;
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}
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}
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intr_counter--;
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/* clear interrupt */
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tls_reg_write32(HR_VIC_VECT_ADDR, 0);
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}
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