Michael Sauer
1b0501179d
Docker-Build mit gcc-arm-none-eabi 4.9-2014q4 (statt Homebrew-Cask) verwendet, Dockerfile/tools/docker.sh dafür aus Task 13 vorgezogen. cmake/sdk.cmake schont gcc 4.9 (kennt -fcommon/-Wno-error=... nicht). Zwei zusätzliche SDK-Stubs (EarlyInit, pre_gpio_config) in src/sys/sdk_stubs.c ergänzt, siehe sdk/PATCHES.md.
161 lines
3.1 KiB
C
161 lines
3.1 KiB
C
/**
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* @file wm_watchdog.c
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*
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* @brief watchdog Driver Module
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*
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* @author kevin
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*
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* Copyright (c) 2014 Winner Microelectronics Co., Ltd.
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*/
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#include "wm_debug.h"
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#include "wm_regs.h"
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#include "wm_irq.h"
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#include "wm_cpu.h"
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#include "wm_watchdog.h"
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static u32 wdg_jumpclear_flag = 0; /*0:donot jump clear, 1: jump clear, 2:close wdg*/
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// void WDG_IRQHandler(void)
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// {
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// printf("WDG IRQ\n"); while(1) {};
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// }
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/**
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* @brief This function is used to clear watchdog irq in case watchdog reset
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*
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* @param None
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*
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* @return None
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*
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* @note None
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*/
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void tls_watchdog_clr(void)
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{
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if (0 == wdg_jumpclear_flag)
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{
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tls_reg_write32(HR_WDG_INT_CLR, 0x01);
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}
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}
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/**
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* @brief This function is used to init watchdog
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*
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* @param[in] usec microseconds
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*
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* @return None
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*
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* @note None
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*/
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void tls_watchdog_init(u32 usec)
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{
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// tls_sys_clk sysclk;
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// u32 apbclkcoff = 0;
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// tls_sys_clk_get(&sysclk);
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tls_irq_enable(WATCHDOG_INT);
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//apbclkcoff = 40/sysclk.apbclk;
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tls_reg_write32(HR_WDG_LOAD_VALUE, 40 * usec); /* 40M dominant frequency: 40 * 10^6 * (usec / 10^6) */
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tls_reg_write32(HR_WDG_CTRL, 0x3); /* enable irq & reset */
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}
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/**
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* @brief This function is used to deinit watchdog
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*
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* @param[in] None
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*
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* @return None
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*
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* @note None
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*/
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void tls_watchdog_deinit(void)
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{
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tls_irq_disable(WATCHDOG_INT);
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tls_reg_write32(HR_WDG_CTRL, 0);
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tls_reg_write32(HR_WDG_INT_CLR, 0x01);
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}
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/**
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* @brief This function is used to start calculating elapsed time.
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*
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* @param[in] None
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*
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* @return elapsed time, unit:millisecond
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*
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* @note None
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*/
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void tls_watchdog_start_cal_elapsed_time(void)
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{
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if (tls_reg_read32(HR_WDG_CTRL)&0x3)
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{
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wdg_jumpclear_flag = 1;
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tls_reg_write32(HR_WDG_INT_CLR, 0x01);
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}
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else
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{
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wdg_jumpclear_flag = 2;
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tls_watchdog_init(5*1000*1000);
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}
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}
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/**
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* @brief This function is used to stop calculating & return elapsed time.
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*
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* @param[in] none
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*
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* @return elapsed time, unit:millisecond
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*
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* @note None
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*/
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u32 tls_watchdog_stop_cal_elapsed_time(void)
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{
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#define RT_TIME_BASE (40)
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u32 val = 0;
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switch (wdg_jumpclear_flag)
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{
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case 1:
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{
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val = (tls_reg_read32(HR_WDG_LOAD_VALUE) - tls_reg_read32(HR_WDG_CUR_VALUE))/RT_TIME_BASE;
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wdg_jumpclear_flag = 0;
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}
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break;
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case 2:
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{
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val = (tls_reg_read32(HR_WDG_LOAD_VALUE) - tls_reg_read32(HR_WDG_CUR_VALUE))/RT_TIME_BASE;
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wdg_jumpclear_flag = 0;
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tls_watchdog_deinit();
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}
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break;
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default:
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wdg_jumpclear_flag = 0;
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break;
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}
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return val;
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}
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/**
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* @brief This function is used to reset system
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*
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* @param None
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*
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* @return None
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*
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* @note None
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*/
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void tls_sys_reset(void)
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{
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tls_sys_clk_set(CPU_CLK_40M);
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tls_os_set_critical();
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tls_reg_write32(HR_WDG_LOCK, 0x1ACCE551);
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tls_reg_write32(HR_WDG_LOAD_VALUE, 0x100);
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tls_reg_write32(HR_WDG_CTRL, 0x3);
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tls_reg_write32(HR_WDG_LOCK, 1);
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}
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