Michael Sauer
1b0501179d
Docker-Build mit gcc-arm-none-eabi 4.9-2014q4 (statt Homebrew-Cask) verwendet, Dockerfile/tools/docker.sh dafür aus Task 13 vorgezogen. cmake/sdk.cmake schont gcc 4.9 (kennt -fcommon/-Wno-error=... nicht). Zwei zusätzliche SDK-Stubs (EarlyInit, pre_gpio_config) in src/sys/sdk_stubs.c ergänzt, siehe sdk/PATCHES.md.
257 lines
8.7 KiB
ArmAsm
257 lines
8.7 KiB
ArmAsm
/* File: startup_ARMCM3.S
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* Purpose: startup file for Cortex-M3 devices. Should use with
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* GCC for ARM Embedded Processors
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* Version: V2.0
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* Date: 16 August 2013
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*
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* Copyright (c) 2011 - 2013 ARM LIMITED
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of ARM nor the names of its contributors may be used
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to endorse or promote products derived from this software without
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specific prior written permission.
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*
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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---------------------------------------------------------------------------*/
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.syntax unified
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.arch armv7-m
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0xc00
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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//.equ Heap_Size, 0x1A000
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.equ Heap_Size, 0x21000
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#endif
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.globl __heap_base
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.globl __HeapLimit
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__heap_base:
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.if Heap_Size
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.space Heap_Size
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.endif
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.size __heap_base, . - __heap_base
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long MemManage_Handler /* MPU Fault Handler */
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.long BusFault_Handler /* Bus Fault Handler */
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.long UsageFault_Handler /* Usage Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long DebugMon_Handler /* Debug Monitor Handler */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long OS_CPU_SysTickHandler /* SysTick Handler */
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/* External interrupts */
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.long SDIO_RX_IRQHandler /*HSPI&SDIO SLAVE Trasmit*/
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.long SDIO_TX_IRQHandler /*HSPI & SDIO SLAVE Receive Data*/
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.long 0 /*Not Used*/
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.long SDIO_TX_CMD_IRQHandler /*HSPI & SDIO SLAVE Receive Command*/
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.long tls_wl_mac_isr /*MAC isr*/
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.long 0 /*Not Used*/
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.long tls_wl_rx_isr /*Wi-Fi Rx isr*/
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.long tls_wl_mgmt_tx_isr /*Wi-Fi Managment tx isr*/
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.long tls_wl_data_tx_isr /*Wi-Fi Data Tx isr*/
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.long PMU_TIMER1_IRQHandler /*PMU Timer1*/
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.long PMU_TIMER0_IRQHandler /*PMU Timer0*/
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.long PMU_GPIO_WAKE_IRQHandler /*PMU Wakeup pin isr*/
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.long PMU_SDIO_WAKE_IRQHandler /*SDIO Wakeup isr*/
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.long DMA_Channel0_IRQHandler /*DMA Channel 0*/
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.long DMA_Channel1_IRQHandler /*DMA Channel 1*/
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.long DMA_Channel2_IRQHandler /*DMA Channel 2*/
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.long DMA_Channel3_IRQHandler /*DMA Channel 3*/
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.long DMA_Channel4_7_IRQHandler /*DMA Channel 4-7*/
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.long DMA_BURST_IRQHandler /*DMA Burst isr*/
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.long I2C_IRQHandler /*I2C isr*/
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.long ADC_IRQHandler /*ADC isr*/
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.long SPI_LS_IRQHandler /*Master SPI isr*/
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.long SPI_HS_IRQHandler /*HSPI isr, not used*/
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.long UART0_IRQHandler /*UART0 isr*/
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.long UART1_IRQHandler /*UART1 isr*/
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.long GPIOA_IRQHandler /*GPIOA isr*/
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.long TIM0_IRQHandler /*TIM0 isr*/
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.long TIM1_IRQHandler /*TIM1 isr*/
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.long TIM2_IRQHandler /*TIM2 isr*/
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.long TIM3_IRQHandler /*TIM3 isr*/
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.long TIM4_IRQHandler /*TIM4 isr*/
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.long TIM5_IRQHandler /*TIM5 isr*/
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.long WDG_IRQHandler /*Watchdog isr*/
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.long 0 /*Not Used*/
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.long 0 /*Not Used*/
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.long PWM_IRQHandler /*PWM isr*/
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.long I2S_IRQHandler /*I2S isr*/
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.long PMU_RTC_IRQHandler /*PMU RTC isr*/
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.long RSA_IRQHandler /*RSA isr*/
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.long CRYPTION_IRQHandler /*CRYPTION isr*/
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.long GPIOB_IRQHandler /*GPIOB isr*/
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.long UART2_IRQHandler /*UART2&7816 isr*/
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.size __isr_vector, . - __isr_vector
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.text
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.thumb
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.thumb_func
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.align 2
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Firstly it copies data from read only memory to RAM.
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*
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* The ranges of copy from/to are specified by following symbols
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* __etext: LMA of start of the section to copy from. Usually end of text
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* __data_start__: VMA of start of the section to copy to
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* __data_end__: VMA of end of the section to copy to
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*
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* All addresses must be aligned to 4 bytes boundary.
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*/
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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.L_loop1:
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cmp r2, r3
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ittt lt
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ldrlt r0, [r1], #4
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strlt r0, [r2], #4
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blt .L_loop1
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/* Single BSS section scheme.
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*
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* The BSS section is specified by following symbols
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* __bss_start__: start of the BSS section.
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* __bss_end__: end of the BSS section.
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*
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* Both addresses must be aligned to 4 bytes boundary.
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*/
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ldr r1, =__bss_start__
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ldr r2, =__bss_end__
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movs r0, 0
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.L_loop3:
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cmp r1, r2
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itt lt
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strlt r0, [r1], #4
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blt .L_loop3
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/*
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#ifndef __NO_SYSTEM_INIT
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bl SystemInit
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#endif
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*/
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bl main
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.pool
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.size Reset_Handler, . - Reset_Handler
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.align 1
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.thumb_func
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.weak Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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b .
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.size Default_Handler, . - Default_Handler
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_irq_handler handler_name
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.weak \handler_name
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.set \handler_name, Default_Handler
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.endm
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def_irq_handler NMI_Handler
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def_irq_handler HardFault_Handler
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def_irq_handler MemManage_Handler
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def_irq_handler BusFault_Handler
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def_irq_handler UsageFault_Handler
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def_irq_handler SVC_Handler
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def_irq_handler DebugMon_Handler
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def_irq_handler PendSV_Handler
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def_irq_handler OS_CPU_SysTickHandler
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def_irq_handler SDIO_RX_IRQHandler
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def_irq_handler SDIO_TX_IRQHandler
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def_irq_handler SDIO_TX_CMD_IRQHandler
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def_irq_handler tls_wl_mac_isr
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def_irq_handler tls_wl_rx_isr
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def_irq_handler tls_wl_mgmt_tx_isr
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def_irq_handler tls_wl_data_tx_isr
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/*def_irq_handler PMU_TIMER1_IRQHandler*/
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/*def_irq_handler PMU_TIMER0_IRQHandler*/
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/*def_irq_handler PMU_GPIO_WAKE_IRQHandler*/
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def_irq_handler PMU_SDIO_WAKE_IRQHandler
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def_irq_handler DMA_Channel0_IRQHandler
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def_irq_handler DMA_Channel1_IRQHandler
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def_irq_handler DMA_Channel2_IRQHandler
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def_irq_handler DMA_Channel3_IRQHandler
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def_irq_handler DMA_Channel4_7_IRQHandler
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def_irq_handler DMA_BURST_IRQHandler
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/*def_irq_handler I2C_IRQHandler*/
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def_irq_handler ADC_IRQHandler
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def_irq_handler SPI_LS_IRQHandler
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def_irq_handler SPI_HS_IRQHandler
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def_irq_handler UART0_IRQHandler
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def_irq_handler UART1_IRQHandler
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def_irq_handler GPIOA_IRQHandler
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def_irq_handler TIM0_IRQHandler
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def_irq_handler TIM1_IRQHandler
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def_irq_handler TIM2_IRQHandler
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def_irq_handler TIM3_IRQHandler
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def_irq_handler TIM4_IRQHandler
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def_irq_handler TIM5_IRQHandler
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def_irq_handler WDG_IRQHandler
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/*def_irq_handler PWM_IRQHandler*/
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/*def_irq_handler I2S_IRQHandler*/
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/*def_irq_handler PMU_RTC_IRQHandler*/
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def_irq_handler RSA_IRQHandler
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def_irq_handler CRYPTION_IRQHandler
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def_irq_handler GPIOB_IRQHandler
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def_irq_handler UART2_IRQHandler
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.end
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